[deliverable/binutils-gdb.git] / opcodes / ChangeLog

2016-04-23  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/19983
	PR binutils/19984
	* i386-dis.c (print_insn): Return -1 if size of bfd_vma is
	smaller than address size.

2016-04-20  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>

	* alpha-dis.c: Regenerate.
	* crx-dis.c: Likewise.
	* disassemble.c: Likewise.
	* epiphany-opc.c: Likewise.
	* fr30-opc.c: Likewise.
	* frv-opc.c: Likewise.
	* ip2k-opc.c: Likewise.
	* iq2000-opc.c: Likewise.
	* lm32-opc.c: Likewise.
	* lm32-opinst.c: Likewise.
	* m32c-opc.c: Likewise.
	* m32r-opc.c: Likewise.
	* m32r-opinst.c: Likewise.
	* mep-opc.c: Likewise.
	* mt-opc.c: Likewise.
	* or1k-opc.c: Likewise.
	* or1k-opinst.c: Likewise.
	* tic80-opc.c: Likewise.
	* xc16x-opc.c: Likewise.
	* xstormy16-opc.c: Likewise.

2016-04-19  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add addb, subb, adcb, sbcb, andb, xorb, orb,
	fxorb, wxorb, shlb, shrb, notb, cntbb, div, mod, divm, qcmp,
	calcsd, and calcxd instructions.
	* arc-opc.c (insert_nps_bitop_size): Delete.
	(extract_nps_bitop_size): Delete.
	(MAKE_SRC_POS_INSERT_EXTRACT_FUNCS): Define, and use.
	(extract_nps_qcmp_m3): Define.
	(extract_nps_qcmp_m2): Define.
	(extract_nps_qcmp_m1): Define.
	(arc_flag_operands): Add F_NPS_SX, F_NPS_AR, F_NPS_AL.
	(arc_flag_classes): Add C_NPS_SX, C_NPS_AR_AL
	(arc_operands): Add NPS_SRC2_POS, NPS_SRC1_POS, NPS_ADDB_SIZE,
	NPS_ANDB_SIZE, NPS_FXORB_SIZ, NPS_WXORB_SIZ, NPS_R_XLDST,
	NPS_DIV_UIMM4, NPS_QCMP_SIZE, NPS_QCMP_M1, NPS_QCMP_M2, and
	NPS_QCMP_M3.

2016-04-19  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add dctcp, dcip, dcet, and dcacl instructions.

2016-04-15  H.J. Lu  <hongjiu.lu@intel.com>

	* Makefile.in: Regenerated with automake 1.11.6.
	* aclocal.m4: Likewise.

2016-04-14  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add xldb, xldw, xld, xstb, xstw, and xst
	instructions.
	* arc-opc.c (insert_nps_cmem_uimm16): New function.
	(extract_nps_cmem_uimm16): New function.
	(arc_operands): Add NPS_XLDST_UIMM16 operand.

2016-04-14  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-dis.c (arc_insn_length): New function.
	(print_insn_arc): Use arc_insn_length, change insnLen to unsigned.
	(find_format): Change insnLen parameter to unsigned.

2016-04-13  Nick Clifton  <nickc@redhat.com>

	PR target/19937
	* v850-opc.c (v850_opcodes): Correct masks for long versions of
	the LD.B and LD.BU instructions.

2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-dis.c (find_format): Check for extension flags.
	(print_flags): New function.
	(print_insn_arc): Update for .extCondCode, .extCoreRegister and
	.extAuxRegister.
	* arc-ext.c (arcExtMap_coreRegName): Use
	LAST_EXTENSION_CORE_REGISTER.
	(arcExtMap_coreReadWrite): Likewise.
	(dump_ARC_extmap): Update printing.
	* arc-opc.c (arc_flag_classes): Add F_CLASS_EXTEND flag.
	(arc_aux_regs): Add cpu field.
	* arc-regs.h: Add cpu field, lower case name aux registers.

2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-tbl.h: Add rtsc, sleep with no arguments.

2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-opc.c (flags_none, flags_f, flags_cc, flags_ccf):
	Initialize.
	(arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
	(arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
	(arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
	(arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
	(arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
	(arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
	(arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
	(arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
	(arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
	(arc_opcode arc_opcodes): Null terminate the array.
	(arc_num_opcodes): Remove.
	* arc-ext.h (INSERT_XOP): Define.
	(extInstruction_t): Likewise.
	(arcExtMap_instName): Delete.
	(arcExtMap_insn): New function.
	(arcExtMap_genOpcode): Likewise.
	* arc-ext.c (ExtInstruction): Remove.
	(create_map): Zero initialize instruction fields.
	(arcExtMap_instName): Remove.
	(arcExtMap_insn): New function.
	(dump_ARC_extmap): More info while debuging.
	(arcExtMap_genOpcode): New function.
	* arc-dis.c (find_format): New function.
	(print_insn_arc): Use find_format.
	(arc_get_disassembler): Enable dump_ARC_extmap only when
	debugging.

2016-04-11  Maciej W. Rozycki  <macro@imgtec.com>

	* mips-dis.c (print_mips16_insn_arg): Mask unused extended
	instruction bits out.

2016-04-07  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add schd, sync, and hwschd instructions.
	* arc-opc.c (arc_flag_operands): Add new flags.
	(arc_flag_classes): Add new classes.

2016-04-07  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-opc.c (arc_opcodes): Extend comment to discus table layout.

2016-04-05  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add movbi, decode1, fbset, fbclear, encode0,
	encode1, rflt, crc16, and crc32 instructions.
	* arc-opc.c (arc_flag_operands): Add F_NPS_R.
	(arc_flag_classes): Add C_NPS_R.
	(insert_nps_bitop_size_2b): New function.
	(extract_nps_bitop_size_2b): Likewise.
	(insert_nps_bitop_uimm8): Likewise.
	(extract_nps_bitop_uimm8): Likewise.
	(arc_operands): Add new operand entries.

2016-04-05  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-regs.h: Add a new subclass field.  Add double assist
	accumulator register values.
	* arc-tbl.h: Use DPA subclass to mark the double assist
	instructions.  Use DPX/SPX subclas to mark the FPX instructions.
	* arc-opc.c (RSP): Define instead of SP.
	(arc_aux_regs): Add the subclass field.

2016-04-05  Jiong Wang  <jiong.wang@arm.com>

	* arm-dis.c: Support FP16 vmul, vmla, vmls (by scalar).

2016-03-31  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-opc.c (arc_operands): Fix operand flags for NPS_R_DST, and
	NPS_R_SRC1.

2016-03-30  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add a header comment, and fix some whitespace
	issues.  No functional changes.

2016-03-30  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-regs.h (IC_RAM_ADDRESS, IC_TAG, IC_WP, IC_DATA, CONTROL0)
	(AX2, AY2, MX2, MY2, AY0, AY1, DC_RAM_ADDR, DC_TAG, CONTROL1)
	(RTT): Remove duplicate.
	(LCDINSTR, LCDDATA, LCDSTAT, CC_*, PCT_COUNT*, PCT_SNAP*)
	(PCT_CONFIG*): Remove.
	(D1L, D1H, D2H, D2L): Define.

2016-03-29  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-ext-tbl.h (dsp_fp_i2flt): Fix typo.

2016-03-29  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-tbl.h (invld07): Remove.
	* arc-ext-tbl.h: New file.
	* arc-dis.c (FIELDA, FIELDB, FIELDC): Remove.
	* arc-opc.c (arc_opcodes): Add ext-tbl include.

2016-03-24  Jan Kratochvil  <jan.kratochvil@redhat.com>

	Fix -Wstack-usage warnings.
	* aarch64-dis.c (print_operands): Substitute size.
	* aarch64-opc.c (print_register_offset_address): Substitute tblen.

2016-03-22  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* sparc-opc.c (sparc_opcodes): Reorder entries for `rd' in order
	to get a proper diagnostic when an invalid ASR register is used.

2016-03-22  Nick Clifton  <nickc@redhat.com>

	* configure: Regenerate.

2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: New file.
	* arc-opc.c: Add top level comment.
	(insert_nps_3bit_dst): New function.
	(extract_nps_3bit_dst): New function.
	(insert_nps_3bit_src2): New function.
	(extract_nps_3bit_src2): New function.
	(insert_nps_bitop_size): New function.
	(extract_nps_bitop_size): New function.
	(arc_flag_operands): Add nps400 entries.
	(arc_flag_classes): Add nps400 entries.
	(arc_operands): Add nps400 entries.
	(arc_opcodes): Add nps400 include.

2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-opc.c (arc_flag_classes): Convert all flag classes to use
	the new class enum values.

2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-dis.c (print_insn_arc): Handle nps400.

2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-opc.c (BASE): Delete.

2016-03-18  Nick Clifton  <nickc@redhat.com>

	PR target/19721
	* aarch64-tbl.h (aarch64_opcode_table): Fix type of second operand
	of MOV insn that aliases an ORR insn.

2016-03-16  Jiong Wang  <jiong.wang@arm.com>

	* arm-dis.c (neon_opcodes): Support new FP16 instructions.

2016-03-07  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>

	* mcore-opc.h: Add const qualifiers.
	* microblaze-opc.h (struct op_code_struct): Likewise.
	* sh-opc.h: Likewise.
	* tic4x-dis.c (tic4x_print_indirect): Likewise.
	(tic4x_print_op): Likewise.

2016-03-02  Alan Modra  <amodra@gmail.com>

	* or1k-desc.h: Regenerate.
	* fr30-ibld.c: Regenerate.
	* rl78-decode.c: Regenerate.

2016-03-01  Nick Clifton  <nickc@redhat.com>

	PR target/19747
	* rl78-dis.c (print_insn_rl78_common): Fix typo.

2016-02-24  Renlin Li  <renlin.li@arm.com>

	* arm-dis.c (coprocessor_opcodes): Add fp16 instruction entries.
	(print_insn_coprocessor): Support fp16 instructions.

2016-02-24  Renlin Li  <renlin.li@arm.com>

	* arm-dis.c (print_insn_coprocessor): Fix mask for vsel, vmaxnm,
	vminnm, vrint(mpna).

2016-02-24  Renlin Li  <renlin.li@arm.com>

	* arm-dis.c (print_insn_coprocessor): Check co-processor number for
	cpd/cpd2, mcr/mcr2, mrc/mrc2, ldc/ldc2, stc/stc2.

2016-02-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (print_insn): Parenthesize expression to prevent
	truncated addresses.
	(OP_J): Likewise.

2016-02-10  Claudiu Zissulescu  <claziss@synopsys.com>
	    Janek van Oirschot  <jvanoirs@synopsys.com>

	* arc-opc.c (arc_relax_opcodes, arc_num_relax_opcodes): New
	variable.

2016-02-04  Nick Clifton  <nickc@redhat.com>

	PR target/19561
	* msp430-dis.c (print_insn_msp430): Add a special case for
	decoding an RRC instruction with the ZC bit set in the extension
	word.

2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>

	* cgen-ibld.in (insert_normal): Rework calculation of shift.
	* epiphany-ibld.c: Regenerate.
	* fr30-ibld.c: Regenerate.
	* frv-ibld.c: Regenerate.
	* ip2k-ibld.c: Regenerate.
	* iq2000-ibld.c: Regenerate.
	* lm32-ibld.c: Regenerate.
	* m32c-ibld.c: Regenerate.
	* m32r-ibld.c: Regenerate.
	* mep-ibld.c: Regenerate.
	* mt-ibld.c: Regenerate.
	* or1k-ibld.c: Regenerate.
	* xc16x-ibld.c: Regenerate.
	* xstormy16-ibld.c: Regenerate.

2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>

	* epiphany-dis.c: Regenerated from latest cpu files.

2016-02-01  Michael McConville  <mmcco@mykolab.com>

	* cgen-dis.c (count_decodable_bits): Use unsigned value for mask
	test bit.

2016-01-25  Renlin Li  <renlin.li@arm.com>

	* arm-dis.c (mapping_symbol_for_insn): New function.
	(find_ifthen_state): Call mapping_symbol_for_insn().

2016-01-20  Matthew Wahab  <matthew.wahab@arm.com>

	* aarch64-opc.c (operand_general_constraint_met_p): Check validity
	of MSR UAO immediate operand.

2016-01-18  Maciej W. Rozycki  <macro@imgtec.com>

	* mips-dis.c (print_insn_micromips): Remove 48-bit microMIPS
	instruction support.

2016-01-17  Alan Modra  <amodra@gmail.com>

	* configure: Regenerate.

2016-01-14  Nick Clifton  <nickc@redhat.com>

	* rl78-decode.opc (rl78_decode_opcode): Add 's' operand to movw
	instructions that can support stack pointer operations.
	* rl78-decode.c: Regenerate.
	* rl78-dis.c: Fix display of stack pointer in MOVW based
	instructions.

2016-01-14  Matthew Wahab  <matthew.wahab@arm.com>

	* aarch64-opc.c (aarch64_sys_reg_supported_p): Merge conditionals
	testing for RAS support.  Add checks for erxfr_el1, erxctlr_el1,
	erxtatus_el1 and erxaddr_el1.

2016-01-12  Matthew Wahab  <matthew.wahab@arm.com>

	* arm-dis.c (arm_opcodes): Add "esb".
	(thumb_opcodes): Likewise.

2016-01-11  Peter Bergner <bergner@vnet.ibm.com>

	* ppc-opc.c <xscmpnedp>: Delete.
	<xvcmpnedp>: Likewise.
	<xvcmpnedp.>: Likewise.
	<xvcmpnesp>: Likewise.
	<xvcmpnesp.>: Likewise.

2016-01-08  Andreas Schwab  <schwab@linux-m68k.org>

	PR gas/13050
	* m68k-opc.c (moveb, movew): For ISA_B/C only allow #,d(An) in
	addition to ISA_A.

2016-01-01  Alan Modra  <amodra@gmail.com>

	Update year range in copyright notice of all files.

For older changes see ChangeLog-2015
\f
Copyright (C) 2016 Free Software Foundation, Inc.

Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved.

Local Variables:
mode: change-log
left-margin: 8
fill-column: 74
version-control: never
End:
Commit	Line	Data
c0f92bf9 L	1	2016-04-23 H.J. Lu <hongjiu.lu@intel.com>
	2
	3	PR binutils/19983
	4	PR binutils/19984
	5	* i386-dis.c (print_insn): Return -1 if size of bfd_vma is
	6	smaller than address size.
	7
e6c7cdec TS	8	2016-04-20 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
	9
	10	* alpha-dis.c: Regenerate.
	11	* crx-dis.c: Likewise.
	12	* disassemble.c: Likewise.
	13	* epiphany-opc.c: Likewise.
	14	* fr30-opc.c: Likewise.
	15	* frv-opc.c: Likewise.
	16	* ip2k-opc.c: Likewise.
	17	* iq2000-opc.c: Likewise.
	18	* lm32-opc.c: Likewise.
	19	* lm32-opinst.c: Likewise.
	20	* m32c-opc.c: Likewise.
	21	* m32r-opc.c: Likewise.
	22	* m32r-opinst.c: Likewise.
	23	* mep-opc.c: Likewise.
	24	* mt-opc.c: Likewise.
	25	* or1k-opc.c: Likewise.
	26	* or1k-opinst.c: Likewise.
	27	* tic80-opc.c: Likewise.
	28	* xc16x-opc.c: Likewise.
	29	* xstormy16-opc.c: Likewise.
	30
537aefaf AB	31	2016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
	32
	33	* arc-nps400-tbl.h: Add addb, subb, adcb, sbcb, andb, xorb, orb,
	34	fxorb, wxorb, shlb, shrb, notb, cntbb, div, mod, divm, qcmp,
	35	calcsd, and calcxd instructions.
	36	* arc-opc.c (insert_nps_bitop_size): Delete.
	37	(extract_nps_bitop_size): Delete.
	38	(MAKE_SRC_POS_INSERT_EXTRACT_FUNCS): Define, and use.
	39	(extract_nps_qcmp_m3): Define.
	40	(extract_nps_qcmp_m2): Define.
	41	(extract_nps_qcmp_m1): Define.
	42	(arc_flag_operands): Add F_NPS_SX, F_NPS_AR, F_NPS_AL.
	43	(arc_flag_classes): Add C_NPS_SX, C_NPS_AR_AL
	44	(arc_operands): Add NPS_SRC2_POS, NPS_SRC1_POS, NPS_ADDB_SIZE,
	45	NPS_ANDB_SIZE, NPS_FXORB_SIZ, NPS_WXORB_SIZ, NPS_R_XLDST,
	46	NPS_DIV_UIMM4, NPS_QCMP_SIZE, NPS_QCMP_M1, NPS_QCMP_M2, and
	47	NPS_QCMP_M3.
	48
c8f785f2 AB	49	2016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
	50
	51	* arc-nps400-tbl.h: Add dctcp, dcip, dcet, and dcacl instructions.
	52
6fd8e7c2 L	53	2016-04-15 H.J. Lu <hongjiu.lu@intel.com>
	54
	55	* Makefile.in: Regenerated with automake 1.11.6.
	56	* aclocal.m4: Likewise.
	57
4b0c052e AB	58	2016-04-14 Andrew Burgess <andrew.burgess@embecosm.com>
	59
	60	* arc-nps400-tbl.h: Add xldb, xldw, xld, xstb, xstw, and xst
	61	instructions.
	62	* arc-opc.c (insert_nps_cmem_uimm16): New function.
	63	(extract_nps_cmem_uimm16): New function.
	64	(arc_operands): Add NPS_XLDST_UIMM16 operand.
	65
cb040366 AB	66	2016-04-14 Andrew Burgess <andrew.burgess@embecosm.com>
	67
	68	* arc-dis.c (arc_insn_length): New function.
	69	(print_insn_arc): Use arc_insn_length, change insnLen to unsigned.
	70	(find_format): Change insnLen parameter to unsigned.
	71
accc0180 NC	72	2016-04-13 Nick Clifton <nickc@redhat.com>
	73
	74	PR target/19937
	75	* v850-opc.c (v850_opcodes): Correct masks for long versions of
	76	the LD.B and LD.BU instructions.
	77
f36e33da CZ	78	2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
	79
	80	* arc-dis.c (find_format): Check for extension flags.
	81	(print_flags): New function.
	82	(print_insn_arc): Update for .extCondCode, .extCoreRegister and
	83	.extAuxRegister.
	84	* arc-ext.c (arcExtMap_coreRegName): Use
	85	LAST_EXTENSION_CORE_REGISTER.
	86	(arcExtMap_coreReadWrite): Likewise.
	87	(dump_ARC_extmap): Update printing.
	88	* arc-opc.c (arc_flag_classes): Add F_CLASS_EXTEND flag.
	89	(arc_aux_regs): Add cpu field.
	90	* arc-regs.h: Add cpu field, lower case name aux registers.
	91
1c2e355e CZ	92	2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
	93
	94	* arc-tbl.h: Add rtsc, sleep with no arguments.
	95
b99747ae CZ	96	2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
	97
	98	* arc-opc.c (flags_none, flags_f, flags_cc, flags_ccf):
	99	Initialize.
	100	(arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
	101	(arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
	102	(arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
	103	(arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
	104	(arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
	105	(arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
	106	(arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
	107	(arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
	108	(arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
	109	(arc_opcode arc_opcodes): Null terminate the array.
	110	(arc_num_opcodes): Remove.
	111	* arc-ext.h (INSERT_XOP): Define.
	112	(extInstruction_t): Likewise.
	113	(arcExtMap_instName): Delete.
	114	(arcExtMap_insn): New function.
	115	(arcExtMap_genOpcode): Likewise.
	116	* arc-ext.c (ExtInstruction): Remove.
	117	(create_map): Zero initialize instruction fields.
	118	(arcExtMap_instName): Remove.
	119	(arcExtMap_insn): New function.
	120	(dump_ARC_extmap): More info while debuging.
	121	(arcExtMap_genOpcode): New function.
	122	* arc-dis.c (find_format): New function.
	123	(print_insn_arc): Use find_format.
	124	(arc_get_disassembler): Enable dump_ARC_extmap only when
	125	debugging.
	126
92708cec MR	127	2016-04-11 Maciej W. Rozycki <macro@imgtec.com>
	128
	129	* mips-dis.c (print_mips16_insn_arg): Mask unused extended
	130	instruction bits out.
	131
a42a4f84 AB	132	2016-04-07 Andrew Burgess <andrew.burgess@embecosm.com>
	133
	134	* arc-nps400-tbl.h: Add schd, sync, and hwschd instructions.
	135	* arc-opc.c (arc_flag_operands): Add new flags.
	136	(arc_flag_classes): Add new classes.
	137
1328504b AB	138	2016-04-07 Andrew Burgess <andrew.burgess@embecosm.com>
	139
	140	* arc-opc.c (arc_opcodes): Extend comment to discus table layout.
	141
820f03ff AB	142	2016-04-05 Andrew Burgess <andrew.burgess@embecosm.com>
	143
	144	* arc-nps400-tbl.h: Add movbi, decode1, fbset, fbclear, encode0,
	145	encode1, rflt, crc16, and crc32 instructions.
	146	* arc-opc.c (arc_flag_operands): Add F_NPS_R.
	147	(arc_flag_classes): Add C_NPS_R.
	148	(insert_nps_bitop_size_2b): New function.
	149	(extract_nps_bitop_size_2b): Likewise.
	150	(insert_nps_bitop_uimm8): Likewise.
	151	(extract_nps_bitop_uimm8): Likewise.
	152	(arc_operands): Add new operand entries.
	153
8ddf6b2a CZ	154	2016-04-05 Claudiu Zissulescu <claziss@synopsys.com>
8ddf6b2a CZ	155
b99747ae CZ	156	* arc-regs.h: Add a new subclass field. Add double assist
	157	accumulator register values.
	158	* arc-tbl.h: Use DPA subclass to mark the double assist
	159	instructions. Use DPX/SPX subclas to mark the FPX instructions.
	160	* arc-opc.c (RSP): Define instead of SP.
	161	(arc_aux_regs): Add the subclass field.
8ddf6b2a	162
589a7d88 JW	163	2016-04-05 Jiong Wang <jiong.wang@arm.com>
	164
	165	* arm-dis.c: Support FP16 vmul, vmla, vmls (by scalar).
	166
0a191de9	167	2016-03-31 Andrew Burgess <andrew.burgess@embecosm.com>
2cce10e7 AB	168
	169	* arc-opc.c (arc_operands): Fix operand flags for NPS_R_DST, and
	170	NPS_R_SRC1.
	171
0a106562 AB	172	2016-03-30 Andrew Burgess <andrew.burgess@embecosm.com>
	173
	174	* arc-nps400-tbl.h: Add a header comment, and fix some whitespace
	175	issues. No functional changes.
	176
bd05ac5f CZ	177	2016-03-30 Claudiu Zissulescu <claziss@synopsys.com>
bd05ac5f CZ	178
b99747ae CZ	179	* arc-regs.h (IC_RAM_ADDRESS, IC_TAG, IC_WP, IC_DATA, CONTROL0)
	180	(AX2, AY2, MX2, MY2, AY0, AY1, DC_RAM_ADDR, DC_TAG, CONTROL1)
	181	(RTT): Remove duplicate.
	182	(LCDINSTR, LCDDATA, LCDSTAT, CC_, PCT_COUNT, PCT_SNAP*)
	183	(PCT_CONFIG*): Remove.
	184	(D1L, D1H, D2H, D2L): Define.
bd05ac5f	185
9885948f CZ	186	2016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
9885948f CZ	187
b99747ae	188	* arc-ext-tbl.h (dsp_fp_i2flt): Fix typo.
9885948f	189
f2dd8838 CZ	190	2016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
f2dd8838 CZ	191
b99747ae CZ	192	* arc-tbl.h (invld07): Remove.
	193	* arc-ext-tbl.h: New file.
	194	* arc-dis.c (FIELDA, FIELDB, FIELDC): Remove.
	195	* arc-opc.c (arc_opcodes): Add ext-tbl include.
f2dd8838	196
0d2f91fe JK	197	2016-03-24 Jan Kratochvil <jan.kratochvil@redhat.com>
	198
	199	Fix -Wstack-usage warnings.
	200	* aarch64-dis.c (print_operands): Substitute size.
	201	* aarch64-opc.c (print_register_offset_address): Substitute tblen.
	202
a6b71f42 JM	203	2016-03-22 Jose E. Marchesi <jose.marchesi@oracle.com>
	204
	205	* sparc-opc.c (sparc_opcodes): Reorder entries for `rd' in order
	206	to get a proper diagnostic when an invalid ASR register is used.
	207
9780e045 NC	208	2016-03-22 Nick Clifton <nickc@redhat.com>
	209
	210	* configure: Regenerate.
	211
e23e8ebe AB	212	2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
	213
	214	* arc-nps400-tbl.h: New file.
	215	* arc-opc.c: Add top level comment.
	216	(insert_nps_3bit_dst): New function.
	217	(extract_nps_3bit_dst): New function.
	218	(insert_nps_3bit_src2): New function.
	219	(extract_nps_3bit_src2): New function.
	220	(insert_nps_bitop_size): New function.
	221	(extract_nps_bitop_size): New function.
	222	(arc_flag_operands): Add nps400 entries.
	223	(arc_flag_classes): Add nps400 entries.
	224	(arc_operands): Add nps400 entries.
	225	(arc_opcodes): Add nps400 include.
	226
1ae8ab47 AB	227	2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
	228
	229	* arc-opc.c (arc_flag_classes): Convert all flag classes to use
	230	the new class enum values.
	231
8699fc3e AB	232	2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
	233
	234	* arc-dis.c (print_insn_arc): Handle nps400.
	235
24740d83 AB	236	2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
	237
	238	* arc-opc.c (BASE): Delete.
	239
8678914f NC	240	2016-03-18 Nick Clifton <nickc@redhat.com>
	241
	242	PR target/19721
	243	* aarch64-tbl.h (aarch64_opcode_table): Fix type of second operand
	244	of MOV insn that aliases an ORR insn.
	245
cc933301 JW	246	2016-03-16 Jiong Wang <jiong.wang@arm.com>
	247
	248	* arm-dis.c (neon_opcodes): Support new FP16 instructions.
	249
f86f5863 TS	250	2016-03-07 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
	251
	252	* mcore-opc.h: Add const qualifiers.
	253	* microblaze-opc.h (struct op_code_struct): Likewise.
	254	* sh-opc.h: Likewise.
	255	* tic4x-dis.c (tic4x_print_indirect): Likewise.
	256	(tic4x_print_op): Likewise.
	257
62de1c63 AM	258	2016-03-02 Alan Modra <amodra@gmail.com>
62de1c63 AM	259
d11698cd	260	* or1k-desc.h: Regenerate.
62de1c63	261	* fr30-ibld.c: Regenerate.
c697cf0b	262	* rl78-decode.c: Regenerate.
62de1c63	263
020efce5 NC	264	2016-03-01 Nick Clifton <nickc@redhat.com>
	265
	266	PR target/19747
	267	* rl78-dis.c (print_insn_rl78_common): Fix typo.
	268
b0c11777 RL	269	2016-02-24 Renlin Li <renlin.li@arm.com>
	270
	271	* arm-dis.c (coprocessor_opcodes): Add fp16 instruction entries.
	272	(print_insn_coprocessor): Support fp16 instructions.
	273
3e309328 RL	274	2016-02-24 Renlin Li <renlin.li@arm.com>
	275
	276	* arm-dis.c (print_insn_coprocessor): Fix mask for vsel, vmaxnm,
	277	vminnm, vrint(mpna).
	278
8afc7bea RL	279	2016-02-24 Renlin Li <renlin.li@arm.com>
	280
	281	* arm-dis.c (print_insn_coprocessor): Check co-processor number for
	282	cpd/cpd2, mcr/mcr2, mrc/mrc2, ldc/ldc2, stc/stc2.
	283
4fd7268a L	284	2016-02-15 H.J. Lu <hongjiu.lu@intel.com>
	285
	286	* i386-dis.c (print_insn): Parenthesize expression to prevent
	287	truncated addresses.
	288	(OP_J): Likewise.
	289
4670103e CZ	290	2016-02-10 Claudiu Zissulescu <claziss@synopsys.com>
	291	Janek van Oirschot <jvanoirs@synopsys.com>
	292
b99747ae CZ	293	* arc-opc.c (arc_relax_opcodes, arc_num_relax_opcodes): New
b99747ae CZ	294	variable.
4670103e	295
c1d9289f NC	296	2016-02-04 Nick Clifton <nickc@redhat.com>
	297
	298	PR target/19561
	299	* msp430-dis.c (print_insn_msp430): Add a special case for
	300	decoding an RRC instruction with the ZC bit set in the extension
	301	word.
	302
a143b004 AB	303	2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
	304
	305	* cgen-ibld.in (insert_normal): Rework calculation of shift.
	306	* epiphany-ibld.c: Regenerate.
	307	* fr30-ibld.c: Regenerate.
	308	* frv-ibld.c: Regenerate.
	309	* ip2k-ibld.c: Regenerate.
	310	* iq2000-ibld.c: Regenerate.
	311	* lm32-ibld.c: Regenerate.
	312	* m32c-ibld.c: Regenerate.
	313	* m32r-ibld.c: Regenerate.
	314	* mep-ibld.c: Regenerate.
	315	* mt-ibld.c: Regenerate.
	316	* or1k-ibld.c: Regenerate.
	317	* xc16x-ibld.c: Regenerate.
	318	* xstormy16-ibld.c: Regenerate.
	319
b89807c6 AB	320	2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
	321
	322	* epiphany-dis.c: Regenerated from latest cpu files.
	323
d8c823c8 MM	324	2016-02-01 Michael McConville <mmcco@mykolab.com>
	325
	326	* cgen-dis.c (count_decodable_bits): Use unsigned value for mask
	327	test bit.
	328
5bc5ae88 RL	329	2016-01-25 Renlin Li <renlin.li@arm.com>
	330
	331	* arm-dis.c (mapping_symbol_for_insn): New function.
	332	(find_ifthen_state): Call mapping_symbol_for_insn().
	333
0bff6e2d MW	334	2016-01-20 Matthew Wahab <matthew.wahab@arm.com>
	335
	336	* aarch64-opc.c (operand_general_constraint_met_p): Check validity
	337	of MSR UAO immediate operand.
	338
100b4f2e MR	339	2016-01-18 Maciej W. Rozycki <macro@imgtec.com>
	340
	341	* mips-dis.c (print_insn_micromips): Remove 48-bit microMIPS
	342	instruction support.
	343
5c14705f AM	344	2016-01-17 Alan Modra <amodra@gmail.com>
	345
	346	* configure: Regenerate.
	347
4d82fe66 NC	348	2016-01-14 Nick Clifton <nickc@redhat.com>
	349
	350	* rl78-decode.opc (rl78_decode_opcode): Add 's' operand to movw
	351	instructions that can support stack pointer operations.
	352	* rl78-decode.c: Regenerate.
	353	* rl78-dis.c: Fix display of stack pointer in MOVW based
	354	instructions.
	355
651657fa MW	356	2016-01-14 Matthew Wahab <matthew.wahab@arm.com>
	357
	358	* aarch64-opc.c (aarch64_sys_reg_supported_p): Merge conditionals
	359	testing for RAS support. Add checks for erxfr_el1, erxctlr_el1,
	360	erxtatus_el1 and erxaddr_el1.
	361
105bde57 MW	362	2016-01-12 Matthew Wahab <matthew.wahab@arm.com>
	363
	364	* arm-dis.c (arm_opcodes): Add "esb".
	365	(thumb_opcodes): Likewise.
	366
afa8d405 PB	367	2016-01-11 Peter Bergner <bergner@vnet.ibm.com>
	368
	369	* ppc-opc.c <xscmpnedp>: Delete.
	370	<xvcmpnedp>: Likewise.
	371	<xvcmpnedp.>: Likewise.
	372	<xvcmpnesp>: Likewise.
	373	<xvcmpnesp.>: Likewise.
	374
83c3256e AS	375	2016-01-08 Andreas Schwab <schwab@linux-m68k.org>
	376
	377	PR gas/13050
	378	* m68k-opc.c (moveb, movew): For ISA_B/C only allow #,d(An) in
	379	addition to ISA_A.
	380
6f2750fe AM	381	2016-01-01 Alan Modra <amodra@gmail.com>
	382
	383	Update year range in copyright notice of all files.
	384
3499769a AM	385	For older changes see ChangeLog-2015
	386	\f
	387	Copyright (C) 2016 Free Software Foundation, Inc.
	388
	389	Copying and distribution of this file, with or without modification,
	390	are permitted in any medium without royalty provided the copyright
	391	notice and this notice are preserved.
	392
	393	Local Variables:
	394	mode: change-log
	395	left-margin: 8
	396	fill-column: 74
	397	version-control: never
	398	End: