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[deliverable/binutils-gdb.git] / opcodes / ChangeLog
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fd54057a
DD		 12005-07-25 DJ Delorie <dj@redhat.com>
2
3 * m32c-asm.c Regenerate.
4 * m32c-dis.c Regenerate.
5
760c0f6a
DD		 62005-07-20 DJ Delorie <dj@redhat.com>
7
8 * disassemble.c (disassemble_init_for_target): M32C ISAs are
9 enums, so convert them to bit masks, which attributes are.
10
85da3a56
NC		 112005-07-18 Nick Clifton <nickc@redhat.com>
12
13 * configure.in: Restore alpha ordering to list of arches.
14 * configure: Regenerate.
15 * disassemble.c: Restore alpha ordering to list of arches.
16
172005-07-18 Nick Clifton <nickc@redhat.com>
18
19 * m32c-asm.c: Regenerate.
20 * m32c-desc.c: Regenerate.
21 * m32c-desc.h: Regenerate.
22 * m32c-dis.c: Regenerate.
23 * m32c-ibld.h: Regenerate.
24 * m32c-opc.c: Regenerate.
25 * m32c-opc.h: Regenerate.
26
22cbf2e7
L		 272005-07-18 H.J. Lu <hongjiu.lu@intel.com>
28
29 * i386-dis.c (PNI_Fixup): Update comment.
30 (VMX_Fixup): Properly handle the suffix check.
31
0aea0460
DA		 322005-07-16 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
33
34 * hppa-dis.c (print_insn_hppa): Add space after 'w' in wide-mode
35 mfctl disassembly.
36
0f82ff91
AM		 372005-07-16 Alan Modra <amodra@bigpond.net.au>
38
39 * Makefile.am: Run "make dep-am".
40 (stamp-m32c): Fix cpu dependencies.
41 * Makefile.in: Regenerate.
42 * ip2k-dis.c: Regenerate.
43
90700ea2
L		 442007-07-15 H.J. Lu <hongjiu.lu@intel.com>
45
46 * i386-dis.c (OP_VMX): New. Handle Intel VMX Instructions.
47 (VMX_Fixup): New. Fix up Intel VMX Instructions.
48 (Em): New.
49 (Gm): New.
50 (VM): New.
51 (dis386_twobyte): Updated entries 0x78 and 0x79.
52 (twobyte_has_modrm): Likewise.
53 (grps): Use OP_VMX in the "sgdtIQ" entry. Updated GRP9.
54 (OP_G): Handle m_mode.
55
49f58d10
JB		 562005-07-14 Jim Blandy <jimb@redhat.com>
57
58 Add support for the Renesas M32C and M16C.
59 * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
60 * m32c-desc.h, m32c-opc.h: New.
61 * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
62 (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
63 m32c-opc.c.
64 (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
65 m32c-ibld.lo, m32c-opc.lo.
66 (CLEANFILES): List stamp-m32c.
67 (M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
68 (CGEN_CPUS): Add m32c.
69 (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
70 (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
71 (m32c_opc_h): New variable.
72 (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
73 (m32c-opc.lo): New rules.
74 * Makefile.in: Regenerated.
75 * configure.in: Add case for bfd_m32c_arch.
76 * configure: Regenerated.
77 * disassemble.c (ARCH_m32c): New.
78 [ARCH_m32c]: #include "m32c-desc.h".
79 (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
80 (disassemble_init_for_target) [ARCH_m32c]: Same.
81
82 * cgen-ops.h, cgen-types.h: New files.
83 * Makefile.am (HFILES): List them.
84 * Makefile.in: Regenerated.
85
0fd3a477
JW		 862005-07-07 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
87
88 * arc-dis.c, arm-dis.c, cris-dis.c, crx-dis.c, d10v-dis.c,
89 d30v-dis.c, fr30-dis.c, h8300-dis.c, h8500-dis.c, i860-dis.c,
90 ia64-dis.c, ip2k-dis.c, m10200-dis.c, m10300-dis.c,
91 m88k-dis.c, mcore-dis.c, mips-dis.c, ms1-dis.c, or32-dis.c,
92 ppc-dis.c, sh64-dis.c, sparc-dis.c, tic4x-dis.c, tic80-dis.c,
93 v850-dis.c: Fix format bugs.
94 * ia64-gen.c (fail, warn): Add format attribute.
95 * or32-opc.c (debug): Likewise.
96
22f8fcbd
NC		 972005-07-07 Khem Raj <kraj@mvista.com>
98
99 * arm-dis.c (opcode32 arm_opcodes): Fix ARM VFP fadds instruction
100 disassembly pattern.
101
d125c27b
AM		 1022005-07-06 Alan Modra <amodra@bigpond.net.au>
103
104 * Makefile.am (stamp-m32r): Fix path to cpu files.
105 (stamp-m32r, stamp-iq2000): Likewise.
106 * Makefile.in: Regenerate.
107 * m32r-asm.c: Regenerate.
108 * po/POTFILES.in: Remove arm-opc.h. Add ms1-asm.c, ms1-desc.c,
109 ms1-desc.h, ms1-dis.c, ms1-ibld.c, ms1-opc.c, ms1-opc.h.
110
3ec2b351
NC		 1112005-07-05 Nick Clifton <nickc@redhat.com>
112
113 * iq2000-asm.c: Regenerate.
114 * ms1-asm.c: Regenerate.
115
30123838
JB		 1162005-07-05 Jan Beulich <jbeulich@novell.com>
117
118 * i386-dis.c (SVME_Fixup): New.
119 (grps): Use it for the lidt entry.
120 (PNI_Fixup): Call OP_M rather than OP_E.
121 (INVLPG_Fixup): Likewise.
122
b0eec63e
L		 1232005-07-04 H.J. Lu <hongjiu.lu@intel.com>
124
125 * tic30-dis.c (cnvt_tmsfloat_ieee): Use HUGE_VALF if defined.
126
47b0e7ad
NC		 1272005-07-01 Nick Clifton <nickc@redhat.com>
128
129 * a29k-dis.c: Update to ISO C90 style function declarations and
130 fix formatting.
131 * alpha-opc.c: Likewise.
132 * arc-dis.c: Likewise.
133 * arc-opc.c: Likewise.
134 * avr-dis.c: Likewise.
135 * cgen-asm.in: Likewise.
136 * cgen-dis.in: Likewise.
137 * cgen-ibld.in: Likewise.
138 * cgen-opc.c: Likewise.
139 * cris-dis.c: Likewise.
140 * d10v-dis.c: Likewise.
141 * d30v-dis.c: Likewise.
142 * d30v-opc.c: Likewise.
143 * dis-buf.c: Likewise.
144 * dlx-dis.c: Likewise.
145 * h8300-dis.c: Likewise.
146 * h8500-dis.c: Likewise.
147 * hppa-dis.c: Likewise.
148 * i370-dis.c: Likewise.
149 * i370-opc.c: Likewise.
150 * m10200-dis.c: Likewise.
151 * m10300-dis.c: Likewise.
152 * m68k-dis.c: Likewise.
153 * m88k-dis.c: Likewise.
154 * mips-dis.c: Likewise.
155 * mmix-dis.c: Likewise.
156 * msp430-dis.c: Likewise.
157 * ns32k-dis.c: Likewise.
158 * or32-dis.c: Likewise.
159 * or32-opc.c: Likewise.
160 * pdp11-dis.c: Likewise.
161 * pj-dis.c: Likewise.
162 * s390-dis.c: Likewise.
163 * sh-dis.c: Likewise.
164 * sh64-dis.c: Likewise.
165 * sparc-dis.c: Likewise.
166 * sparc-opc.c: Likewise.
167 * sysdep.h: Likewise.
168 * tic30-dis.c: Likewise.
169 * tic4x-dis.c: Likewise.
170 * tic80-dis.c: Likewise.
171 * v850-dis.c: Likewise.
172 * v850-opc.c: Likewise.
173 * vax-dis.c: Likewise.
174 * w65-dis.c: Likewise.
175 * z8kgen.c: Likewise.
176
177 * fr30-*: Regenerate.
178 * frv-*: Regenerate.
179 * ip2k-*: Regenerate.
180 * iq2000-*: Regenerate.
181 * m32r-*: Regenerate.
182 * ms1-*: Regenerate.
183 * openrisc-*: Regenerate.
184 * xstormy16-*: Regenerate.
185
cc16ba8c
BE		 1862005-06-23 Ben Elliston <bje@gnu.org>
187
188 * m68k-dis.c: Use ISC C90.
189 * m68k-opc.c: Formatting fixes.
190
4b185e97
DU		 1912005-06-16 David Ung <davidu@mips.com>
192
193 * mips16-opc.c (mips16_opcodes): Add the following MIPS16e
194 instructions to the table; seb/seh/sew/zeb/zeh/zew.
195
ac188222
DB		 1962005-06-15 Dave Brolley <brolley@redhat.com>
197
198 Contribute Morpho ms1 on behalf of Red Hat
199 * ms1-asm.c, ms1-desc.c, ms1-dis.c, ms1-ibld.c, ms1-opc.c,
200 ms1-opc.h: New files, Morpho ms1 target.
201
202 2004-05-14 Stan Cox <scox@redhat.com>
203
204 * disassemble.c (ARCH_ms1): Define.
205 (disassembler): Handle bfd_arch_ms1
206
207 2004-05-13 Michael Snyder <msnyder@redhat.com>
208
209 * Makefile.am, Makefile.in: Add ms1 target.
210 * configure.in: Ditto.
211
6b5d3a4d
ZW		 2122005-06-08 Zack Weinberg <zack@codesourcery.com>
213
214 * arm-opc.h: Delete; fold contents into ...
215 * arm-dis.c: ... here. Move includes of internal COFF headers
216 next to includes of internal ELF headers.
217 (streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
218 (struct arm_opcode): Rename struct opcode32. Make 'assembler' const.
219 (struct thumb_opcode): Rename struct opcode16. Make 'assembler' const.
220 (arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
221 (iwmmxt_wwnames, iwmmxt_wwssnames):
222 Make const.
223 (regnames): Remove iWMMXt coprocessor register sets.
224 (iwmmxt_regnames, iwmmxt_cregnames): New statics.
225 (get_arm_regnames): Adjust fourth argument to match above changes.
226 (set_iwmmxt_regnames): Delete.
227 (print_insn_arm): Constify 'c'. Use ISO syntax for function
228 pointer calls. Expand sole use of BDISP. Use iwmmxt_regnames
229 and iwmmxt_cregnames, not set_iwmmxt_regnames.
230 (print_insn_thumb16, print_insn_thumb32): Constify 'c'. Use
231 ISO syntax for function pointer calls.
232
4a5329c6
ZW		 2332005-06-07 Zack Weinberg <zack@codesourcery.com>
234
235 * arm-dis.c: Split up the comments describing the format codes, so
236 that the ARM and 16-bit Thumb opcode tables each have comments
237 preceding them that describe all the codes, and only the codes,
238 valid in those tables. (32-bit Thumb table is already like this.)
239 Reorder the lists in all three comments to match the order in
240 which the codes are implemented.
241 Remove all forward declarations of static functions. Convert all
242 function definitions to ISO C format.
243 (print_insn_arm, print_insn_thumb16, print_insn_thumb32):
244 Return nothing.
245 (print_insn_thumb16): Remove unused case 'I'.
246 (print_insn): Update for changed calling convention of subroutines.
247
3d456fa1
JB		 2482005-05-25 Jan Beulich <jbeulich@novell.com>
249
250 * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
251 hex (but retain it being displayed as signed). Remove redundant
252 checks. Add handling of displacements for 16-bit addressing in Intel
253 mode.
254
2888cb7a
JB		 2552005-05-25 Jan Beulich <jbeulich@novell.com>
256
257 * i386-dis.c (prefix_name): Remove pointless mode_64bit check.
258 (OP_E): Remove redundant REX_EXTZ handling. Remove pointless
259 masking of 'rm' in 16-bit memory address handling.
260
1ed8e1e4
AM		 2612005-05-19 Anton Blanchard <anton@samba.org>
262
263 * ppc-dis.c (powerpc_dialect): Handle "-Mpower5".
264 (print_ppc_disassembler_options): Document it.
265 * ppc-opc.c (SVC_LEV): Define.
266 (LEV): Allow optional operand.
267 (POWER5): Define.
268 (powerpc_opcodes): Extend "sc". Adjust "svc" and "svcl". Add
269 "hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
270
49cc2e69
KC		 2712005-05-19 Kelley Cook <kcook@gcc.gnu.org>
272
273 * Makefile.in: Regenerate.
274
c19d1205
ZW		 2752005-05-17 Zack Weinberg <zack@codesourcery.com>
276
277 * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
278 instructions. Adjust disassembly of some opcodes to match
279 unified syntax.
280 (thumb32_opcodes): New table.
281 (print_insn_thumb): Rename print_insn_thumb16; don't handle
282 two-halfword branches here.
283 (print_insn_thumb32): New function.
284 (print_insn): Choose among print_insn_arm, print_insn_thumb16,
285 and print_insn_thumb32. Be consistent about order of
286 halfwords when printing 32-bit instructions.
287
003519a7
L		 2882005-05-07 H.J. Lu <hongjiu.lu@intel.com>
289
290 PR 843
291 * i386-dis.c (branch_v_mode): New.
292 (indirEv): Use branch_v_mode instead of v_mode.
293 (OP_E): Handle branch_v_mode.
294
920a34a7
L		 2952005-05-07 H.J. Lu <hongjiu.lu@intel.com>
296
297 * d10v-dis.c (dis_2_short): Support 64bit host.
298
5de773c1
NC		 2992005-05-07 Nick Clifton <nickc@redhat.com>
300
301 * po/nl.po: Updated translation.
302
f4321104
NC		 3032005-05-07 Nick Clifton <nickc@redhat.com>
304
305 * Update the address and phone number of the FSF organization in
306 the GPL notices in the following files:
307 a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
308 arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
309 avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
310 cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
311 crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
312 d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
313 fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
314 fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
315 frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
316 h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
317 i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
318 ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
319 ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
320 ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
321 ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
322 iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
323 iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
324 m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
325 m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
326 m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
327 maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
328 mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
329 openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
330 openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
331 or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
332 pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
333 s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
334 sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
335 tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
336 v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
337 xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
338 xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
339 xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
340
10b076a2
JW		 3412005-05-05 James E Wilson <wilson@specifixinc.com>
342
343 * ia64-opc.c: Include sysdep.h before libiberty.h.
344
022716b6
NC		 3452005-05-05 Nick Clifton <nickc@redhat.com>
346
347 * configure.in (ALL_LINGUAS): Add vi.
348 * configure: Regenerate.
349 * po/vi.po: New.
350
db5152b4
JG		 3512005-04-26 Jerome Guitton <guitton@gnat.com>
352
353 * configure.in: Fix the check for basename declaration.
354 * configure: Regenerate.
355
eed0d89a
AM		 3562005-04-19 Alan Modra <amodra@bigpond.net.au>
357
358 * ppc-opc.c (RTO): Define.
359 (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
360 entries to suit PPC440.
361
791fe849
MK		 3622005-04-18 Mark Kettenis <kettenis@gnu.org>
363
364 * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
365 Add xcrypt-ctr.
366
ffe58f7c
NC		 3672005-04-14 Nick Clifton <nickc@redhat.com>
368
369 * po/fi.po: New translation: Finnish.
370 * configure.in (ALL_LINGUAS): Add fi.
371 * configure: Regenerate.
372
9e9b66a9
AM		 3732005-04-14 Alan Modra <amodra@bigpond.net.au>
374
375 * Makefile.am (NO_WERROR): Define.
376 * configure.in: Invoke AM_BINUTILS_WARNINGS.
377 * Makefile.in: Regenerate.
378 * aclocal.m4: Regenerate.
379 * configure: Regenerate.
380
9494d739
NC		 3812005-04-04 Nick Clifton <nickc@redhat.com>
382
383 * fr30-asm.c: Regenerate.
384 * frv-asm.c: Regenerate.
385 * iq2000-asm.c: Regenerate.
386 * m32r-asm.c: Regenerate.
387 * openrisc-asm.c: Regenerate.
388
6128c599
JB		 3892005-04-01 Jan Beulich <jbeulich@novell.com>
390
391 * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
392 visible operands in Intel mode. The first operand of monitor is
393 %rax in 64-bit mode.
394
373ff435
JB		 3952005-04-01 Jan Beulich <jbeulich@novell.com>
396
397 * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
398 easier future additions.
399
4bd60896
JG		 4002005-03-31 Jerome Guitton <guitton@gnat.com>
401
402 * configure.in: Check for basename.
403 * configure: Regenerate.
404 * config.in: Ditto.
405
4cc91dba
L		 4062005-03-29 H.J. Lu <hongjiu.lu@intel.com>
407
408 * i386-dis.c (SEG_Fixup): New.
409 (Sv): New.
410 (dis386): Use "Sv" for 0x8c and 0x8e.
411
ec72cfe5
NC		 4122005-03-21 Jan-Benedict Glaw <jbglaw@lug-owl.de>
413 Nick Clifton <nickc@redhat.com>
c19d1205 414
ec72cfe5
NC		 415 * vax-dis.c: (entry_addr): New varible: An array of user supplied
416 function entry mask addresses.
417 (entry_addr_occupied_slots): New variable: The number of occupied
c19d1205 418 elements in entry_addr.
ec72cfe5
NC		 419 (entry_addr_total_slots): New variable: The total number of
420 elements in entry_addr.
421 (parse_disassembler_options): New function. Fills in the entry_addr
422 array.
423 (free_entry_array): New function. Release the memory used by the
424 entry addr array. Suppressed because there is no way to call it.
425 (is_function_entry): Check if a given address is a function's
426 start address by looking at supplied entry mask addresses and
427 symbol information, if available.
428 (print_insn_vax): Use parse_disassembler_options and is_function_entry.
429
85064c79
L		 4302005-03-23 H.J. Lu <hongjiu.lu@intel.com>
431
432 * cris-dis.c (print_with_operands): Use ~31L for long instead
433 of ~31.
434
de7141c7
L		 4352005-03-20 H.J. Lu <hongjiu.lu@intel.com>
436
437 * mmix-opc.c (O): Revert the last change.
438 (Z): Likewise.
439
e493ab45
L		 4402005-03-19 H.J. Lu <hongjiu.lu@intel.com>
441
442 * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
443 (Z): Likewise.
444
d8d7c459
HPN		 4452005-03-19 Hans-Peter Nilsson <hp@bitrange.com>
446
447 * mmix-opc.c (O, Z): Force expression as unsigned long.
448
ebdb0383
NC		 4492005-03-18 Nick Clifton <nickc@redhat.com>
450
451 * ip2k-asm.c: Regenerate.
452 * op/opcodes.pot: Regenerate.
453
1ad12f97
NC		 4542005-03-16 Nick Clifton <nickc@redhat.com>
455 Ben Elliston <bje@au.ibm.com>
456
569acd2c 457 * configure.in (werror): New switch: Add -Werror to the
1ad12f97 458 compiler command line. Enabled by default. Disable via
569acd2c 459 --disable-werror.
1ad12f97
NC		 460 * configure: Regenerate.
461
4eb30afc
AM		 4622005-03-16 Alan Modra <amodra@bigpond.net.au>
463
464 * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
465 BOOKE.
466
ea8409f7
AM		 4672005-03-15 Alan Modra <amodra@bigpond.net.au>
468
729ae8d2
AM		 469 * po/es.po: Commit new Spanish translation.
470
ea8409f7
AM		 471 * po/fr.po: Commit new French translation.
472
4f495e61
NC		 4732005-03-14 Jan-Benedict Glaw <jbglaw@lug-owl.de>
474
475 * vax-dis.c: Fix spelling error
476 (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
477 of just "Entry mask: < r1 ... >"
478
0a003adc
ZW		 4792005-03-12 Zack Weinberg <zack@codesourcery.com>
480
481 * arm-dis.c (arm_opcodes): Document %E and %V.
482 Add entries for v6T2 ARM instructions:
483 bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
484 (print_insn_arm): Add support for %E and %V.
885fc257 485 (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
0a003adc 486
da99ee72
AM		 4872005-03-10 Jeff Baker <jbaker@qnx.com>
488 Alan Modra <amodra@bigpond.net.au>
489
490 * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
491 (powerpc_operands <SPRG>): Call the above. Bit field is 5 bits.
492 (SPRG_MASK): Delete.
493 (XSPRG_MASK): Mask off extra bits now part of sprg field.
0a003adc 494 (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask. Move
da99ee72
AM		 495 mfsprg4..7 after msprg and consolidate.
496
220abb21
AM		 4972005-03-09 Jan-Benedict Glaw <jbglaw@lug-owl.de>
498
499 * vax-dis.c (entry_mask_bit): New array.
500 (print_insn_vax): Decode function entry mask.
501
0e06657a
AH		 5022005-03-07 Aldy Hernandez <aldyh@redhat.com>
503
504 * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
505
06647dfd
AM		 5062005-03-05 Alan Modra <amodra@bigpond.net.au>
507
508 * po/opcodes.pot: Regenerate.
509
82b829a7
RR		 5102005-03-03 Ramana Radhakrishnan <ramana.radhakrishnan@codito.com>
511
220abb21 512 * arc-dis.c (a4_decoding_class): New enum.
06647dfd
AM		 513 (dsmOneArcInst): Use the enum values for the decoding class.
514 Remove redundant case in the switch for decodingClass value 11.
82b829a7 515
c4a530c5
JB		 5162005-03-02 Jan Beulich <jbeulich@novell.com>
517
518 * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
519 accesses.
520 (OP_C): Consider lock prefix in non-64-bit modes.
521
47d8304e
AM		 5222005-02-24 Alan Modra <amodra@bigpond.net.au>
523
524 * cris-dis.c (format_hex): Remove ineffective warning fix.
525 * crx-dis.c (make_instruction): Warning fix.
526 * frv-asm.c: Regenerate.
527
ec36c4a4
NC		 5282005-02-23 Nick Clifton <nickc@redhat.com>
529
33b71eeb
NC		 530 * cgen-dis.in: Use bfd_byte for buffers that are passed to
531 read_memory.
06647dfd 532
33b71eeb 533 * ia64-opc.c (locate_opcode_ent): Initialise opval array.
06647dfd 534
ec36c4a4
NC		 535 * crx-dis.c (make_instruction): Move argument structure into inner
536 scope and ensure that all of its fields are initialised before
537 they are used.
538
33b71eeb
NC		 539 * fr30-asm.c: Regenerate.
540 * fr30-dis.c: Regenerate.
541 * frv-asm.c: Regenerate.
542 * frv-dis.c: Regenerate.
543 * ip2k-asm.c: Regenerate.
544 * ip2k-dis.c: Regenerate.
545 * iq2000-asm.c: Regenerate.
546 * iq2000-dis.c: Regenerate.
547 * m32r-asm.c: Regenerate.
548 * m32r-dis.c: Regenerate.
549 * openrisc-asm.c: Regenerate.
550 * openrisc-dis.c: Regenerate.
551 * xstormy16-asm.c: Regenerate.
552 * xstormy16-dis.c: Regenerate.
553
53c9ebc5
AM		 5542005-02-22 Alan Modra <amodra@bigpond.net.au>
555
556 * arc-ext.c: Warning fixes.
557 * arc-ext.h: Likewise.
558 * cgen-opc.c: Likewise.
559 * ia64-gen.c: Likewise.
560 * maxq-dis.c: Likewise.
561 * ns32k-dis.c: Likewise.
562 * w65-dis.c: Likewise.
563 * ia64-asmtab.c: Regenerate.
564
610ad19b
AM		 5652005-02-22 Alan Modra <amodra@bigpond.net.au>
566
567 * fr30-desc.c: Regenerate.
568 * fr30-desc.h: Regenerate.
569 * fr30-opc.c: Regenerate.
570 * fr30-opc.h: Regenerate.
571 * frv-desc.c: Regenerate.
572 * frv-desc.h: Regenerate.
573 * frv-opc.c: Regenerate.
574 * frv-opc.h: Regenerate.
575 * ip2k-desc.c: Regenerate.
576 * ip2k-desc.h: Regenerate.
577 * ip2k-opc.c: Regenerate.
578 * ip2k-opc.h: Regenerate.
579 * iq2000-desc.c: Regenerate.
580 * iq2000-desc.h: Regenerate.
581 * iq2000-opc.c: Regenerate.
582 * iq2000-opc.h: Regenerate.
583 * m32r-desc.c: Regenerate.
584 * m32r-desc.h: Regenerate.
585 * m32r-opc.c: Regenerate.
586 * m32r-opc.h: Regenerate.
587 * m32r-opinst.c: Regenerate.
588 * openrisc-desc.c: Regenerate.
589 * openrisc-desc.h: Regenerate.
590 * openrisc-opc.c: Regenerate.
591 * openrisc-opc.h: Regenerate.
592 * xstormy16-desc.c: Regenerate.
593 * xstormy16-desc.h: Regenerate.
594 * xstormy16-opc.c: Regenerate.
595 * xstormy16-opc.h: Regenerate.
596
db9db6f2
AM		 5972005-02-21 Alan Modra <amodra@bigpond.net.au>
598
599 * Makefile.am: Run "make dep-am"
600 * Makefile.in: Regenerate.
601
bf143b25
NC		 6022005-02-15 Nick Clifton <nickc@redhat.com>
603
604 * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
605 compile time warnings.
606 (print_keyword): Likewise.
607 (default_print_insn): Likewise.
608
609 * fr30-desc.c: Regenerated.
610 * fr30-desc.h: Regenerated.
611 * fr30-dis.c: Regenerated.
612 * fr30-opc.c: Regenerated.
613 * fr30-opc.h: Regenerated.
614 * frv-desc.c: Regenerated.
615 * frv-dis.c: Regenerated.
616 * frv-opc.c: Regenerated.
617 * ip2k-asm.c: Regenerated.
618 * ip2k-desc.c: Regenerated.
619 * ip2k-desc.h: Regenerated.
620 * ip2k-dis.c: Regenerated.
621 * ip2k-opc.c: Regenerated.
622 * ip2k-opc.h: Regenerated.
623 * iq2000-desc.c: Regenerated.
624 * iq2000-dis.c: Regenerated.
625 * iq2000-opc.c: Regenerated.
626 * m32r-asm.c: Regenerated.
627 * m32r-desc.c: Regenerated.
628 * m32r-desc.h: Regenerated.
629 * m32r-dis.c: Regenerated.
630 * m32r-opc.c: Regenerated.
631 * m32r-opc.h: Regenerated.
632 * m32r-opinst.c: Regenerated.
633 * openrisc-desc.c: Regenerated.
634 * openrisc-desc.h: Regenerated.
635 * openrisc-dis.c: Regenerated.
636 * openrisc-opc.c: Regenerated.
637 * openrisc-opc.h: Regenerated.
638 * xstormy16-desc.c: Regenerated.
639 * xstormy16-desc.h: Regenerated.
640 * xstormy16-dis.c: Regenerated.
641 * xstormy16-opc.c: Regenerated.
642 * xstormy16-opc.h: Regenerated.
643
d6098898
L		 6442005-02-14 H.J. Lu <hongjiu.lu@intel.com>
645
646 * dis-buf.c (perror_memory): Use sprintf_vma to print out
647 address.
648
5a84f3e0
NC		 6492005-02-11 Nick Clifton <nickc@redhat.com>
650
bc18c937
NC		 651 * iq2000-asm.c: Regenerate.
652
5a84f3e0
NC		 653 * frv-dis.c: Regenerate.
654
0a40490e
JB		 6552005-02-07 Jim Blandy <jimb@redhat.com>
656
657 * Makefile.am (CGEN): Load guile.scm before calling the main
658 application script.
659 * Makefile.in: Regenerated.
660 * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
661 Simply pass the cgen-opc.scm path to ${cgen} as its first
662 argument; ${cgen} itself now contains the '-s', or whatever is
663 appropriate for the Scheme being used.
664
c46f8c51
AC		 6652005-01-31 Andrew Cagney <cagney@gnu.org>
666
667 * configure: Regenerate to track ../gettext.m4.
668
60b9a617
JB		 6692005-01-31 Jan Beulich <jbeulich@novell.com>
670
671 * ia64-gen.c (NELEMS): Define.
672 (shrink): Generate alias with missing second predicate register when
673 opcode has two outputs and these are both predicates.
674 * ia64-opc-i.c (FULL17): Define.
675 (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
676 here to generate output template.
677 (TBITCM, TNATCM): Undefine after use.
678 * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
679 first input. Add ld16 aliases without ar.csd as second output. Add
680 st16 aliases without ar.csd as second input. Add cmpxchg aliases
681 without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
682 ar.ccv as third/fourth inputs. Consolidate through...
683 (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
684 CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
685 * ia64-asmtab.c: Regenerate.
686
a53bf506
AC		 6872005-01-27 Andrew Cagney <cagney@gnu.org>
688
689 * configure: Regenerate to track ../gettext.m4 change.
690
90219bd0
AO		 6912005-01-25 Alexandre Oliva <aoliva@redhat.com>
692
693 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
694 * frv-asm.c: Rebuilt.
695 * frv-desc.c: Rebuilt.
696 * frv-desc.h: Rebuilt.
697 * frv-dis.c: Rebuilt.
698 * frv-ibld.c: Rebuilt.
699 * frv-opc.c: Rebuilt.
700 * frv-opc.h: Rebuilt.
701
45181ed1
AC		 7022005-01-24 Andrew Cagney <cagney@gnu.org>
703
704 * configure: Regenerate, ../gettext.m4 was updated.
705
9e836e3d
FF		 7062005-01-21 Fred Fish <fnf@specifixinc.com>
707
708 * mips-opc.c: Change INSN_ALIAS to INSN2_ALIAS.
709 Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
710 Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
711 * mips-dis.c: Ditto.
712
5e8cb021
AM		 7132005-01-20 Alan Modra <amodra@bigpond.net.au>
714
715 * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
716
986e18a5
FF		 7172005-01-19 Fred Fish <fnf@specifixinc.com>
718
719 * mips-dis.c (no_aliases): New disassembly option flag.
720 (set_default_mips_dis_options): Init no_aliases to zero.
721 (parse_mips_dis_option): Handle no-aliases option.
722 (print_insn_mips): Ignore table entries that are aliases
723 if no_aliases is set.
724 (print_insn_mips16): Ditto.
725 * mips-opc.c (mips_builtin_opcodes): Add initializer column for
726 new pinfo2 member and add INSN_ALIAS initializers as needed. Also
727 move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
728 * mips16-opc.c (mips16_opcodes): Ditto.
729
e38bc3b5
NC		 7302005-01-17 Andrew Stubbs <andrew.stubbs@st.com>
731
732 * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
733 (inheritance diagram): Add missing edge.
734 (arch_sh1_up): Rename arch_sh_up to match external name to make life
735 easier for the testsuite.
736 (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
737 (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
610ad19b 738 (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
e38bc3b5
NC		 739 arch_sh2a_or_sh4_up child.
740 (sh_table): Do renaming as above.
741 Correct comment for ldc.l for gas testsuite to read.
742 Remove rogue mul.l from sh1 (duplicate of the one for sh2).
743 Correct comments for movy.w and movy.l for gas testsuite to read.
744 Correct comments for fmov.d and fmov.s for gas testsuite to read.
745
9df48ba9
L		 7462005-01-12 H.J. Lu <hongjiu.lu@intel.com>
747
748 * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
749
2033b4b9
L		 7502005-01-12 H.J. Lu <hongjiu.lu@intel.com>
751
752 * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
753
0bcb06d2
AS		 7542005-01-10 Andreas Schwab <schwab@suse.de>
755
756 * disassemble.c (disassemble_init_for_target) <case
757 bfd_arch_ia64>: Set skip_zeroes to 16.
758 <case bfd_arch_tic4x>: Set skip_zeroes to 32.
759
47add74d
TL		 7602004-12-23 Tomer Levi <Tomer.Levi@nsc.com>
761
762 * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
763
246f4c05
SS		 7642004-12-14 Svein E. Seldal <Svein.Seldal@solidas.com>
765
766 * avr-dis.c: Prettyprint. Added printing of symbol names in all
767 memory references. Convert avr_operand() to C90 formatting.
768
0e1200e5
TL		 7692004-12-05 Tomer Levi <Tomer.Levi@nsc.com>
770
771 * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
772
89a649f7
TL		 7732004-11-29 Tomer Levi <Tomer.Levi@nsc.com>
774
775 * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
776 (no_op_insn): Initialize array with instructions that have no
777 operands.
778 * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
779
6255809c
RE		 7802004-11-29 Richard Earnshaw <rearnsha@arm.com>
781
782 * arm-dis.c: Correct top-level comment.
783
2fbad815
RE		 7842004-11-27 Richard Earnshaw <rearnsha@arm.com>
785
786 * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
787 architecuture defining the insn.
788 (arm_opcodes, thumb_opcodes): Delete. Move to ...
6b8725b9
RE		 789 * arm-dis.c (arm_opcodes, thumb_opcodes): Here. Add architecutre
790 field.
2fbad815
RE		 791 Also include opcode/arm.h.
792 * Makefile.am (arm-dis.lo): Update dependency list.
793 * Makefile.in: Regenerate.
794
d81acc42
NC		 7952004-11-22 Ravi Ramaseshan <ravi.ramaseshan@codito.com>
796
797 * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
798 reflect the change to the short immediate syntax.
799
ca4f2377
AM		 8002004-11-19 Alan Modra <amodra@bigpond.net.au>
801
5da8bf1b
AM		 802 * or32-opc.c (debug): Warning fix.
803 * po/POTFILES.in: Regenerate.
804
ca4f2377
AM		 805 * maxq-dis.c: Formatting.
806 (print_insn): Warning fix.
807
b7693d02
DJ		 8082004-11-17 Daniel Jacobowitz <dan@codesourcery.com>
809
810 * arm-dis.c (WORD_ADDRESS): Define.
811 (print_insn): Use it. Correct big-endian end-of-section handling.
812
300dac7e
NC		 8132004-11-08 Inderpreet Singh <inderpreetb@nioda.hcltech.com>
814 Vineet Sharma <vineets@noida.hcltech.com>
815
816 * maxq-dis.c: New file.
817 * disassemble.c (ARCH_maxq): Define.
610ad19b 818 (disassembler): Add 'print_insn_maxq_little' for handling maxq
300dac7e
NC		 819 instructions..
820 * configure.in: Add case for bfd_maxq_arch.
821 * configure: Regenerate.
822 * Makefile.am: Add support for maxq-dis.c
823 * Makefile.in: Regenerate.
824 * aclocal.m4: Regenerate.
825
42048ee7
TL		 8262004-11-05 Tomer Levi <Tomer.Levi@nsc.com>
827
828 * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
829 mode.
830 * crx-dis.c: Likewise.
831
bd21e58e
HPN		 8322004-11-04 Hans-Peter Nilsson <hp@axis.com>
833
834 Generally, handle CRISv32.
835 * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
836 (struct cris_disasm_data): New type.
837 (format_reg, format_hex, cris_constraint, print_flags)
838 (get_opcode_entry): Add struct cris_disasm_data * parameter. All
839 callers changed.
840 (format_sup_reg, print_insn_crisv32_with_register_prefix)
841 (print_insn_crisv32_without_register_prefix)
842 (print_insn_crisv10_v32_with_register_prefix)
843 (print_insn_crisv10_v32_without_register_prefix)
844 (cris_parse_disassembler_options): New functions.
845 (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
846 parameter. All callers changed.
847 (get_opcode_entry): Call malloc, not xmalloc. Return NULL on
848 failure.
849 (cris_constraint) <case 'Y', 'U'>: New cases.
850 (bytes_to_skip): Handle 'Y' and 'N' as 's'. Skip size is 4 bytes
851 for constraint 'n'.
852 (print_with_operands) <case 'Y'>: New case.
853 (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
854 <case 'N', 'Y', 'Q'>: New cases.
855 (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
856 (print_insn_cris_with_register_prefix)
857 (print_insn_cris_without_register_prefix): Call
858 cris_parse_disassembler_options.
859 * cris-opc.c (cris_spec_regs): Mention that this table isn't used
860 for CRISv32 and the size of immediate operands. New v32-only
861 entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
862 spc. Add v32-only 4-byte entries for p2, p3, p5 and p6. Change
863 ccr, ibr, irp to be v0..v10. Change bar, dccr to be v8..v10.
864 Change brp to be v3..v10.
865 (cris_support_regs): New vector.
866 (cris_opcodes): Update head comment. New format characters '[',
867 ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
868 Add new opcodes for v32 and adjust existing opcodes to accommodate
869 differences to earlier variants.
870 (cris_cond15s): New vector.
871
9306ca4a
JB		 8722004-11-04 Jan Beulich <jbeulich@novell.com>
873
874 * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
875 (indirEb): Remove.
876 (Mp): Use f_mode rather than none at all.
877 (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
878 replaces what previously was x_mode; x_mode now means 128-bit SSE
879 operands.
880 (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
881 mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
882 pinsrw's second operand is Edqw.
883 (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
884 operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
885 fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
886 mode when an operand size override is present or always suffixing.
887 More instructions will need to be added to this group.
888 (putop): Handle new macro chars 'C' (short/long suffix selector),
889 'I' (Intel mode override for following macro char), and 'J' (for
890 adding the 'l' prefix to far branches in AT&T mode). When an
891 alternative was specified in the template, honor macro character when
892 specified for Intel mode.
893 (OP_E): Handle new *_mode values. Correct pointer specifications for
894 memory operands. Consolidate output of index register.
895 (OP_G): Handle new *_mode values.
896 (OP_I): Handle const_1_mode.
897 (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
898 respective opcode prefix bits have been consumed.
899 (OP_EM, OP_EX): Provide some default handling for generating pointer
900 specifications.
901
f39c96a9
TL		 9022004-10-28 Tomer Levi <Tomer.Levi@nsc.com>
903
904 * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
905 COP_INST macro.
906
812337be
TL		 9072004-10-27 Tomer Levi <Tomer.Levi@nsc.com>
908
909 * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
910 (getregliststring): Support HI/LO and user registers.
610ad19b 911 * crx-opc.c (crx_instruction): Update data structure according to the
812337be
TL		 912 rearrangement done in CRX opcode header file.
913 (crx_regtab): Likewise.
914 (crx_optab): Likewise.
610ad19b 915 (crx_instruction): Reorder load/stor instructions, remove unsupported
812337be
TL		 916 formats.
917 support new Co-Processor instruction 'cpi'.
918
4030fa5a
NC		 9192004-10-27 Nick Clifton <nickc@redhat.com>
920
921 * opcodes/iq2000-asm.c: Regenerate.
922 * opcodes/iq2000-desc.c: Regenerate.
923 * opcodes/iq2000-desc.h: Regenerate.
924 * opcodes/iq2000-dis.c: Regenerate.
925 * opcodes/iq2000-ibld.c: Regenerate.
926 * opcodes/iq2000-opc.c: Regenerate.
927 * opcodes/iq2000-opc.h: Regenerate.
928
fc3d45e8
TL		 9292004-10-21 Tomer Levi <Tomer.Levi@nsc.com>
930
931 * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
932 us4, us5 (respectively).
933 Remove unsupported 'popa' instruction.
934 Reverse operands order in store co-processor instructions.
935
3c55da70
AM		 9362004-10-15 Alan Modra <amodra@bigpond.net.au>
937
938 * Makefile.am: Run "make dep-am"
939 * Makefile.in: Regenerate.
940
7fa3d080
BW		 9412004-10-12 Bob Wilson <bob.wilson@acm.org>
942
943 * xtensa-dis.c: Use ISO C90 formatting.
944
e612bb4d
AM		 9452004-10-09 Alan Modra <amodra@bigpond.net.au>
946
947 * ppc-opc.c: Revert 2004-09-09 change.
948
43cd72b9
BW		 9492004-10-07 Bob Wilson <bob.wilson@acm.org>
950
951 * xtensa-dis.c (state_names): Delete.
952 (fetch_data): Use xtensa_isa_maxlength.
953 (print_xtensa_operand): Replace operand parameter with opcode/operand
954 pair. Remove print_sr_name parameter. Use new xtensa-isa.h functions.
955 (print_insn_xtensa): Use new xtensa-isa.h functions. Handle multislot
956 instruction bundles. Use xmalloc instead of malloc.
957
bbac1f2a
NC		 9582004-10-07 David Gibson <david@gibson.dropbear.id.au>
959
960 * ppc-opc.c: Replace literal "0"s with NULLs in pointer
961 initializers.
962
48c9f030
NC		 9632004-10-07 Tomer Levi <Tomer.Levi@nsc.com>
964
965 * crx-opc.c (crx_instruction): Support Co-processor insns.
966 * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
967 (getregliststring): Change function to use the above enum.
968 (print_arg): Handle CO-Processor insns.
969 (crx_cinvs): Add 'b' option to invalidate the branch-target
970 cache.
971
12c64a4e
AH		 9722004-10-06 Aldy Hernandez <aldyh@redhat.com>
973
974 * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
975 efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
976 efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
977 efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
978 efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
979
14127cc4
NC		 9802004-10-01 Bill Farmer <Bill@the-farmers.freeserve.co.uk>
981
982 * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
983 rather than add it.
984
0dd132b6
NC		 9852004-09-30 Paul Brook <paul@codesourcery.com>
986
987 * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
988 * arm-opc.h: Document %e. Add ARMv6ZK instructions.
989
3f85e526
L		 9902004-09-17 H.J. Lu <hongjiu.lu@intel.com>
991
992 * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
993 (CONFIG_STATUS_DEPENDENCIES): New.
994 (Makefile): Removed.
995 (config.status): Likewise.
996 * Makefile.in: Regenerated.
997
8ae85421
AM		 9982004-09-17 Alan Modra <amodra@bigpond.net.au>
999
1000 * Makefile.am: Run "make dep-am".
1001 * Makefile.in: Regenerate.
1002 * aclocal.m4: Regenerate.
1003 * configure: Regenerate.
1004 * po/POTFILES.in: Regenerate.
1005 * po/opcodes.pot: Regenerate.
1006
24443139
AS		 10072004-09-11 Andreas Schwab <schwab@suse.de>
1008
1009 * configure: Rebuild.
1010
2a309db0
AM		 10112004-09-09 Segher Boessenkool <segher@kernel.crashing.org>
1012
1013 * ppc-opc.c (L): Make this field not optional.
1014
42851540
NC		 10152004-09-03 Tomer Levi <Tomer.Levi@nsc.com>
1016
1017 * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
1018 Fix parameter to 'm[t|f]csr' insns.
1019
979273e3
NN		 10202004-08-30 Nathanael Nerode <neroden@gcc.gnu.org>
1021
1022 * configure.in: Autoupdate to autoconf 2.59.
1023 * aclocal.m4: Rebuild with aclocal 1.4p6.
1024 * configure: Rebuild with autoconf 2.59.
1025 * Makefile.in: Rebuild with automake 1.4p6 (picking up
1026 bfd changes for autoconf 2.59 on the way).
1027 * config.in: Rebuild with autoheader 2.59.
1028
ac28a1cb
RS		 10292004-08-27 Richard Sandiford <rsandifo@redhat.com>
1030
1031 * frv-desc.[ch], frv-opc.[ch]: Regenerated.
1032
30d1c836
ML		 10332004-07-30 Michal Ludvig <mludvig@suse.cz>
1034
1035 * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
1036 (GRPPADLCK2): New define.
1037 (twobyte_has_modrm): True for 0xA6.
1038 (grps): GRPPADLCK2 for opcode 0xA6.
1039
0b0ac059
AO		 10402004-07-29 Alexandre Oliva <aoliva@redhat.com>
1041
1042 Introduce SH2a support.
1043 * sh-opc.h (arch_sh2a_base): Renumber.
1044 (arch_sh2a_nofpu_base): Remove.
1045 (arch_sh_base_mask): Adjust.
1046 (arch_opann_mask): New.
1047 (arch_sh2a, arch_sh2a_nofpu): Adjust.
1048 (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
1049 (sh_table): Adjust whitespace.
1050 2004-02-24 Corinna Vinschen <vinschen@redhat.com>
1051 * sh-opc.h (arch_sh2a_nofpu_up): New. Use instead of arch_sh2a_up in
1052 instruction list throughout.
1053 (arch_sh2a_up): Redefine to include fpu instruction set. Use instead
1054 of arch_sh2a in instruction list throughout.
1055 (arch_sh2e_up): Accomodate above changes.
1056 (arch_sh2_up): Ditto.
1057 2004-02-20 Corinna Vinschen <vinschen@redhat.com>
1058 * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
1059 2004-02-18 Corinna Vinschen <vinschen@redhat.com>
1060 * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
1061 * sh-opc.h (arch_sh2a_nofpu): New.
1062 (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
1063 (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
1064 instruction.
1065 2004-01-20 DJ Delorie <dj@redhat.com>
1066 * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
1067 2003-12-29 DJ Delorie <dj@redhat.com>
1068 * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
1069 sh_opcode_info, sh_table): Add sh2a support.
1070 (arch_op32): New, to tag 32-bit opcodes.
1071 * sh-dis.c (print_insn_sh): Support sh2a opcodes.
1072 2003-12-02 Michael Snyder <msnyder@redhat.com>
1073 * sh-opc.h (arch_sh2a): Add.
1074 * sh-dis.c (arch_sh2a): Handle.
1075 * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
1076
670ec21d
NC		 10772004-07-27 Tomer Levi <Tomer.Levi@nsc.com>
1078
1079 * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
1080
ed049af3
NC		 10812004-07-22 Nick Clifton <nickc@redhat.com>
1082
1083 PR/280
1084 * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
1085 insns - this is done by objdump itself.
1086 * h8500-dis.c (print_insn_h8500): Likewise.
1087
20f0a1fc
NC		 10882004-07-21 Jan Beulich <jbeulich@novell.com>
1089
1090 * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
1091 regardless of address size prefix in effect.
1092 (ptr_reg): Size or address registers does not depend on rex64, but
1093 on the presence of an address size override.
1094 (OP_MMX): Use rex.x only for xmm registers.
1095 (OP_EM): Use rex.z only for xmm registers.
1096
6f14957b
MR		 10972004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
1098
1099 * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
1100 move/branch operations to the bottom so that VR5400 multimedia
1101 instructions take precedence in disassembly.
1102
1586d91e
MR		 11032004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
1104
1105 * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
1106 ISA-specific "break" encoding.
1107
982de27a
NC		 11082004-07-13 Elvis Chiang <elvisfb@gmail.com>
1109
1110 * arm-opc.h: Fix typo in comment.
1111
4300ab10
AS		 11122004-07-11 Andreas Schwab <schwab@suse.de>
1113
1114 * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
1115
8577e690
AS		 11162004-07-09 Andreas Schwab <schwab@suse.de>
1117
1118 * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
1119
1fe1f39c
NC		 11202004-07-07 Tomer Levi <Tomer.Levi@nsc.com>
1121
1122 * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
1123 (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
1124 (crx-dis.lo): New target.
1125 (crx-opc.lo): Likewise.
1126 * Makefile.in: Regenerate.
1127 * configure.in: Handle bfd_crx_arch.
1128 * configure: Regenerate.
1129 * crx-dis.c: New file.
1130 * crx-opc.c: New file.
1131 * disassemble.c (ARCH_crx): Define.
1132 (disassembler): Handle ARCH_crx.
1133
7a33b495
JW		 11342004-06-29 James E Wilson <wilson@specifixinc.com>
1135
1136 * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
1137 * ia64-asmtab.c: Regnerate.
1138
98e69875
AM		 11392004-06-28 Alan Modra <amodra@bigpond.net.au>
1140
1141 * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
1142 (extract_fxm): Don't test dialect.
1143 (XFXFXM_MASK): Include the power4 bit.
1144 (XFXM): Add p4 param.
1145 (powerpc_opcodes): Add mfocrf and mtocrf. Adjust mtcr.
1146
a53b85e2
AO		 11472004-06-27 Alexandre Oliva <aoliva@redhat.com>
1148
1149 2003-07-21 Richard Sandiford <rsandifo@redhat.com>
1150 * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
1151
d0618d1c
AM		 11522004-06-26 Alan Modra <amodra@bigpond.net.au>
1153
1154 * ppc-opc.c (BH, XLBH_MASK): Define.
1155 (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
1156
1d9f512f
AM		 11572004-06-24 Alan Modra <amodra@bigpond.net.au>
1158
1159 * i386-dis.c (x_mode): Comment.
1160 (two_source_ops): File scope.
1161 (float_mem): Correct fisttpll and fistpll.
1162 (float_mem_mode): New table.
1163 (dofloat): Use it.
1164 (OP_E): Correct intel mode PTR output.
1165 (ptr_reg): Use open_char and close_char.
1166 (PNI_Fixup): Handle possible suffix on sidt. Use op1out etc. for
1167 operands. Set two_source_ops.
1168
52886d70
AM		 11692004-06-15 Alan Modra <amodra@bigpond.net.au>
1170
1171 * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
1172 instead of _raw_size.
1173
bad9ceea
JJ		 11742004-06-08 Jakub Jelinek <jakub@redhat.com>
1175
1176 * ia64-gen.c (in_iclass): Handle more postinc st
1177 and ld variants.
1178 * ia64-asmtab.c: Rebuilt.
1179
0451f5df
MS		 11802004-06-01 Martin Schwidefsky <schwidefsky@de.ibm.com>
1181
1182 * s390-opc.txt: Correct architecture mask for some opcodes.
1183 lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
1184 in the esa mode as well.
1185
f6f9408f
JR		 11862004-05-28 Andrew Stubbs <andrew.stubbs@superh.com>
1187
1188 * sh-dis.c (target_arch): Make unsigned.
1189 (print_insn_sh): Replace (most of) switch with a call to
1190 sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
1191 * sh-opc.h: Redefine architecture flags values.
1192 Add sh3-nommu architecture.
1193 Reorganise <arch>_up macros so they make more visual sense.
1194 (SH_MERGE_ARCH_SET): Define new macro.
1195 (SH_VALID_BASE_ARCH_SET): Likewise.
1196 (SH_VALID_MMU_ARCH_SET): Likewise.
1197 (SH_VALID_CO_ARCH_SET): Likewise.
1198 (SH_VALID_ARCH_SET): Likewise.
1199 (SH_MERGE_ARCH_SET_VALID): Likewise.
1200 (SH_ARCH_SET_HAS_FPU): Likewise.
1201 (SH_ARCH_SET_HAS_DSP): Likewise.
1202 (SH_ARCH_UNKNOWN_ARCH): Likewise.
1203 (sh_get_arch_from_bfd_mach): Add prototype.
1204 (sh_get_arch_up_from_bfd_mach): Likewise.
1205 (sh_get_bfd_mach_from_arch_set): Likewise.
1206 (sh_merge_bfd_arc): Likewise.
1207
be8c092b
NC		 12082004-05-24 Peter Barada <peter@the-baradas.com>
1209
1210 * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
610ad19b
AM		 1211 into new match_insn_m68k function. Loop over canidate
1212 matches and select first that completely matches.
be8c092b
NC		 1213 * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
1214 * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
610ad19b 1215 to verify addressing for MAC/EMAC.
be8c092b
NC		 1216 * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
1217 reigster halves since 'fpu' and 'spl' look misleading.
1218 * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
1219 * m68k-opc.c: Rearragne mac/emac cases to use longest for
1220 first, tighten up match masks.
1221 * m68k-opc.c: Add 'size' field to struct m68k_opcode. Produce
1222 'size' from special case code in print_insn_m68k to
1223 determine decode size of insns.
1224
a30e9cc4
AM		 12252004-05-19 Alan Modra <amodra@bigpond.net.au>
1226
1227 * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
1228 well as when -mpower4.
1229
9598fbe5
NC		 12302004-05-13 Nick Clifton <nickc@redhat.com>
1231
1232 * po/fr.po: Updated French translation.
1233
6b6e92f4
NC		 12342004-05-05 Peter Barada <peter@the-baradas.com>
1235
1236 * m68k-dis.c(print_insn_m68k): Add new chips, use core
1237 variants in arch_mask. Only set m68881/68851 for 68k chips.
1238 * m68k-op.c: Switch from ColdFire chips to core variants.
1239
a404d431
AM		 12402004-05-05 Alan Modra <amodra@bigpond.net.au>
1241
a30e9cc4 1242 PR 147.
a404d431
AM		 1243 * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
1244
f3806e43
BE		 12452004-04-29 Ben Elliston <bje@au.ibm.com>
1246
520ceea4
BE		 1247 * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
1248 (powerpc_opcodes): Add "dbczl" instruction for PPC970.
f3806e43 1249
1f1799d5
KK		 12502004-04-22 Kaz Kojima <kkojima@rr.iij4u.or.jp>
1251
1252 * sh-dis.c (print_insn_sh): Print the value in constant pool
1253 as a symbol if it looks like a symbol.
1254
fd99574b
NC		 12552004-04-22 Peter Barada <peter@the-baradas.com>
1256
1257 * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
1258 appropriate ColdFire architectures.
1259 (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
1260 mask addressing.
1261 Add EMAC instructions, fix MAC instructions. Remove
1262 macmw/macml/msacmw/msacml instructions since mask addressing now
1263 supported.
1264
b4781d44
JJ		 12652004-04-20 Jakub Jelinek <jakub@redhat.com>
1266
1267 * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
1268 (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
1269 suffix. Use fmov*x macros, create all 3 fpsize variants in one
1270 macro. Adjust all users.
1271
91809fda 12722004-04-15 Anil Paranjpe <anilp1@kpitcummins.com>
610ad19b 1273
91809fda
NC		 1274 * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
1275 separately.
1276
f4453dfa
NC		 12772004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
1278
1279 * m32r-asm.c: Regenerate.
1280
9b0de91a
SS		 12812004-03-29 Stan Shebs <shebs@apple.com>
1282
1283 * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
1284 used.
1285
e20c0b3d
AM		 12862004-03-19 Alan Modra <amodra@bigpond.net.au>
1287
1288 * aclocal.m4: Regenerate.
1289 * config.in: Regenerate.
1290 * configure: Regenerate.
1291 * po/POTFILES.in: Regenerate.
1292 * po/opcodes.pot: Regenerate.
1293
fdd12ef3
AM		 12942004-03-16 Alan Modra <amodra@bigpond.net.au>
1295
1296 * ppc-dis.c (print_insn_powerpc): Don't print tabs. Handle
1297 PPC_OPERANDS_GPR_0.
1298 * ppc-opc.c (RA0): Define.
1299 (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
1300 (RAOPT): Rename from RAO. Update all uses.
a9c3619e 1301 (powerpc_opcodes): Use RA0 as appropriate.
fdd12ef3 1302
2dc111b3 13032004-03-15 Aldy Hernandez <aldyh@redhat.com>
fdd12ef3
AM		 1304
1305 * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
2dc111b3 1306
7bfeee7b
AM		 13072004-03-15 Alan Modra <amodra@bigpond.net.au>
1308
1309 * sparc-dis.c (print_insn_sparc): Update getword prototype.
1310
7ffdda93
ML		 13112004-03-12 Michal Ludvig <mludvig@suse.cz>
1312
1313 * i386-dis.c (GRPPLOCK): Delete.
7bfeee7b 1314 (grps): Delete GRPPLOCK entry.
7ffdda93 1315
cc0ec051
AM		 13162004-03-12 Alan Modra <amodra@bigpond.net.au>
1317
1318 * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1319 (M, Mp): Use OP_M.
1320 (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1321 (GRPPADLCK): Define.
1322 (dis386): Use NOP_Fixup on "nop".
1323 (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1324 (twobyte_has_modrm): Set for 0xa7.
1325 (padlock_table): Delete. Move to..
1326 (grps): ..here, using OP_0f07. Use OP_Ofae on lfence, mfence
1327 and clflush.
1328 (print_insn): Revert PADLOCK_SPECIAL code.
1329 (OP_E): Delete sfence, lfence, mfence checks.
1330
4fd61dcb
JJ		 13312004-03-12 Jakub Jelinek <jakub@redhat.com>
1332
1333 * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1334 (INVLPG_Fixup): New function.
1335 (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1336
0f10071e
ML		 13372004-03-12 Michal Ludvig <mludvig@suse.cz>
1338
1339 * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1340 (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1341 (padlock_table): New struct with PadLock instructions.
1342 (print_insn): Handle PADLOCK_SPECIAL.
1343
c02908d2
AM		 13442004-03-12 Alan Modra <amodra@bigpond.net.au>
1345
1346 * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1347 (OP_E): Twiddle clflush to sfence here.
1348
d5bb7600
NC		 13492004-03-08 Nick Clifton <nickc@redhat.com>
1350
1351 * po/de.po: Updated German translation.
1352
ae51a426
JR		 13532003-03-03 Andrew Stubbs <andrew.stubbs@superh.com>
1354
1355 * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1356 nofpu mode. Add BFD type bfd_mach_sh4_nommu_nofpu.
1357 * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1358 accordingly.
1359
676a64f4
RS		 13602004-03-01 Richard Sandiford <rsandifo@redhat.com>
1361
1362 * frv-asm.c: Regenerate.
1363 * frv-desc.c: Regenerate.
1364 * frv-desc.h: Regenerate.
1365 * frv-dis.c: Regenerate.
1366 * frv-ibld.c: Regenerate.
1367 * frv-opc.c: Regenerate.
1368 * frv-opc.h: Regenerate.
1369
c7a48b9a
RS		 13702004-03-01 Richard Sandiford <rsandifo@redhat.com>
1371
1372 * frv-desc.c, frv-opc.c: Regenerate.
1373
8ae0baa2
RS		 13742004-03-01 Richard Sandiford <rsandifo@redhat.com>
1375
1376 * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1377
ce11586c
JR		 13782004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1379
1380 * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1381 Also correct mistake in the comment.
1382
6a5709a5
JR		 13832004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1384
1385 * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1386 ensure that double registers have even numbers.
1387 Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1388 that reserved instruction 0xfffd does not decode the same
1389 as 0xfdfd (ftrv).
1390 * sh-opc.h: Add REG_N_D nibble type and use it whereever
1391 REG_N refers to a double register.
1392 Add REG_N_B01 nibble type and use it instead of REG_NM
1393 in ftrv.
1394 Adjust the bit patterns in a few comments.
1395
e5d2b64f 13962004-02-25 Aldy Hernandez <aldyh@redhat.com>
7bfeee7b
AM		 1397
1398 * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
e5d2b64f 1399
1f04b05f
AH		 14002004-02-20 Aldy Hernandez <aldyh@redhat.com>
1401
1402 * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1403
2f3b8700
AH		 14042004-02-20 Aldy Hernandez <aldyh@redhat.com>
1405
1406 * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1407
f0b26da6 14082004-02-20 Aldy Hernandez <aldyh@redhat.com>
7bfeee7b
AM		 1409
1410 * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1411 mtivor32, mtivor33, mtivor34.
f0b26da6 1412
23d59c56 14132004-02-19 Aldy Hernandez <aldyh@redhat.com>
7bfeee7b
AM		 1414
1415 * ppc-opc.c (powerpc_opcodes): Add mfmcar.
23d59c56 1416
34920d91
NC		 14172004-02-10 Petko Manolov <petkan@nucleusys.com>
1418
1419 * arm-opc.h Maverick accumulator register opcode fixes.
1420
44d86481
BE		 14212004-02-13 Ben Elliston <bje@wasabisystems.com>
1422
1423 * m32r-dis.c: Regenerate.
1424
17707c23
MS		 14252004-01-27 Michael Snyder <msnyder@redhat.com>
1426
1427 * sh-opc.h (sh_table): "fsrra", not "fssra".
1428
fe3a9bc4
NC		 14292004-01-23 Andrew Over <andrew.over@cs.anu.edu.au>
1430
1431 * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1432 contraints.
1433
ff24f124
JJ		 14342004-01-19 Andrew Over <andrew.over@cs.anu.edu.au>
1435
1436 * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1437
a02a862a
AM		 14382004-01-19 Alan Modra <amodra@bigpond.net.au>
1439
1440 * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1441 1. Don't print scale factor on AT&T mode when index missing.
1442
d164ea7f
AO		 14432004-01-16 Alexandre Oliva <aoliva@redhat.com>
1444
1445 * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1446 when loaded into XR registers.
1447
cb10e79a
RS		 14482004-01-14 Richard Sandiford <rsandifo@redhat.com>
1449
1450 * frv-desc.h: Regenerate.
1451 * frv-desc.c: Regenerate.
1452 * frv-opc.c: Regenerate.
1453
f532f3fa
MS		 14542004-01-13 Michael Snyder <msnyder@redhat.com>
1455
1456 * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1457
e45d0630
PB		 14582004-01-09 Paul Brook <paul@codesourcery.com>
1459
1460 * arm-opc.h (arm_opcodes): Move generic mcrr after known
1461 specific opcodes.
1462
3ba7a1aa
DJ		 14632004-01-07 Daniel Jacobowitz <drow@mvista.com>
1464
1465 * Makefile.am (libopcodes_la_DEPENDENCIES)
1466 (libopcodes_la_LIBADD): Revert 2003-05-17 change. Add explanatory
1467 comment about the problem.
1468 * Makefile.in: Regenerate.
1469
ba2d3f07
AO		 14702004-01-06 Alexandre Oliva <aoliva@redhat.com>
1471
1472 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
1473 * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1474 cut&paste errors in shifting/truncating numerical operands.
1475 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1476 * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1477 (parse_uslo16): Likewise.
1478 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1479 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1480 (parse_s12): Likewise.
1481 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1482 * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1483 (parse_uslo16): Likewise.
1484 (parse_uhi16): Parse gothi and gotfuncdeschi.
1485 (parse_d12): Parse got12 and gotfuncdesc12.
1486 (parse_s12): Likewise.
1487
3ab48931
NC		 14882004-01-02 Albert Bartoszko <albar@nt.kegel.com.pl>
1489
1490 * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1491 instruction which looks similar to an 'rla' instruction.
a0bd404e 1492
c9e214e5 1493For older changes see ChangeLog-0203
252b5132
RH		 1494\f
1495Local Variables:
2f6d2f85
NC		 1496mode: change-log
1497left-margin: 8
1498fill-column: 74
252b5132
RH		 1499version-control: never
1500End:
GDB Binutils - Deliverables
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