* Makefile.in: Regenerate.
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
9a2e615a
NS
12007-04-23 Nathan Sidwell <nathan@codesourcery.com>
2
3 * m68k-opc.c: Mark mcfisa_c instructions.
4
37b37b2d
RE
52007-04-21 Richard Earnshaw <rearnsha@arm.com>
6
7 * arm-dis.c (arm_opcodes): Disassemble to unified syntax.
8 (thumb_opcodes): Add missing white space in adr.
9 (arm_decode_shift): New parameter, print_shift. Only decode the
10 shift parameter if set. Adjust callers.
11 (print_insn_arm): Support for operand type q with no shift decode.
12
717bbdf1
AM
132007-04-21 Alan Modra <amodra@bigpond.net.au>
14
db557034
AM
15 * i386-opc.c (i386_float_regtab, i386_float_regtab_size): Delete.
16 Move contents to..
17 (i386_regtab): ..here.
18 * i386-opc.h (i386_float_regtab, i386_float_regtab_size): Delete.
19
717bbdf1
AM
20 * ppc-opc.c (powerpc_operands): Delete duplicate entries.
21 (BA_MASK, FXM_MASK, STRM_MASK, VA_MASK, VB_MASK, VC_MASK): Delete.
22 (VD_MASK, WS_MASK, MTMSRD_L, XRT_L): Delete.
23 (powerpc_opcodes): Replace uses of MTMSRD_L and XRT_L.
24
78336706
NS
252007-04-20 Nathan Sidwell <nathan@codesourcery.com>
26
27 * m68k-dis.c (print_insn_arg): Show c04 as rambar0 and c05 as
28 rambar1.
29
b84bf58a
AM
302007-04-20 Alan Modra <amodra@bigpond.net.au>
31
32 * ppc-dis.c (print_insn_powerpc): Adjust for struct powerpc_operand
33 change.
34 * ppc-opc.c (powerpc_operands): Replace bit count with bit mask
35 in all entries. Add PPC_OPERAND_SIGNED to DE entry. Remove
36 references to following deleted functions.
37 (insert_bd, extract_bd, insert_dq, extract_dq): Delete.
38 (insert_ds, extract_ds, insert_de, extract_de): Delete.
39 (insert_des, extract_des, insert_li, extract_li): Delete.
40 (insert_nb, insert_rsq, insert_rtq, insert_ev2, extract_ev2): Delete.
41 (insert_ev4, extract_ev4, insert_ev8, extract_ev8): Delete.
42 (num_powerpc_operands): New constant.
43 (XSPRG_MASK): Remove entire SPRG field.
44 (powerpc_opcodes <bcctre, bcctrel>): Use XLBB_MASK not XLYBB_MASK.
45
0bbdef92
AM
462007-04-20 Alan Modra <amodra@bigpond.net.au>
47
48 * ppc-opc.c (DCM, DGM, TE, RMC, R, SP, S): Correct shift.
49 (Z2_MASK): Define.
50 (powerpc_opcodes): Use Z2_MASK in all insns taking RMC operand.
51
86ad2a13
RE
522007-04-20 Richard Earnshaw <rearnsha@arm.com>
53
54 * arm-dis.c (print_insn): Only look for a mapping symbol in the section
55 being disassembled.
56
a33e055d
AM
572007-04-19 Alan Modra <amodra@bigpond.net.au>
58
59 * Makefile.am: Run "make dep-am".
60 * Makefile.in: Regenerate.
61 * po/POTFILES.in: Regenerate.
62
360b1600
AM
632007-04-19 Alan Modra <amodra@bigpond.net.au>
64
65 * ppc-opc.c (powerpc_opcodes): Add cctpl, cctpm, cctph, db8cyc,
66 db10cyc, db12cyc, db16cyc.
67
b20ae55e
AM
682007-04-19 Nathan Froyd <froydnj@codesourcery.com>
69
70 * ppc-opc.c (powerpc_opcodes): Recognize three-operand tlbsxe.
71
381d071f
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722007-04-18 H.J. Lu <hongjiu.lu@intel.com>
73
74 * i386-dis.c (CRC32_Fixup): New.
75 (PREGRP85, PREGRP86, PREGRP87, PREGRP88, PREGRP89, PREGRP90,
76 PREGRP91): New.
77 (threebyte_0x38_uses_DATA_prefix): Updated for SSE4.2.
78 (threebyte_0x3a_uses_DATA_prefix): Likewise.
79 (prefix_user_table): Add PREGRP85, PREGRP86, PREGRP87,
80 PREGRP88, PREGRP89, PREGRP90 and PREGRP91.
81 (three_byte_table): Likewise.
82
83 * i386-opc.c (i386_optab): Add SSE4.2 opcodes.
84
f6fdceb7 85 * i386-opc.h (CpuSSE4_2): New.
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86 (CpuSSE4): Likewise.
87 (CpuUnknownFlags): Add CpuSSE4_2.
88
42903f7f
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892007-04-18 H.J. Lu <hongjiu.lu@intel.com>
90
91 * i386-dis.c (XMM_Fixup): New.
92 (Edqb): New.
93 (Edqd): New.
94 (XMM0): New.
95 (dqb_mode): New.
96 (dqd_mode): New.
97 (PREGRP39 ... PREGRP85): New.
98 (threebyte_0x38_uses_DATA_prefix): Updated for SSE4.
99 (threebyte_0x3a_uses_DATA_prefix): Likewise.
100 (prefix_user_table): Add PREGRP39 ... PREGRP85.
101 (three_byte_table): Likewise.
102 (putop): Handle 'K'.
103 (intel_operand_size): Handle dqb_mode, dqd_mode):
104 (OP_E): Likewise.
105 (OP_G): Likewise.
106
107 * i386-opc.c (i386_optab): Add SSE4.1 opcodes.
108
109 * i386-opc.h (CpuSSE4_1): New.
110 (CpuUnknownFlags): Add CpuSSE4_1.
111 (regKludge): Update comment.
112
ee5c21a0
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1132007-04-18 Matthias Klose <doko@ubuntu.com>
114
115 * Makefile.am (libopcodes_la_LDFLAGS): Use bfd soversion.
116 * Makefile.in: Regenerate.
117
b7d19ba6
SE
1182007-04-14 Steve Ellcey <sje@cup.hp.com>
119
120 * Makefile.am: Add ACLOCAL_AMFLAGS.
121 * Makefile.in: Regenerate.
122
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1232007-04-13 H.J. Lu <hongjiu.lu@intel.com>
124
125 * i386-dis.c: Remove trailing white spaces.
6e26e51a
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126 * i386-opc.c: Likewise.
127 * i386-opc.h: Likewise.
246c51aa 128
7967e09e
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1292007-04-11 H.J. Lu <hongjiu.lu@intel.com>
130
131 PR binutils/4333
132 * i386-dis.c (GRP1a): New.
133 (GRP1b ... GRPPADLCK2): Update index.
134 (dis386): Use GRP1a for entry 0x8f.
135 (mod, rm, reg): Removed. Replaced by ...
136 (modrm): This.
137 (grps): Add GRP1a.
138
56dc1f8a
KH
1392007-04-09 Kazu Hirata <kazu@codesourcery.com>
140
141 * m68k-dis.c (print_insn_m68k): Restore info->fprintf_func and
142 info->print_address_func if longjmp is called.
143
144f4bc6
DD
1442007-03-29 DJ Delorie <dj@redhat.com>
145
146 * m32c-desc.c: Regenerate.
147 * m32c-dis.c: Regenerate.
148 * m32c-opc.c: Regenerate.
149
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1502007-03-28 H.J. Lu <hongjiu.lu@intel.com>
151
152 * i386-opc.c (i386_optab): Change InvMem to RegMem for mov and
153 movq. Remove InvMem from sldt, smsw and str.
154
155 * i386-opc.h (InvMem): Renamed to ...
156 (RegMem): Update comments.
157 (AnyMem): Remove InvMem.
158
831480e9 1592007-03-27 Paul Brook <paul@codesourcery.com>
b74ed8f5 160
b74ed8f5
PB
161 * arm-dis.c (thumb_opcodes): Add entry for undefined insns (0xbe??).
162
4146fd53
PB
1632007-03-24 Paul Brook <paul@codesourcery.com>
164
165 * arm-dis.c (coprocessor_opcodes): Remove superfluous 0x.
166 (print_insn_coprocessor): Handle %<bitfield>x.
167
b6702015 1682007-03-24 Paul Brook <paul@codesourcery.com>
e72cf3ec 169 Mark Shinwell <shinwell@codesourcery.com>
b6702015
PB
170
171 * arm-dis.c (arm_opcodes): Print SRS base register.
172
831480e9 1732007-03-23 H.J. Lu <hongjiu.lu@intel.com>
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174
175 * i386-dis.c (prefix_name): Replace rex64XYZ with rex.WRXB.
176
177 * i386-opc.c (i386_optab): Add rex.wrxb.
178
831480e9 1792007-03-21 H.J. Lu <hongjiu.lu@intel.com>
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L
180
181 * i386-dis.c (REX_MODE64): Remove definition.
182 (REX_EXTX): Likewise.
183 (REX_EXTY): Likewise.
184 (REX_EXTZ): Likewise.
185 (USED_REX): Use REX_OPCODE instead of 0x40.
186 Replace REX_MODE64, REX_EXTX, REX_EXTY and REX_EXTZ with REX_W,
187 REX_R, REX_X and REX_B respectively.
188
831480e9 1892007-03-21 H.J. Lu <hongjiu.lu@intel.com>
8b38ad71
L
190
191 PR binutils/4218
192 * i386-dis.c (PREGRP38): New.
193 (dis386): Use PREGRP38 for 0x90.
194 (prefix_user_table): Add PREGRP38.
195 (print_insn): Set uses_REPZ_prefix to 1 for pause.
196 (NOP_Fixup1): Properly handle REX bits.
197 (NOP_Fixup2): Likewise.
198
199 * i386-opc.c (i386_optab): Allow %eax with xchg in 64bit.
200 Allow register with nop.
201
75b06e7b
DD
2022007-03-20 DJ Delorie <dj@redhat.com>
203
204 * m32c-asm.c: Regenerate.
205 * m32c-desc.c: Regenerate.
206 * m32c-desc.h: Regenerate.
207 * m32c-dis.h: Regenerate.
208 * m32c-ibld.c: Regenerate.
209 * m32c-opc.c: Regenerate.
210 * m32c-opc.h: Regenerate.
211
c3fe08fa
L
2122007-03-15 H.J. Lu <hongjiu.lu@intel.com>
213
214 * i386-opc.c: Include "libiberty.h".
215 (i386_regtab): Remove the last entry.
216 (i386_regtab_size): New.
217 (i386_float_regtab_size): Likewise.
218
219 * i386-opc.h (i386_regtab_size): New.
220 (i386_float_regtab_size): Likewise.
221
0b1cf022
L
2222007-03-15 H.J. Lu <hongjiu.lu@intel.com>
223
224 * Makefile.am (CFILES): Add i386-opc.c.
225 (ALL_MACHINES): Add i386-opc.lo.
226 Run "make dep-am".
227 * Makefile.in: Regenerated.
228
229 * configure.in: Add i386-opc.lo for bfd_i386_arch.
230 * configure: Regenerated.
231
232 * i386-dis.c: Include "opcode/i386.h".
233 (MAXLEN): Renamed to MAX_MNEM_SIZE. Remove definition.
234 (FWAIT_OPCODE): Remove definition.
235 (UNIXWARE_COMPAT): Renamed to SYSV386_COMPAT. Remove definition.
236 (MAX_OPERANDS): Remove definition.
237
238 * i386-opc.c: New file.
239 * i386-opc.h: Likewise.
240
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L
2412007-03-15 H.J. Lu <hongjiu.lu@intel.com>
242
243 * Makefile.in: Regenerated.
244
6f74c397
L
2452007-03-09 H.J. Lu <hongjiu.lu@intel.com>
246
247 * i386-dis.c (OP_Rd): Renamed to ...
248 (OP_R): This.
249 (Rd): Updated.
250 (Rm): Likewise.
251
a6d04ec4
AM
2522007-03-08 Alan Modra <amodra@bigpond.net.au>
253
1620f33d
AM
254 * fr30-asm.c: Regenerate.
255 * frv-asm.c: Regenerate.
256 * ip2k-asm.c: Regenerate.
257 * iq2000-asm.c: Regenerate.
258 * m32c-asm.c: Regenerate.
259 * m32r-asm.c: Regenerate.
260 * m32r-dis.c: Regenerate.
261 * mt-asm.c: Regenerate.
262 * mt-ibld.c: Regenerate.
263 * mt-opc.c: Regenerate.
264 * openrisc-asm.c: Regenerate.
265 * xc16x-asm.c: Regenerate.
266 * xstormy16-asm.c: Regenerate.
267
a6d04ec4
AM
268 * Makefile.am: Run "make dep-am".
269 * Makefile.in: Regenerate.
270 * po/POTFILES.in: Regenerate.
271
b5639b37
MS
2722007-03-06 Andreas Krebbel <krebbel1@de.ibm.com>
273
274 * opcodes/s390-opc.c (INSTR_RRE_FR, INSTR_RRF_F0FF2, INSTR_RRF_F0FR,
275 INSTR_RRF_UUFF, INSTR_RRF_0UFF, INSTR_RRF_FFFU, INSTR_RRR_F0FF): New
276 instruction formats added.
277 (MASK_RRE_FR, MASK_RRF_F0FF2, MASK_RRF_F0FR, MASK_RRF_UUFF,
278 MASK_RRF_0UFF, MASK_RRF_FFFU, MASK_RRR_F0FF): New instruction format
279 masks added.
280 * opcodes/s390-opc.txt (lpdfr - tgxt): Decimal floating point
281 instructions added.
282 * opcodes/s390-mkopc.c (s390_opcode_cpu_val): S390_OPCODE_Z9_EC added.
283 (main): z9-ec cpu type option added.
284 * include/opcode/s390.h (s390_opcode_cpu_val): S390_OPCODE_Z9_EC added.
285
b2e818b7
DD
2862007-02-22 DJ Delorie <dj@redhat.com>
287
288 * s390-opc.c (INSTR_SS_L2RDRD): New.
289 (MASK_SS_L2RDRD): New.
290 * s390-opc.txt (pka): Use it.
291
8b082fb1
TS
2922007-02-20 Thiemo Seufer <ths@mips.com>
293 Chao-Ying Fu <fu@mips.com>
294
295 * mips-dis.c (mips_arch_choices): Add DSP R2 support.
296 (print_insn_args): Add support for balign instruction.
297 * mips-opc.c (D33): New shortcut for DSP R2 instructions.
298 (mips_builtin_opcodes): Add DSP R2 instructions.
299
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MS
3002007-02-19 Andreas Krebbel <krebbel1@de.ibm.com>
301
302 * s390-opc.c (INSTR_RRF_U0FR, MASK_RRF_U0FR): Removed.
303 (INSTR_RRF_U0RF, MASK_RRF_U0RF): Added.
304 * s390-opc.txt (cfxbr, cfdbr, cfebr, cgebr, cgdbr, cgxbr, cger, cgdr,
305 cgxr, cfxr, cfdr, cfer): Instruction type set to INSTR_RRF_U0RF.
306
b8e55848
MS
3072007-02-19 Andreas Krebbel <krebbel1@de.ibm.com>
308
309 * s390-opc.txt ("efpc", "sfpc"): Set to RRE_RR_OPT instruction type.
310 * s390-opc.c (s390_operands): Add RO_28 as optional gpr.
311 (INSTR_RRE_RR_OPT, MASK_RRE_RR_OPT): New instruction type for efpc
312 and sfpc.
313
af692060
NC
3142007-02-16 Nick Clifton <nickc@redhat.com>
315
316 PR binutils/4045
317 * avr-dis.c (comment_start): New variable, contains the prefix to
318 use when printing addresses in comments.
319 (print_insn_avr): Set comment_start to an empty space if there is
320 no symbol table available as the generic address printing code
321 will prefix the numeric value of the address with 0x.
322
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3232007-02-13 H.J. Lu <hongjiu.lu@intel.com>
324
325 * i386-dis.c: Updated to use an array of MAX_OPERANDS operands
326 in struct dis386.
327
bd2f2e55 3282007-02-05 Dave Brolley <brolley@redhat.com>
8c9c183d
DB
329 Richard Sandiford <rsandifo@redhat.com>
330 DJ Delorie <dj@redhat.com>
331 Graydon Hoare <graydon@redhat.com>
332 Frank Ch. Eigler <fche@redhat.com>
333 Ben Elliston <bje@redhat.com>
334
335 * Makefile.am (HFILES): Add mep-desc.h mep-opc.h.
336 (CFILES): Add mep-*.c
337 (ALL_MACHINES): Add mep-*.lo.
338 (CLEANFILES): Add stamp-mep.
339 (CGEN_CPUS): Add mep.
340 (MEP_DEPS): New variable.
341 (mep-*): New targets.
342 * configure.in: Handle bfd_mep_arch.
343 * disassemble.c (ARCH_mep): New macro.
344 (disassembler): Handle bfd_arch_mep.
345 (disassemble_init_for_target): Likewise.
346 * mep-*: New files for Toshiba Media Processor (MeP).
bd2f2e55
DB
347 * Makefile.in: Regenerated.
348 * configure: Regenerated.
349
eb7834a6 3502007-02-05 H.J. Lu <hongjiu.lu@intel.com>
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351
352 * i386-dis.c (OP_J): Undo the last change. Properly handle 64K
353 wrap around within the same segment in 16bit mode.
354
eb7834a6 3552007-02-02 H.J. Lu <hongjiu.lu@intel.com>
206717e8
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356
357 * i386-dis.c (OP_J): Mask to 16bit only if there is a data16
358 prefix.
359
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3602007-02-02 H.J. Lu <hongjiu.lu@intel.com>
361
362 * avr-dis.c (avr_operand): Correct PR number in comment.
363
fc523535 3642007-02-02 H.J. Lu <hongjiu.lu@intel.com>
f59a29b9
L
365
366 * disassemble.c (disassembler_usage): Call
367 print_i386_disassembler_options for i386 disassembler.
368
369 * i386-dis.c (print_i386_disassembler_options): New.
370 (print_insn): Support the new addr64 option.
371
64a3a6fc
NC
3722007-02-02 Hiroki Kaminaga <kaminaga@sm.sony.co.jp>
373
374 * ppc-dis.c (powerpc_dialect): Handle ppc440.
375 * ppc-dis.c (print_ppc_disassembler_options): Note the -M440 can
376 be used.
377
ba4e851b
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3782007-02-02 Alan Modra <amodra@bigpond.net.au>
379
380 * ppc-opc.c (insert_bdm): -Many comment.
381 (valid_bo): Add "extract" param. Accept both powerpc and power4
382 BO fields when disassembling with -Many.
383 (insert_bo, extract_bo, insert_boe, extract_boe): Adjust valid_bo call.
384
3bdcfdf4
KH
3852007-01-08 Kazu Hirata <kazu@codesourcery.com>
386
387 * m68k-opc.c (m68k_opcodes): Replace cpu32 with
388 cpu32 | fido_a except on tbl instructions.
389
a028a6f5
PB
3902007-01-04 Paul Brook <paul@codesourcery.com>
391
392 * arm-dis.c (arm_opcodes): Fix cpsie and cpsid entries.
393
baee4c9e
AS
3942007-01-04 Andreas Schwab <schwab@suse.de>
395
396 * m68k-opc.c: Fix encoding of signed bit in the cpu32 tbls insns.
397
62ac925e
JB
3982007-01-04 Julian Brown <julian@codesourcery.com>
399
400 * arm-dis.c (neon_opcode): Fix disassembly for vshl, vqshl, vrshl,
401 vqrshl instructions.
402
10a2343e 403For older changes see ChangeLog-2006
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404\f
405Local Variables:
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406mode: change-log
407left-margin: 8
408fill-column: 74
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409version-control: never
410End:
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