[deliverable/binutils-gdb.git] / opcodes / ChangeLog

2006-04-28  Thiemo Seufer  <ths@mips.com>
            Nigel Stevens  <nigel@mips.com>

	* mips-dis.c (print_insn_args): Print $fcc only for FP
	instructions, use $cc elsewise.

2006-04-28  Thiemo Seufer  <ths@mips.com>
            Nigel Stevens  <nigel@mips.com>

	* opcodes/mips-dis.c (mips16_to_32_reg_map, mips16_reg_names):
	Map MIPS16 registers to O32 names.
	(print_mips16_insn_arg): Use mips16_reg_names.

2006-04-26  Julian Brown  <julian@codesourcery.com>

	* arm-dis.c (print_insn_neon): Disassemble floating-point constant
	VMOV.

2006-04-26  Nathan Sidwell  <nathan@codesourcery.com>
	    Julian Brown  <julian@codesourcery.com>

	* opcodes/arm-dis.c (coprocessor_opcodes): Add %A, %B, %k, convert
	%<code>[zy] into %[zy]<code>.  Expand meaning of %<bitfield>['`?].
	Add unified load/store instruction names.
	(neon_opcode_table): New.
	(arm_opcodes): Expand meaning of %<bitfield>['`?].
	(arm_decode_bitfield): New.
	(print_insn_coprocessor): Add pc argument. Add %A & %B specifiers.
	Use arm_decode_bitfield and adjust numeric specifiers. Adjust %z & %y.
	(print_insn_neon): New.
	(print_insn_arm): Adjust print_insn_coprocessor call. Call
	print_insn_neon. Use arm_decode_bitfield and adjust numeric specifiers.
	(print_insn_thumb32): Likewise.

2006-04-19  Alan Modra  <amodra@bigpond.net.au>

	* Makefile.am: Run "make dep-am".
	* Makefile.in: Regenerate.

2006-04-19  Alan Modra  <amodra@bigpond.net.au>

	* avr-dis.c (avr_operand): Warning fix.

	* configure: Regenerate.

2006-04-16  Daniel Jacobowitz  <dan@codesourcery.com>

	* po/POTFILES.in: Regenerated.

2006-04-12   Hochstein  <hochstein@algo.informatik.tu-darmstadt.de>

	PR binutils/2454
	* avr-dis.c (avr_operand): Arrange for a comment to appear before
	the symolic form of an address, so that the output of objdump -d
	can be reassembled.

2006-04-10  DJ Delorie  <dj@redhat.com>

	* m32c-asm.c: Regenerate.

2006-04-06  Carlos O'Donell  <carlos@codesourcery.com>

	* Makefile.am: Add install-html target.
	* Makefile.in: Regenerate.

2006-04-06  Nick Clifton  <nickc@redhat.com>

	* po/vi/po: Updated Vietnamese translation.

2006-03-31  Paul Koning  <ni1d@arrl.net>

	* pdp11-opc.c (pdp11_opcodes): Fix opcode for SEC instruction.

2006-03-16  Bernd Schmidt  <bernd.schmidt@analog.com>

	* bfin-dis.c (decode_dsp32shiftimm_0): Simplify and correct the
	logic to identify halfword shifts.

2006-03-16  Paul Brook  <paul@codesourcery.com>

	* arm-dis.c (arm_opcodes): Rename swi to svc.
	(thumb_opcodes): Ditto.

2006-03-13  DJ Delorie  <dj@redhat.com>

	* m32c-asm.c: Regenerate.
	* m32c-desc.c: Likewise.
	* m32c-desc.h: Likewise.
	* m32c-dis.c: Likewise.
	* m32c-ibld.c: Likewise.
	* m32c-opc.c: Likewise.
	* m32c-opc.h: Likewise.

2006-03-10  DJ Delorie  <dj@redhat.com>

	* m32c-desc.c: Regenerate with mul.l, mulu.l.
	* m32c-opc.c: Likewise.
	* m32c-opc.h: Likewise.


2006-03-09  Nick Clifton  <nickc@redhat.com>

	* po/sv.po: Updated Swedish translation.

2006-03-07  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/2428
	* i386-dis.c (REP_Fixup): New function.
	(AL): Remove duplicate.
	(Xbr): New.
	(Xvr): Likewise.
	(Ybr): Likewise.
	(Yvr): Likewise.
	(indirDXr): Likewise.
	(ALr): Likewise.
	(eAXr): Likewise.
	(dis386): Updated entries of ins, outs, movs, lods and stos.

2006-03-05  Nick Clifton  <nickc@redhat.com>

	* cgen-ibld.in (insert_normal): Cope with attempts to insert a
	signed 32-bit value into an unsigned 32-bit field when the host is
	a 64-bit machine.
	* fr30-ibld.c: Regenerate.
	* frv-ibld.c: Regenerate.
	* ip2k-ibld.c: Regenerate.
	* iq2000-asm.c: Regenerate.
	* iq2000-ibld.c: Regenerate.
	* m32c-ibld.c: Regenerate.
	* m32r-ibld.c: Regenerate.
	* openrisc-ibld.c: Regenerate.
	* xc16x-ibld.c: Regenerate.
	* xstormy16-ibld.c: Regenerate.

2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)

	* xc16x-asm.c: Regenerate.
	* xc16x-dis.c: Regenerate.

2006-02-27  Carlos O'Donell  <carlos@codesourcery.com>

	* po/Make-in: Add html target.

2006-02-27  H.J. Lu <hongjiu.lu@intel.com>

	* i386-dis.c (IS_3BYTE_OPCODE): New for 3-byte opcodes used by
	Intel Merom New Instructions.
	(THREE_BYTE_0): Likewise.
	(THREE_BYTE_1): Likewise.
	(three_byte_table): Likewise.
	(dis386_twobyte): Use THREE_BYTE_0 for entry 0x38. Use
	THREE_BYTE_1 for entry 0x3a.
	(twobyte_has_modrm): Updated.
	(twobyte_uses_SSE_prefix): Likewise.
	(print_insn): Handle 3-byte opcodes used by Intel Merom New
	Instructions.

2006-02-24  David S. Miller  <davem@sunset.davemloft.net>

	* sparc-dis.c (v9_priv_reg_names): Add "gl" entry.
	(v9_hpriv_reg_names): New table.
	(print_insn_sparc): Allow values up to 16 for '?' and '!'.
	New cases '$' and '%' for read/write hyperprivileged register.
	* sparc-opc.c (sparc_opcodes): Add new entries for UA2005
	window handling and rdhpr/wrhpr instructions.
	
2006-02-24  DJ Delorie  <dj@redhat.com>

	* m32c-desc.c: Regenerate with linker relaxation attributes.
	* m32c-desc.h: Likewise.
	* m32c-dis.c: Likewise.
	* m32c-opc.c: Likewise.

2006-02-24  Paul Brook  <paul@codesourcery.com>

	* arm-dis.c (arm_opcodes): Add V7 instructions.
	(thumb32_opcodes): Ditto.  Handle V7M MSR/MRS variants.
	(print_arm_address): New function.
	(print_insn_arm): Use it.  Add 'P' and 'U' cases.
	(psr_name): New function.
	(print_insn_thumb32): Add 'U', 'C' and 'D' cases.

2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>

	* ia64-opc-i.c (bXc): New.
	(mXc): Likewise.
	(OpX2TaTbYaXcC): Likewise.
	(TF). Likewise.
	(TFCM). Likewise.
	(ia64_opcodes_i): Add instructions for tf.

	* ia64-opc.h (IMMU5b): New.

	* ia64-asmtab.c: Regenerated.

2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>

	* ia64-gen.c: Update copyright years.
	* ia64-opc-b.c: Likewise.

2006-02-22  H.J. Lu  <hongjiu.lu@intel.com>

	* ia64-gen.c (lookup_regindex): Handle ".vm".
	(print_dependency_table): Handle '\"'.

	* ia64-ic.tbl: Updated from SDM 2.2.
	* ia64-raw.tbl: Likewise.
	* ia64-waw.tbl: Likewise.
	* ia64-asmtab.c: Regenerated.

	* ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.

2006-02-17  Shrirang Khisti  <shrirangk@kpitcummins.com>
            Anil Paranjape   <anilp1@kpitcummins.com>
            Shilin Shakti    <shilins@kpitcummins.com>

	* xc16x-desc.h: New file
	* xc16x-desc.c: New file
	* xc16x-opc.h: New file	
	* xc16x-opc.c: New file
	* xc16x-ibld.c: New file
	* xc16x-asm.c: New file
	* xc16x-dis.c: New file
	* Makefile.am: Entries for xc16x 
	* Makefile.in: Regenerate 
	* cofigure.in: Add xc16x target information.
	* configure: Regenerate.
	* disassemble.c: Add xc16x target information.

2006-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (dis386_twobyte): Use "movZ" for debug register
	moves.

2006-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c ('Z'): Add a new macro.
	(dis386_twobyte): Use "movZ" for control register moves.

2006-02-10  Nick Clifton  <nickc@redhat.com>

	* iq2000-asm.c: Regenerate.

2006-02-07  Nathan Sidwell  <nathan@codesourcery.com>

	* m68k-dis.c (print_insn_m68k): Use bfd_m68k_mach_to_features.

2006-01-26  David Ung  <davidu@mips.com>

	* mips-opc.c: Add I33 masks to these MIPS32R2 instructions: prefx,
	ceil.l.d, ceil.l.s, cvt.d.l, cvt.l.d, cvt.l.s, cvt.s.l, floor.l.d,
	floor.l.s, ldxc1, lwxc1, madd.d, madd.s, msub.d, msub.s, nmadd.d,
	nmadd.s, nmsub.d, nmsub.s, recip.d, recip.s, round.l.d, rsqrt.d,
	rsqrt.s, sdxc1, swxc1, trunc.l.d, trunc.l.s.

2006-01-18  Arnold Metselaar  <arnoldm@sourceware.org>

	* z80-dis.c (struct buffer, prt_d, prt_d_n, arit_d, ld_r_d,
	ld_d_r, pref_xd_cb): Use signed char to hold data to be
	disassembled.	
	* z80-dis.c (TXTSIZ): Increase buffer size to 24, this fixes
	buffer overflows when disassembling instructions like
	ld (ix+123),0x23
	* z80-dis.c (opc_ind, pref_xd_cb): Suppress '+' in an indexed
	operand, if the offset is negative.

2006-01-17  Arnold Metselaar  <arnoldm@sourceware.org>

	* z80-dis.c (struct buffer, prt_d, prt_d_n, pref_xd_cb): Use
	unsigned char to hold data to be disassembled.

2006-01-17  Andreas Schwab  <schwab@suse.de>

	PR binutils/1486
	* disassemble.c (disassemble_init_for_target): Set
	disassembler_needs_relocs for bfd_arch_arm.

2006-01-16  Paul Brook  <paul@codesourcery.com>

	* m68k-opc.c (m68k_opcodes): Fix opcodes for ColdFire f?abss,
	f?add?, and f?sub? instructions.

2006-01-16  Nick Clifton  <nickc@redhat.com>

	* po/zh_CN.po: New Chinese (simplified) translation.
	* configure.in (ALL_LINGUAS): Add "zh_CH".
	* configure: Regenerate.

2006-01-05  Paul Brook  <paul@codesourcery.com>

	* m68k-opc.c (m68k_opcodes): Add missing ColdFire fdsqrtd entry.

2006-01-06  DJ Delorie  <dj@redhat.com>

	* m32c-desc.c: Regenerate.
	* m32c-opc.c: Regenerate.
	* m32c-opc.h: Regenerate.

2006-01-03  DJ Delorie  <dj@redhat.com>

	* cgen-ibld.in (extract_normal): Avoid memory range errors.
	* m32c-ibld.c: Regenerated.

For older changes see ChangeLog-2005
\f
Local Variables:
mode: change-log
left-margin: 8
fill-column: 74
version-control: never
End:
Commit	Line	Data
0d09bfe6 TS	1	2006-04-28 Thiemo Seufer <ths@mips.com>
	2	Nigel Stevens <nigel@mips.com>
	3
	4	* mips-dis.c (print_insn_args): Print $fcc only for FP
	5	instructions, use $cc elsewise.
	6
654c225a TS	7	2006-04-28 Thiemo Seufer <ths@mips.com>
	8	Nigel Stevens <nigel@mips.com>
	9
	10	* opcodes/mips-dis.c (mips16_to_32_reg_map, mips16_reg_names):
	11	Map MIPS16 registers to O32 names.
	12	(print_mips16_insn_arg): Use mips16_reg_names.
	13
0dbde4cf JB	14	2006-04-26 Julian Brown <julian@codesourcery.com>
	15
	16	* arm-dis.c (print_insn_neon): Disassemble floating-point constant
	17	VMOV.
	18
16980d0b JB	19	2006-04-26 Nathan Sidwell <nathan@codesourcery.com>
	20	Julian Brown <julian@codesourcery.com>
	21
	22	* opcodes/arm-dis.c (coprocessor_opcodes): Add %A, %B, %k, convert
	23	%<code>[zy] into %[zy]<code>. Expand meaning of %<bitfield>['`?].
	24	Add unified load/store instruction names.
	25	(neon_opcode_table): New.
	26	(arm_opcodes): Expand meaning of %<bitfield>['`?].
	27	(arm_decode_bitfield): New.
	28	(print_insn_coprocessor): Add pc argument. Add %A & %B specifiers.
	29	Use arm_decode_bitfield and adjust numeric specifiers. Adjust %z & %y.
	30	(print_insn_neon): New.
	31	(print_insn_arm): Adjust print_insn_coprocessor call. Call
	32	print_insn_neon. Use arm_decode_bitfield and adjust numeric specifiers.
	33	(print_insn_thumb32): Likewise.
	34
ec3fcc56 AM	35	2006-04-19 Alan Modra <amodra@bigpond.net.au>
	36
	37	* Makefile.am: Run "make dep-am".
	38	* Makefile.in: Regenerate.
	39
241a6c40 AM	40	2006-04-19 Alan Modra <amodra@bigpond.net.au>
241a6c40 AM	41
7c6646cd AM	42	* avr-dis.c (avr_operand): Warning fix.
7c6646cd AM	43
241a6c40 AM	44	* configure: Regenerate.
241a6c40 AM	45
e7403566 DJ	46	2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
	47
	48	* po/POTFILES.in: Regenerated.
	49
52f16a0e NC	50	2006-04-12 Hochstein <hochstein@algo.informatik.tu-darmstadt.de>
	51
	52	PR binutils/2454
	53	* avr-dis.c (avr_operand): Arrange for a comment to appear before
	54	the symolic form of an address, so that the output of objdump -d
	55	can be reassembled.
	56
e78efa90 DD	57	2006-04-10 DJ Delorie <dj@redhat.com>
	58
	59	* m32c-asm.c: Regenerate.
	60
108a6f8e CD	61	2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
	62
	63	* Makefile.am: Add install-html target.
	64	* Makefile.in: Regenerate.
	65
a135cb2c NC	66	2006-04-06 Nick Clifton <nickc@redhat.com>
	67
	68	* po/vi/po: Updated Vietnamese translation.
	69
47426b41 AM	70	2006-03-31 Paul Koning <ni1d@arrl.net>
	71
	72	* pdp11-opc.c (pdp11_opcodes): Fix opcode for SEC instruction.
	73
331f1cbe BS	74	2006-03-16 Bernd Schmidt <bernd.schmidt@analog.com>
	75
	76	* bfin-dis.c (decode_dsp32shiftimm_0): Simplify and correct the
	77	logic to identify halfword shifts.
	78
c16d2bf0 PB	79	2006-03-16 Paul Brook <paul@codesourcery.com>
	80
	81	* arm-dis.c (arm_opcodes): Rename swi to svc.
	82	(thumb_opcodes): Ditto.
	83
5348b81e DD	84	2006-03-13 DJ Delorie <dj@redhat.com>
5348b81e DD	85
5398310a DD	86	* m32c-asm.c: Regenerate.
	87	* m32c-desc.c: Likewise.
	88	* m32c-desc.h: Likewise.
	89	* m32c-dis.c: Likewise.
	90	* m32c-ibld.c: Likewise.
5348b81e DD	91	* m32c-opc.c: Likewise.
	92	* m32c-opc.h: Likewise.
	93
253d272c DD	94	2006-03-10 DJ Delorie <dj@redhat.com>
	95
	96	* m32c-desc.c: Regenerate with mul.l, mulu.l.
	97	* m32c-opc.c: Likewise.
	98	* m32c-opc.h: Likewise.
	99
	100
f530741d NC	101	2006-03-09 Nick Clifton <nickc@redhat.com>
	102
	103	* po/sv.po: Updated Swedish translation.
	104
35c52694 L	105	2006-03-07 H.J. Lu <hongjiu.lu@intel.com>
	106
	107	PR binutils/2428
	108	* i386-dis.c (REP_Fixup): New function.
	109	(AL): Remove duplicate.
	110	(Xbr): New.
	111	(Xvr): Likewise.
	112	(Ybr): Likewise.
	113	(Yvr): Likewise.
	114	(indirDXr): Likewise.
	115	(ALr): Likewise.
	116	(eAXr): Likewise.
	117	(dis386): Updated entries of ins, outs, movs, lods and stos.
	118
ed963e2d NC	119	2006-03-05 Nick Clifton <nickc@redhat.com>
	120
	121	* cgen-ibld.in (insert_normal): Cope with attempts to insert a
	122	signed 32-bit value into an unsigned 32-bit field when the host is
	123	a 64-bit machine.
	124	* fr30-ibld.c: Regenerate.
	125	* frv-ibld.c: Regenerate.
	126	* ip2k-ibld.c: Regenerate.
	127	* iq2000-asm.c: Regenerate.
	128	* iq2000-ibld.c: Regenerate.
	129	* m32c-ibld.c: Regenerate.
	130	* m32r-ibld.c: Regenerate.
	131	* openrisc-ibld.c: Regenerate.
	132	* xc16x-ibld.c: Regenerate.
	133	* xstormy16-ibld.c: Regenerate.
	134
c7d41dc5 NC	135	2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
	136
	137	* xc16x-asm.c: Regenerate.
	138	* xc16x-dis.c: Regenerate.
c7d41dc5	139
f7d9e5c3 CD	140	2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
	141
	142	* po/Make-in: Add html target.
	143
331d2d0d L	144	2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
	145
	146	* i386-dis.c (IS_3BYTE_OPCODE): New for 3-byte opcodes used by
	147	Intel Merom New Instructions.
	148	(THREE_BYTE_0): Likewise.
	149	(THREE_BYTE_1): Likewise.
	150	(three_byte_table): Likewise.
	151	(dis386_twobyte): Use THREE_BYTE_0 for entry 0x38. Use
	152	THREE_BYTE_1 for entry 0x3a.
	153	(twobyte_has_modrm): Updated.
	154	(twobyte_uses_SSE_prefix): Likewise.
	155	(print_insn): Handle 3-byte opcodes used by Intel Merom New
	156	Instructions.
	157
ff3f9d5b DM	158	2006-02-24 David S. Miller <davem@sunset.davemloft.net>
	159
	160	* sparc-dis.c (v9_priv_reg_names): Add "gl" entry.
	161	(v9_hpriv_reg_names): New table.
	162	(print_insn_sparc): Allow values up to 16 for '?' and '!'.
	163	New cases '$' and '%' for read/write hyperprivileged register.
	164	* sparc-opc.c (sparc_opcodes): Add new entries for UA2005
	165	window handling and rdhpr/wrhpr instructions.
	166
6772dd07 DD	167	2006-02-24 DJ Delorie <dj@redhat.com>
	168
	169	* m32c-desc.c: Regenerate with linker relaxation attributes.
	170	* m32c-desc.h: Likewise.
	171	* m32c-dis.c: Likewise.
	172	* m32c-opc.c: Likewise.
	173
62b3e311 PB	174	2006-02-24 Paul Brook <paul@codesourcery.com>
	175
	176	* arm-dis.c (arm_opcodes): Add V7 instructions.
	177	(thumb32_opcodes): Ditto. Handle V7M MSR/MRS variants.
	178	(print_arm_address): New function.
	179	(print_insn_arm): Use it. Add 'P' and 'U' cases.
	180	(psr_name): New function.
	181	(print_insn_thumb32): Add 'U', 'C' and 'D' cases.
	182
59cf82fe L	183	2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
	184
	185	* ia64-opc-i.c (bXc): New.
	186	(mXc): Likewise.
	187	(OpX2TaTbYaXcC): Likewise.
	188	(TF). Likewise.
	189	(TFCM). Likewise.
	190	(ia64_opcodes_i): Add instructions for tf.
	191
	192	* ia64-opc.h (IMMU5b): New.
	193
	194	* ia64-asmtab.c: Regenerated.
	195
19a7219f L	196	2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
	197
	198	* ia64-gen.c: Update copyright years.
	199	* ia64-opc-b.c: Likewise.
	200
7f3dfb9c L	201	2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
	202
	203	* ia64-gen.c (lookup_regindex): Handle ".vm".
	204	(print_dependency_table): Handle '\"'.
	205
	206	* ia64-ic.tbl: Updated from SDM 2.2.
	207	* ia64-raw.tbl: Likewise.
	208	* ia64-waw.tbl: Likewise.
	209	* ia64-asmtab.c: Regenerated.
	210
	211	* ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.
	212
d70c5fc7 NC	213	2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
	214	Anil Paranjape <anilp1@kpitcummins.com>
	215	Shilin Shakti <shilins@kpitcummins.com>
	216
	217	* xc16x-desc.h: New file
	218	* xc16x-desc.c: New file
	219	* xc16x-opc.h: New file
	220	* xc16x-opc.c: New file
	221	* xc16x-ibld.c: New file
	222	* xc16x-asm.c: New file
	223	* xc16x-dis.c: New file
	224	* Makefile.am: Entries for xc16x
	225	* Makefile.in: Regenerate
	226	* cofigure.in: Add xc16x target information.
	227	* configure: Regenerate.
	228	* disassemble.c: Add xc16x target information.
	229
a1cfb73e L	230	2006-02-11 H.J. Lu <hongjiu.lu@intel.com>
	231
	232	* i386-dis.c (dis386_twobyte): Use "movZ" for debug register
	233	moves.
	234
6dd5059a L	235	2006-02-11 H.J. Lu <hongjiu.lu@intel.com>
	236
	237	* i386-dis.c ('Z'): Add a new macro.
	238	(dis386_twobyte): Use "movZ" for control register moves.
	239
8536c657 NC	240	2006-02-10 Nick Clifton <nickc@redhat.com>
	241
	242	* iq2000-asm.c: Regenerate.
	243
266abb8f NS	244	2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
	245
	246	* m68k-dis.c (print_insn_m68k): Use bfd_m68k_mach_to_features.
	247
f1a64f49 DU	248	2006-01-26 David Ung <davidu@mips.com>
	249
	250	* mips-opc.c: Add I33 masks to these MIPS32R2 instructions: prefx,
	251	ceil.l.d, ceil.l.s, cvt.d.l, cvt.l.d, cvt.l.s, cvt.s.l, floor.l.d,
	252	floor.l.s, ldxc1, lwxc1, madd.d, madd.s, msub.d, msub.s, nmadd.d,
	253	nmadd.s, nmsub.d, nmsub.s, recip.d, recip.s, round.l.d, rsqrt.d,
	254	rsqrt.s, sdxc1, swxc1, trunc.l.d, trunc.l.s.
	255
9e919b5f AM	256	2006-01-18 Arnold Metselaar <arnoldm@sourceware.org>
	257
	258	* z80-dis.c (struct buffer, prt_d, prt_d_n, arit_d, ld_r_d,
	259	ld_d_r, pref_xd_cb): Use signed char to hold data to be
	260	disassembled.
	261	* z80-dis.c (TXTSIZ): Increase buffer size to 24, this fixes
	262	buffer overflows when disassembling instructions like
	263	ld (ix+123),0x23
	264	* z80-dis.c (opc_ind, pref_xd_cb): Suppress '+' in an indexed
	265	operand, if the offset is negative.
	266
c9021189 AM	267	2006-01-17 Arnold Metselaar <arnoldm@sourceware.org>
	268
	269	* z80-dis.c (struct buffer, prt_d, prt_d_n, pref_xd_cb): Use
	270	unsigned char to hold data to be disassembled.
	271
d99b6465 AS	272	2006-01-17 Andreas Schwab <schwab@suse.de>
	273
	274	PR binutils/1486
	275	* disassemble.c (disassemble_init_for_target): Set
	276	disassembler_needs_relocs for bfd_arch_arm.
	277
c2fe9327 PB	278	2006-01-16 Paul Brook <paul@codesourcery.com>
c2fe9327 PB	279
e88d958a	280	* m68k-opc.c (m68k_opcodes): Fix opcodes for ColdFire f?abss,
c2fe9327 PB	281	f?add?, and f?sub? instructions.
c2fe9327 PB	282
32fba81d NC	283	2006-01-16 Nick Clifton <nickc@redhat.com>
	284
	285	* po/zh_CN.po: New Chinese (simplified) translation.
	286	* configure.in (ALL_LINGUAS): Add "zh_CH".
	287	* configure: Regenerate.
	288
1b3a26b5 PB	289	2006-01-05 Paul Brook <paul@codesourcery.com>
	290
	291	* m68k-opc.c (m68k_opcodes): Add missing ColdFire fdsqrtd entry.
	292
db313fa6 DD	293	2006-01-06 DJ Delorie <dj@redhat.com>
	294
	295	* m32c-desc.c: Regenerate.
	296	* m32c-opc.c: Regenerate.
	297	* m32c-opc.h: Regenerate.
	298
54d46aca DD	299	2006-01-03 DJ Delorie <dj@redhat.com>
	300
	301	* cgen-ibld.in (extract_normal): Avoid memory range errors.
	302	* m32c-ibld.c: Regenerated.
	303
e88d958a	304	For older changes see ChangeLog-2005
252b5132 RH	305	\f
252b5132 RH	306	Local Variables:
2f6d2f85 NC	307	mode: change-log
	308	left-margin: 8
	309	fill-column: 74
252b5132 RH	310	version-control: never
252b5132 RH	311	End: