[deliverable/binutils-gdb.git] / opcodes / ChangeLog

2016-05-27  Nick Clifton  <nickc@redhat.com>

	PR target/20150
	* msp430-dis.c (msp430dis_read_two_bytes): New function.
	(msp430dis_opcode_unsigned): New function.
	(msp430dis_opcode_signed): New function.
	(msp430_singleoperand): Use the new opcode reading functions.
	Only disassenmble bytes if they were successfully read.
	(msp430_doubleoperand): Likewise.
	(msp430_branchinstr): Likewise.
	(msp430x_callx_instr): Likewise.
	(print_insn_msp430): Check that it is safe to read bytes before
	attempting disassembly.  Use the new opcode reading functions.

2016-05-26  Peter Bergner <bergner@vnet.ibm.com>

	* ppc-opc.c (CY): New define.  Document it.
	(powerpc_opcodes) <addex[.], lwzmx, vmsumudm>: New mnemonics.

2016-05-25  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Add CpuVREX to CPU_AVX512DQ_FLAGS,
	CPU_AVX512BW_FLAGS, CPU_AVX512VL_FLAGS, CPU_AVX512IFMA_FLAGS
	and CPU_AVX512VBMI_FLAGS.  Add CpuAVX512DQ, CpuAVX512BW,
	CpuAVX512VL, CpuAVX512IFMA and CpuAVX512VBMI to
	CPU_ANY_AVX_FLAGS.
	* i386-init.h: Regenerated.

2016-05-25  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/20141
	* i386-gen.c (cpu_flag_init): Add CpuVREX to CPU_AVX512F_FLAGS,
	CPU_AVX512CD_FLAGS, CPU_AVX512ER_FLAGS and CPU_AVX512PF_FLAGS.
	* i386-init.h: Regenerated.

2016-05-25  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Rename CPU_ANY87_FLAGS to
	CPU_ANY_X87_FLAGS.  Add CPU_ANY_MMX_FLAGS.
	* i386-init.h: Regenerated.

2016-05-23  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-dis.c (print_flags): Set branch_delay_insns, and insn_type
	information.
	(print_insn_arc): Set insn_type information.
	* arc-opc.c (C_CC): Add F_CLASS_COND.
	* arc-tbl.h (bbit0, bbit1): Update subclass to COND.
	(beq_s, bge_s, bgt_s, bhi_s, bhs_s): Likewise.
	(ble_s, blo_s, bls_s, blt_s, bne_s): Likewise.
	(breq, breq_s, brge, brhs, brlo, brlt): Likewise.
	(brne, brne_s, jeq_s, jne_s): Likewise.

2016-05-23  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-tbl.h (neg): New instruction variant.

2016-05-23  Cupertino Miranda  <cmiranda@synopsys.com>

	* arc-dis.c (find_format, find_format, get_auxreg)
	(print_insn_arc): Changed.
	* arc-ext.h (INSERT_XOP): Likewise.

2016-05-23  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>

	* tic54x-dis.c (sprint_mmr): Adjust.
	* tic54x-opc.c: Likewise.

2016-05-19  Alan Modra  <amodra@gmail.com>

	* ppc-opc.c (NSISIGNOPT): Use insert_nsi and extract_nsi.

2016-05-19  Alan Modra  <amodra@gmail.com>

	* ppc-opc.c: Formatting.
	(NSISIGNOPT): Define.
	(powerpc_opcodes <subis>): Use NSISIGNOPT.

2016-05-18  Maciej W. Rozycki  <macro@imgtec.com>

	* mips-dis.c (is_compressed_mode_p): Add `micromips_p' operand,
	replacing references to `micromips_ase' throughout.
	(_print_insn_mips): Don't use file-level microMIPS annotation to
	determine the disassembly mode with the symbol table.

2016-05-13  Peter Bergner <bergner@vnet.ibm.com>

	* ppc-opc.c (IMM8): Use PPC_OPERAND_SIGNOPT.

2016-05-11  Andrew Bennett  <andrew.bennett@imgtec.com>

	* mips-dis.c (mips_arch_choices): Add ASE_DSPR3 to mips32r6 and
	mips64r6.
	* mips-opc.c (D34): New macro.
	(mips_builtin_opcodes): Define bposge32c for DSPr3.

2016-05-10  Alexander Fomin  <alexander.fomin@intel.com>

	* i386-dis.c (prefix_table): Add RDPID instruction.
	* i386-gen.c (cpu_flag_init): Add RDPID flag.
	(cpu_flags): Add RDPID bitfield.
	* i386-opc.h (enum): Add RDPID element.
	(i386_cpu_flags): Add RDPID field.
	* i386-opc.tbl: Add RDPID instruction.
	* i386-init.h: Regenerate.
	* i386-tbl.h: Regenerate.

2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>

	* arm-dis.c (get_sym_code_type): Use ARM_GET_SYM_BRANCH_TYPE to get
	branch type of a symbol.
	(print_insn): Likewise.

2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>

	* arm-dis.c (coprocessor_opcodes): Add entries for VFP ARMv8-M
	Mainline Security Extensions instructions.
	(thumb_opcodes): Add entries for narrow ARMv8-M Security
	Extensions instructions.
	(thumb32_opcodes): Add entries for wide ARMv8-M Security Extensions
	instructions.
	(psr_name): Add new MSP_NS and PSP_NS ARMv8-M Security Extensions
	special registers.

2016-05-09  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* sparc-opc.c (sparc_opcodes): Fix mnemonic of faligndatai.

2016-05-03  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-ext.c (dump_ARC_extmap): Handle SYNATX_NOP and SYNTAX_1OP.
	(arcExtMap_genOpcode): Likewise.
	* arc-opc.c (arg_32bit_rc): Define new variable.
	(arg_32bit_u6): Likewise.
	(arg_32bit_limm): Likewise.

2016-05-03  Szabolcs Nagy  <szabolcs.nagy@arm.com>

	* aarch64-gen.c (VERIFIER): Define.
	* aarch64-opc.c (VERIFIER): Define.
	(verify_ldpsw): Use static linkage.
	* aarch64-opc.h (verify_ldpsw): Remove.
	* aarch64-tbl.h: Use VERIFIER for verifiers.

2016-04-28  Nick Clifton  <nickc@redhat.com>

	PR target/19722
	* aarch64-dis.c (aarch64_opcode_decode): Run verifier if present.
	* aarch64-opc.c (verify_ldpsw): New function.
	* aarch64-opc.h (verify_ldpsw): New prototype.
	* aarch64-tbl.h: Add initialiser for verifier field.
	(LDPSW): Set verifier to verify_ldpsw.

2016-04-23  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/19983
	PR binutils/19984
	* i386-dis.c (print_insn): Return -1 if size of bfd_vma is
	smaller than address size.

2016-04-20  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>

	* alpha-dis.c: Regenerate.
	* crx-dis.c: Likewise.
	* disassemble.c: Likewise.
	* epiphany-opc.c: Likewise.
	* fr30-opc.c: Likewise.
	* frv-opc.c: Likewise.
	* ip2k-opc.c: Likewise.
	* iq2000-opc.c: Likewise.
	* lm32-opc.c: Likewise.
	* lm32-opinst.c: Likewise.
	* m32c-opc.c: Likewise.
	* m32r-opc.c: Likewise.
	* m32r-opinst.c: Likewise.
	* mep-opc.c: Likewise.
	* mt-opc.c: Likewise.
	* or1k-opc.c: Likewise.
	* or1k-opinst.c: Likewise.
	* tic80-opc.c: Likewise.
	* xc16x-opc.c: Likewise.
	* xstormy16-opc.c: Likewise.

2016-04-19  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add addb, subb, adcb, sbcb, andb, xorb, orb,
	fxorb, wxorb, shlb, shrb, notb, cntbb, div, mod, divm, qcmp,
	calcsd, and calcxd instructions.
	* arc-opc.c (insert_nps_bitop_size): Delete.
	(extract_nps_bitop_size): Delete.
	(MAKE_SRC_POS_INSERT_EXTRACT_FUNCS): Define, and use.
	(extract_nps_qcmp_m3): Define.
	(extract_nps_qcmp_m2): Define.
	(extract_nps_qcmp_m1): Define.
	(arc_flag_operands): Add F_NPS_SX, F_NPS_AR, F_NPS_AL.
	(arc_flag_classes): Add C_NPS_SX, C_NPS_AR_AL
	(arc_operands): Add NPS_SRC2_POS, NPS_SRC1_POS, NPS_ADDB_SIZE,
	NPS_ANDB_SIZE, NPS_FXORB_SIZ, NPS_WXORB_SIZ, NPS_R_XLDST,
	NPS_DIV_UIMM4, NPS_QCMP_SIZE, NPS_QCMP_M1, NPS_QCMP_M2, and
	NPS_QCMP_M3.

2016-04-19  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add dctcp, dcip, dcet, and dcacl instructions.

2016-04-15  H.J. Lu  <hongjiu.lu@intel.com>

	* Makefile.in: Regenerated with automake 1.11.6.
	* aclocal.m4: Likewise.

2016-04-14  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add xldb, xldw, xld, xstb, xstw, and xst
	instructions.
	* arc-opc.c (insert_nps_cmem_uimm16): New function.
	(extract_nps_cmem_uimm16): New function.
	(arc_operands): Add NPS_XLDST_UIMM16 operand.

2016-04-14  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-dis.c (arc_insn_length): New function.
	(print_insn_arc): Use arc_insn_length, change insnLen to unsigned.
	(find_format): Change insnLen parameter to unsigned.

2016-04-13  Nick Clifton  <nickc@redhat.com>

	PR target/19937
	* v850-opc.c (v850_opcodes): Correct masks for long versions of
	the LD.B and LD.BU instructions.

2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-dis.c (find_format): Check for extension flags.
	(print_flags): New function.
	(print_insn_arc): Update for .extCondCode, .extCoreRegister and
	.extAuxRegister.
	* arc-ext.c (arcExtMap_coreRegName): Use
	LAST_EXTENSION_CORE_REGISTER.
	(arcExtMap_coreReadWrite): Likewise.
	(dump_ARC_extmap): Update printing.
	* arc-opc.c (arc_flag_classes): Add F_CLASS_EXTEND flag.
	(arc_aux_regs): Add cpu field.
	* arc-regs.h: Add cpu field, lower case name aux registers.

2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-tbl.h: Add rtsc, sleep with no arguments.

2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-opc.c (flags_none, flags_f, flags_cc, flags_ccf):
	Initialize.
	(arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
	(arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
	(arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
	(arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
	(arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
	(arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
	(arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
	(arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
	(arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
	(arc_opcode arc_opcodes): Null terminate the array.
	(arc_num_opcodes): Remove.
	* arc-ext.h (INSERT_XOP): Define.
	(extInstruction_t): Likewise.
	(arcExtMap_instName): Delete.
	(arcExtMap_insn): New function.
	(arcExtMap_genOpcode): Likewise.
	* arc-ext.c (ExtInstruction): Remove.
	(create_map): Zero initialize instruction fields.
	(arcExtMap_instName): Remove.
	(arcExtMap_insn): New function.
	(dump_ARC_extmap): More info while debuging.
	(arcExtMap_genOpcode): New function.
	* arc-dis.c (find_format): New function.
	(print_insn_arc): Use find_format.
	(arc_get_disassembler): Enable dump_ARC_extmap only when
	debugging.

2016-04-11  Maciej W. Rozycki  <macro@imgtec.com>

	* mips-dis.c (print_mips16_insn_arg): Mask unused extended
	instruction bits out.

2016-04-07  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add schd, sync, and hwschd instructions.
	* arc-opc.c (arc_flag_operands): Add new flags.
	(arc_flag_classes): Add new classes.

2016-04-07  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-opc.c (arc_opcodes): Extend comment to discus table layout.

2016-04-05  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add movbi, decode1, fbset, fbclear, encode0,
	encode1, rflt, crc16, and crc32 instructions.
	* arc-opc.c (arc_flag_operands): Add F_NPS_R.
	(arc_flag_classes): Add C_NPS_R.
	(insert_nps_bitop_size_2b): New function.
	(extract_nps_bitop_size_2b): Likewise.
	(insert_nps_bitop_uimm8): Likewise.
	(extract_nps_bitop_uimm8): Likewise.
	(arc_operands): Add new operand entries.

2016-04-05  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-regs.h: Add a new subclass field.  Add double assist
	accumulator register values.
	* arc-tbl.h: Use DPA subclass to mark the double assist
	instructions.  Use DPX/SPX subclas to mark the FPX instructions.
	* arc-opc.c (RSP): Define instead of SP.
	(arc_aux_regs): Add the subclass field.

2016-04-05  Jiong Wang  <jiong.wang@arm.com>

	* arm-dis.c: Support FP16 vmul, vmla, vmls (by scalar).

2016-03-31  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-opc.c (arc_operands): Fix operand flags for NPS_R_DST, and
	NPS_R_SRC1.

2016-03-30  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add a header comment, and fix some whitespace
	issues.  No functional changes.

2016-03-30  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-regs.h (IC_RAM_ADDRESS, IC_TAG, IC_WP, IC_DATA, CONTROL0)
	(AX2, AY2, MX2, MY2, AY0, AY1, DC_RAM_ADDR, DC_TAG, CONTROL1)
	(RTT): Remove duplicate.
	(LCDINSTR, LCDDATA, LCDSTAT, CC_*, PCT_COUNT*, PCT_SNAP*)
	(PCT_CONFIG*): Remove.
	(D1L, D1H, D2H, D2L): Define.

2016-03-29  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-ext-tbl.h (dsp_fp_i2flt): Fix typo.

2016-03-29  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-tbl.h (invld07): Remove.
	* arc-ext-tbl.h: New file.
	* arc-dis.c (FIELDA, FIELDB, FIELDC): Remove.
	* arc-opc.c (arc_opcodes): Add ext-tbl include.

2016-03-24  Jan Kratochvil  <jan.kratochvil@redhat.com>

	Fix -Wstack-usage warnings.
	* aarch64-dis.c (print_operands): Substitute size.
	* aarch64-opc.c (print_register_offset_address): Substitute tblen.

2016-03-22  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* sparc-opc.c (sparc_opcodes): Reorder entries for `rd' in order
	to get a proper diagnostic when an invalid ASR register is used.

2016-03-22  Nick Clifton  <nickc@redhat.com>

	* configure: Regenerate.

2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: New file.
	* arc-opc.c: Add top level comment.
	(insert_nps_3bit_dst): New function.
	(extract_nps_3bit_dst): New function.
	(insert_nps_3bit_src2): New function.
	(extract_nps_3bit_src2): New function.
	(insert_nps_bitop_size): New function.
	(extract_nps_bitop_size): New function.
	(arc_flag_operands): Add nps400 entries.
	(arc_flag_classes): Add nps400 entries.
	(arc_operands): Add nps400 entries.
	(arc_opcodes): Add nps400 include.

2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-opc.c (arc_flag_classes): Convert all flag classes to use
	the new class enum values.

2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-dis.c (print_insn_arc): Handle nps400.

2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-opc.c (BASE): Delete.

2016-03-18  Nick Clifton  <nickc@redhat.com>

	PR target/19721
	* aarch64-tbl.h (aarch64_opcode_table): Fix type of second operand
	of MOV insn that aliases an ORR insn.

2016-03-16  Jiong Wang  <jiong.wang@arm.com>

	* arm-dis.c (neon_opcodes): Support new FP16 instructions.

2016-03-07  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>

	* mcore-opc.h: Add const qualifiers.
	* microblaze-opc.h (struct op_code_struct): Likewise.
	* sh-opc.h: Likewise.
	* tic4x-dis.c (tic4x_print_indirect): Likewise.
	(tic4x_print_op): Likewise.

2016-03-02  Alan Modra  <amodra@gmail.com>

	* or1k-desc.h: Regenerate.
	* fr30-ibld.c: Regenerate.
	* rl78-decode.c: Regenerate.

2016-03-01  Nick Clifton  <nickc@redhat.com>

	PR target/19747
	* rl78-dis.c (print_insn_rl78_common): Fix typo.

2016-02-24  Renlin Li  <renlin.li@arm.com>

	* arm-dis.c (coprocessor_opcodes): Add fp16 instruction entries.
	(print_insn_coprocessor): Support fp16 instructions.

2016-02-24  Renlin Li  <renlin.li@arm.com>

	* arm-dis.c (print_insn_coprocessor): Fix mask for vsel, vmaxnm,
	vminnm, vrint(mpna).

2016-02-24  Renlin Li  <renlin.li@arm.com>

	* arm-dis.c (print_insn_coprocessor): Check co-processor number for
	cpd/cpd2, mcr/mcr2, mrc/mrc2, ldc/ldc2, stc/stc2.

2016-02-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (print_insn): Parenthesize expression to prevent
	truncated addresses.
	(OP_J): Likewise.

2016-02-10  Claudiu Zissulescu  <claziss@synopsys.com>
	    Janek van Oirschot  <jvanoirs@synopsys.com>

	* arc-opc.c (arc_relax_opcodes, arc_num_relax_opcodes): New
	variable.

2016-02-04  Nick Clifton  <nickc@redhat.com>

	PR target/19561
	* msp430-dis.c (print_insn_msp430): Add a special case for
	decoding an RRC instruction with the ZC bit set in the extension
	word.

2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>

	* cgen-ibld.in (insert_normal): Rework calculation of shift.
	* epiphany-ibld.c: Regenerate.
	* fr30-ibld.c: Regenerate.
	* frv-ibld.c: Regenerate.
	* ip2k-ibld.c: Regenerate.
	* iq2000-ibld.c: Regenerate.
	* lm32-ibld.c: Regenerate.
	* m32c-ibld.c: Regenerate.
	* m32r-ibld.c: Regenerate.
	* mep-ibld.c: Regenerate.
	* mt-ibld.c: Regenerate.
	* or1k-ibld.c: Regenerate.
	* xc16x-ibld.c: Regenerate.
	* xstormy16-ibld.c: Regenerate.

2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>

	* epiphany-dis.c: Regenerated from latest cpu files.

2016-02-01  Michael McConville  <mmcco@mykolab.com>

	* cgen-dis.c (count_decodable_bits): Use unsigned value for mask
	test bit.

2016-01-25  Renlin Li  <renlin.li@arm.com>

	* arm-dis.c (mapping_symbol_for_insn): New function.
	(find_ifthen_state): Call mapping_symbol_for_insn().

2016-01-20  Matthew Wahab  <matthew.wahab@arm.com>

	* aarch64-opc.c (operand_general_constraint_met_p): Check validity
	of MSR UAO immediate operand.

2016-01-18  Maciej W. Rozycki  <macro@imgtec.com>

	* mips-dis.c (print_insn_micromips): Remove 48-bit microMIPS
	instruction support.

2016-01-17  Alan Modra  <amodra@gmail.com>

	* configure: Regenerate.

2016-01-14  Nick Clifton  <nickc@redhat.com>

	* rl78-decode.opc (rl78_decode_opcode): Add 's' operand to movw
	instructions that can support stack pointer operations.
	* rl78-decode.c: Regenerate.
	* rl78-dis.c: Fix display of stack pointer in MOVW based
	instructions.

2016-01-14  Matthew Wahab  <matthew.wahab@arm.com>

	* aarch64-opc.c (aarch64_sys_reg_supported_p): Merge conditionals
	testing for RAS support.  Add checks for erxfr_el1, erxctlr_el1,
	erxtatus_el1 and erxaddr_el1.

2016-01-12  Matthew Wahab  <matthew.wahab@arm.com>

	* arm-dis.c (arm_opcodes): Add "esb".
	(thumb_opcodes): Likewise.

2016-01-11  Peter Bergner <bergner@vnet.ibm.com>

	* ppc-opc.c <xscmpnedp>: Delete.
	<xvcmpnedp>: Likewise.
	<xvcmpnedp.>: Likewise.
	<xvcmpnesp>: Likewise.
	<xvcmpnesp.>: Likewise.

2016-01-08  Andreas Schwab  <schwab@linux-m68k.org>

	PR gas/13050
	* m68k-opc.c (moveb, movew): For ISA_B/C only allow #,d(An) in
	addition to ISA_A.

2016-01-01  Alan Modra  <amodra@gmail.com>

	Update year range in copyright notice of all files.

For older changes see ChangeLog-2015
\f
Copyright (C) 2016 Free Software Foundation, Inc.

Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved.

Local Variables:
mode: change-log
left-margin: 8
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version-control: never
End:
Commit	Line	Data
77d66e7b NC	1	2016-05-27 Nick Clifton <nickc@redhat.com>
	2
	3	PR target/20150
	4	* msp430-dis.c (msp430dis_read_two_bytes): New function.
	5	(msp430dis_opcode_unsigned): New function.
	6	(msp430dis_opcode_signed): New function.
	7	(msp430_singleoperand): Use the new opcode reading functions.
	8	Only disassenmble bytes if they were successfully read.
	9	(msp430_doubleoperand): Likewise.
	10	(msp430_branchinstr): Likewise.
	11	(msp430x_callx_instr): Likewise.
	12	(print_insn_msp430): Check that it is safe to read bytes before
	13	attempting disassembly. Use the new opcode reading functions.
	14
19dfcc89 PB	15	2016-05-26 Peter Bergner <bergner@vnet.ibm.com>
	16
	17	* ppc-opc.c (CY): New define. Document it.
	18	(powerpc_opcodes) <addex[.], lwzmx, vmsumudm>: New mnemonics.
	19
f3ad7637 L	20	2016-05-25 H.J. Lu <hongjiu.lu@intel.com>
	21
	22	* i386-gen.c (cpu_flag_init): Add CpuVREX to CPU_AVX512DQ_FLAGS,
	23	CPU_AVX512BW_FLAGS, CPU_AVX512VL_FLAGS, CPU_AVX512IFMA_FLAGS
	24	and CPU_AVX512VBMI_FLAGS. Add CpuAVX512DQ, CpuAVX512BW,
	25	CpuAVX512VL, CpuAVX512IFMA and CpuAVX512VBMI to
	26	CPU_ANY_AVX_FLAGS.
	27	* i386-init.h: Regenerated.
	28
f1360d58 L	29	2016-05-25 H.J. Lu <hongjiu.lu@intel.com>
	30
	31	PR gas/20141
	32	* i386-gen.c (cpu_flag_init): Add CpuVREX to CPU_AVX512F_FLAGS,
	33	CPU_AVX512CD_FLAGS, CPU_AVX512ER_FLAGS and CPU_AVX512PF_FLAGS.
	34	* i386-init.h: Regenerated.
	35
293f5f65 L	36	2016-05-25 H.J. Lu <hongjiu.lu@intel.com>
	37
	38	* i386-gen.c (cpu_flag_init): Rename CPU_ANY87_FLAGS to
	39	CPU_ANY_X87_FLAGS. Add CPU_ANY_MMX_FLAGS.
	40	* i386-init.h: Regenerated.
	41
d9eca1df CZ	42	2016-05-23 Claudiu Zissulescu <claziss@synopsys.com>
	43
	44	* arc-dis.c (print_flags): Set branch_delay_insns, and insn_type
	45	information.
	46	(print_insn_arc): Set insn_type information.
	47	* arc-opc.c (C_CC): Add F_CLASS_COND.
	48	* arc-tbl.h (bbit0, bbit1): Update subclass to COND.
	49	(beq_s, bge_s, bgt_s, bhi_s, bhs_s): Likewise.
	50	(ble_s, blo_s, bls_s, blt_s, bne_s): Likewise.
	51	(breq, breq_s, brge, brhs, brlo, brlt): Likewise.
	52	(brne, brne_s, jeq_s, jne_s): Likewise.
	53
87789e08 CZ	54	2016-05-23 Claudiu Zissulescu <claziss@synopsys.com>
	55
	56	* arc-tbl.h (neg): New instruction variant.
	57
c810e0b8 CZ	58	2016-05-23 Cupertino Miranda <cmiranda@synopsys.com>
	59
	60	* arc-dis.c (find_format, find_format, get_auxreg)
	61	(print_insn_arc): Changed.
	62	* arc-ext.h (INSERT_XOP): Likewise.
	63
3d207518 TS	64	2016-05-23 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
	65
	66	* tic54x-dis.c (sprint_mmr): Adjust.
	67	* tic54x-opc.c: Likewise.
	68
514e58b7 AM	69	2016-05-19 Alan Modra <amodra@gmail.com>
	70
	71	* ppc-opc.c (NSISIGNOPT): Use insert_nsi and extract_nsi.
	72
e43de63c AM	73	2016-05-19 Alan Modra <amodra@gmail.com>
	74
	75	* ppc-opc.c: Formatting.
	76	(NSISIGNOPT): Define.
	77	(powerpc_opcodes <subis>): Use NSISIGNOPT.
	78
1401d2fe MR	79	2016-05-18 Maciej W. Rozycki <macro@imgtec.com>
	80
	81	* mips-dis.c (is_compressed_mode_p): Add `micromips_p' operand,
	82	replacing references to `micromips_ase' throughout.
	83	(_print_insn_mips): Don't use file-level microMIPS annotation to
	84	determine the disassembly mode with the symbol table.
	85
1178da44 PB	86	2016-05-13 Peter Bergner <bergner@vnet.ibm.com>
	87
	88	* ppc-opc.c (IMM8): Use PPC_OPERAND_SIGNOPT.
	89
8f4f9071 MF	90	2016-05-11 Andrew Bennett <andrew.bennett@imgtec.com>
	91
	92	* mips-dis.c (mips_arch_choices): Add ASE_DSPR3 to mips32r6 and
	93	mips64r6.
	94	* mips-opc.c (D34): New macro.
	95	(mips_builtin_opcodes): Define bposge32c for DSPr3.
	96
8bc52696 AF	97	2016-05-10 Alexander Fomin <alexander.fomin@intel.com>
	98
	99	* i386-dis.c (prefix_table): Add RDPID instruction.
	100	* i386-gen.c (cpu_flag_init): Add RDPID flag.
	101	(cpu_flags): Add RDPID bitfield.
	102	* i386-opc.h (enum): Add RDPID element.
	103	(i386_cpu_flags): Add RDPID field.
	104	* i386-opc.tbl: Add RDPID instruction.
	105	* i386-init.h: Regenerate.
	106	* i386-tbl.h: Regenerate.
	107
39d911fc TP	108	2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
	109
	110	* arm-dis.c (get_sym_code_type): Use ARM_GET_SYM_BRANCH_TYPE to get
	111	branch type of a symbol.
	112	(print_insn): Likewise.
	113
16a1fa25 TP	114	2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
	115
	116	* arm-dis.c (coprocessor_opcodes): Add entries for VFP ARMv8-M
	117	Mainline Security Extensions instructions.
	118	(thumb_opcodes): Add entries for narrow ARMv8-M Security
	119	Extensions instructions.
	120	(thumb32_opcodes): Add entries for wide ARMv8-M Security Extensions
	121	instructions.
	122	(psr_name): Add new MSP_NS and PSP_NS ARMv8-M Security Extensions
	123	special registers.
	124
d751b79e JM	125	2016-05-09 Jose E. Marchesi <jose.marchesi@oracle.com>
	126
	127	* sparc-opc.c (sparc_opcodes): Fix mnemonic of faligndatai.
	128
945e0f82 CZ	129	2016-05-03 Claudiu Zissulescu <claziss@synopsys.com>
	130
	131	* arc-ext.c (dump_ARC_extmap): Handle SYNATX_NOP and SYNTAX_1OP.
	132	(arcExtMap_genOpcode): Likewise.
	133	* arc-opc.c (arg_32bit_rc): Define new variable.
	134	(arg_32bit_u6): Likewise.
	135	(arg_32bit_limm): Likewise.
	136
20f55f38 SN	137	2016-05-03 Szabolcs Nagy <szabolcs.nagy@arm.com>
	138
	139	* aarch64-gen.c (VERIFIER): Define.
	140	* aarch64-opc.c (VERIFIER): Define.
	141	(verify_ldpsw): Use static linkage.
	142	* aarch64-opc.h (verify_ldpsw): Remove.
	143	* aarch64-tbl.h: Use VERIFIER for verifiers.
	144
4bd13cde NC	145	2016-04-28 Nick Clifton <nickc@redhat.com>
	146
	147	PR target/19722
	148	* aarch64-dis.c (aarch64_opcode_decode): Run verifier if present.
	149	* aarch64-opc.c (verify_ldpsw): New function.
	150	* aarch64-opc.h (verify_ldpsw): New prototype.
	151	* aarch64-tbl.h: Add initialiser for verifier field.
	152	(LDPSW): Set verifier to verify_ldpsw.
	153
c0f92bf9 L	154	2016-04-23 H.J. Lu <hongjiu.lu@intel.com>
	155
	156	PR binutils/19983
	157	PR binutils/19984
	158	* i386-dis.c (print_insn): Return -1 if size of bfd_vma is
	159	smaller than address size.
	160
e6c7cdec TS	161	2016-04-20 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
	162
	163	* alpha-dis.c: Regenerate.
	164	* crx-dis.c: Likewise.
	165	* disassemble.c: Likewise.
	166	* epiphany-opc.c: Likewise.
	167	* fr30-opc.c: Likewise.
	168	* frv-opc.c: Likewise.
	169	* ip2k-opc.c: Likewise.
	170	* iq2000-opc.c: Likewise.
	171	* lm32-opc.c: Likewise.
	172	* lm32-opinst.c: Likewise.
	173	* m32c-opc.c: Likewise.
	174	* m32r-opc.c: Likewise.
	175	* m32r-opinst.c: Likewise.
	176	* mep-opc.c: Likewise.
	177	* mt-opc.c: Likewise.
	178	* or1k-opc.c: Likewise.
	179	* or1k-opinst.c: Likewise.
	180	* tic80-opc.c: Likewise.
	181	* xc16x-opc.c: Likewise.
	182	* xstormy16-opc.c: Likewise.
	183
537aefaf AB	184	2016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
	185
	186	* arc-nps400-tbl.h: Add addb, subb, adcb, sbcb, andb, xorb, orb,
	187	fxorb, wxorb, shlb, shrb, notb, cntbb, div, mod, divm, qcmp,
	188	calcsd, and calcxd instructions.
	189	* arc-opc.c (insert_nps_bitop_size): Delete.
	190	(extract_nps_bitop_size): Delete.
	191	(MAKE_SRC_POS_INSERT_EXTRACT_FUNCS): Define, and use.
	192	(extract_nps_qcmp_m3): Define.
	193	(extract_nps_qcmp_m2): Define.
	194	(extract_nps_qcmp_m1): Define.
	195	(arc_flag_operands): Add F_NPS_SX, F_NPS_AR, F_NPS_AL.
	196	(arc_flag_classes): Add C_NPS_SX, C_NPS_AR_AL
	197	(arc_operands): Add NPS_SRC2_POS, NPS_SRC1_POS, NPS_ADDB_SIZE,
	198	NPS_ANDB_SIZE, NPS_FXORB_SIZ, NPS_WXORB_SIZ, NPS_R_XLDST,
	199	NPS_DIV_UIMM4, NPS_QCMP_SIZE, NPS_QCMP_M1, NPS_QCMP_M2, and
	200	NPS_QCMP_M3.
	201
c8f785f2 AB	202	2016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
	203
	204	* arc-nps400-tbl.h: Add dctcp, dcip, dcet, and dcacl instructions.
	205
6fd8e7c2 L	206	2016-04-15 H.J. Lu <hongjiu.lu@intel.com>
	207
	208	* Makefile.in: Regenerated with automake 1.11.6.
	209	* aclocal.m4: Likewise.
	210
4b0c052e AB	211	2016-04-14 Andrew Burgess <andrew.burgess@embecosm.com>
	212
	213	* arc-nps400-tbl.h: Add xldb, xldw, xld, xstb, xstw, and xst
	214	instructions.
	215	* arc-opc.c (insert_nps_cmem_uimm16): New function.
	216	(extract_nps_cmem_uimm16): New function.
	217	(arc_operands): Add NPS_XLDST_UIMM16 operand.
	218
cb040366 AB	219	2016-04-14 Andrew Burgess <andrew.burgess@embecosm.com>
	220
	221	* arc-dis.c (arc_insn_length): New function.
	222	(print_insn_arc): Use arc_insn_length, change insnLen to unsigned.
	223	(find_format): Change insnLen parameter to unsigned.
	224
accc0180 NC	225	2016-04-13 Nick Clifton <nickc@redhat.com>
	226
	227	PR target/19937
	228	* v850-opc.c (v850_opcodes): Correct masks for long versions of
	229	the LD.B and LD.BU instructions.
	230
f36e33da CZ	231	2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
	232
	233	* arc-dis.c (find_format): Check for extension flags.
	234	(print_flags): New function.
	235	(print_insn_arc): Update for .extCondCode, .extCoreRegister and
	236	.extAuxRegister.
	237	* arc-ext.c (arcExtMap_coreRegName): Use
	238	LAST_EXTENSION_CORE_REGISTER.
	239	(arcExtMap_coreReadWrite): Likewise.
	240	(dump_ARC_extmap): Update printing.
	241	* arc-opc.c (arc_flag_classes): Add F_CLASS_EXTEND flag.
	242	(arc_aux_regs): Add cpu field.
	243	* arc-regs.h: Add cpu field, lower case name aux registers.
	244
1c2e355e CZ	245	2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
	246
	247	* arc-tbl.h: Add rtsc, sleep with no arguments.
	248
b99747ae CZ	249	2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
	250
	251	* arc-opc.c (flags_none, flags_f, flags_cc, flags_ccf):
	252	Initialize.
	253	(arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
	254	(arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
	255	(arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
	256	(arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
	257	(arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
	258	(arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
	259	(arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
	260	(arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
	261	(arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
	262	(arc_opcode arc_opcodes): Null terminate the array.
	263	(arc_num_opcodes): Remove.
	264	* arc-ext.h (INSERT_XOP): Define.
	265	(extInstruction_t): Likewise.
	266	(arcExtMap_instName): Delete.
	267	(arcExtMap_insn): New function.
	268	(arcExtMap_genOpcode): Likewise.
	269	* arc-ext.c (ExtInstruction): Remove.
	270	(create_map): Zero initialize instruction fields.
	271	(arcExtMap_instName): Remove.
	272	(arcExtMap_insn): New function.
	273	(dump_ARC_extmap): More info while debuging.
	274	(arcExtMap_genOpcode): New function.
	275	* arc-dis.c (find_format): New function.
	276	(print_insn_arc): Use find_format.
	277	(arc_get_disassembler): Enable dump_ARC_extmap only when
	278	debugging.
	279
92708cec MR	280	2016-04-11 Maciej W. Rozycki <macro@imgtec.com>
	281
	282	* mips-dis.c (print_mips16_insn_arg): Mask unused extended
	283	instruction bits out.
	284
a42a4f84 AB	285	2016-04-07 Andrew Burgess <andrew.burgess@embecosm.com>
	286
	287	* arc-nps400-tbl.h: Add schd, sync, and hwschd instructions.
	288	* arc-opc.c (arc_flag_operands): Add new flags.
	289	(arc_flag_classes): Add new classes.
	290
1328504b AB	291	2016-04-07 Andrew Burgess <andrew.burgess@embecosm.com>
	292
	293	* arc-opc.c (arc_opcodes): Extend comment to discus table layout.
	294
820f03ff AB	295	2016-04-05 Andrew Burgess <andrew.burgess@embecosm.com>
	296
	297	* arc-nps400-tbl.h: Add movbi, decode1, fbset, fbclear, encode0,
	298	encode1, rflt, crc16, and crc32 instructions.
	299	* arc-opc.c (arc_flag_operands): Add F_NPS_R.
	300	(arc_flag_classes): Add C_NPS_R.
	301	(insert_nps_bitop_size_2b): New function.
	302	(extract_nps_bitop_size_2b): Likewise.
	303	(insert_nps_bitop_uimm8): Likewise.
	304	(extract_nps_bitop_uimm8): Likewise.
	305	(arc_operands): Add new operand entries.
	306
8ddf6b2a CZ	307	2016-04-05 Claudiu Zissulescu <claziss@synopsys.com>
8ddf6b2a CZ	308
b99747ae CZ	309	* arc-regs.h: Add a new subclass field. Add double assist
	310	accumulator register values.
	311	* arc-tbl.h: Use DPA subclass to mark the double assist
	312	instructions. Use DPX/SPX subclas to mark the FPX instructions.
	313	* arc-opc.c (RSP): Define instead of SP.
	314	(arc_aux_regs): Add the subclass field.
8ddf6b2a	315
589a7d88 JW	316	2016-04-05 Jiong Wang <jiong.wang@arm.com>
	317
	318	* arm-dis.c: Support FP16 vmul, vmla, vmls (by scalar).
	319
0a191de9	320	2016-03-31 Andrew Burgess <andrew.burgess@embecosm.com>
2cce10e7 AB	321
	322	* arc-opc.c (arc_operands): Fix operand flags for NPS_R_DST, and
	323	NPS_R_SRC1.
	324
0a106562 AB	325	2016-03-30 Andrew Burgess <andrew.burgess@embecosm.com>
	326
	327	* arc-nps400-tbl.h: Add a header comment, and fix some whitespace
	328	issues. No functional changes.
	329
bd05ac5f CZ	330	2016-03-30 Claudiu Zissulescu <claziss@synopsys.com>
bd05ac5f CZ	331
b99747ae CZ	332	* arc-regs.h (IC_RAM_ADDRESS, IC_TAG, IC_WP, IC_DATA, CONTROL0)
	333	(AX2, AY2, MX2, MY2, AY0, AY1, DC_RAM_ADDR, DC_TAG, CONTROL1)
	334	(RTT): Remove duplicate.
	335	(LCDINSTR, LCDDATA, LCDSTAT, CC_, PCT_COUNT, PCT_SNAP*)
	336	(PCT_CONFIG*): Remove.
	337	(D1L, D1H, D2H, D2L): Define.
bd05ac5f	338
9885948f CZ	339	2016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
9885948f CZ	340
b99747ae	341	* arc-ext-tbl.h (dsp_fp_i2flt): Fix typo.
9885948f	342
f2dd8838 CZ	343	2016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
f2dd8838 CZ	344
b99747ae CZ	345	* arc-tbl.h (invld07): Remove.
	346	* arc-ext-tbl.h: New file.
	347	* arc-dis.c (FIELDA, FIELDB, FIELDC): Remove.
	348	* arc-opc.c (arc_opcodes): Add ext-tbl include.
f2dd8838	349
0d2f91fe JK	350	2016-03-24 Jan Kratochvil <jan.kratochvil@redhat.com>
	351
	352	Fix -Wstack-usage warnings.
	353	* aarch64-dis.c (print_operands): Substitute size.
	354	* aarch64-opc.c (print_register_offset_address): Substitute tblen.
	355
a6b71f42 JM	356	2016-03-22 Jose E. Marchesi <jose.marchesi@oracle.com>
	357
	358	* sparc-opc.c (sparc_opcodes): Reorder entries for `rd' in order
	359	to get a proper diagnostic when an invalid ASR register is used.
	360
9780e045 NC	361	2016-03-22 Nick Clifton <nickc@redhat.com>
	362
	363	* configure: Regenerate.
	364
e23e8ebe AB	365	2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
	366
	367	* arc-nps400-tbl.h: New file.
	368	* arc-opc.c: Add top level comment.
	369	(insert_nps_3bit_dst): New function.
	370	(extract_nps_3bit_dst): New function.
	371	(insert_nps_3bit_src2): New function.
	372	(extract_nps_3bit_src2): New function.
	373	(insert_nps_bitop_size): New function.
	374	(extract_nps_bitop_size): New function.
	375	(arc_flag_operands): Add nps400 entries.
	376	(arc_flag_classes): Add nps400 entries.
	377	(arc_operands): Add nps400 entries.
	378	(arc_opcodes): Add nps400 include.
	379
1ae8ab47 AB	380	2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
	381
	382	* arc-opc.c (arc_flag_classes): Convert all flag classes to use
	383	the new class enum values.
	384
8699fc3e AB	385	2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
	386
	387	* arc-dis.c (print_insn_arc): Handle nps400.
	388
24740d83 AB	389	2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
	390
	391	* arc-opc.c (BASE): Delete.
	392
8678914f NC	393	2016-03-18 Nick Clifton <nickc@redhat.com>
	394
	395	PR target/19721
	396	* aarch64-tbl.h (aarch64_opcode_table): Fix type of second operand
	397	of MOV insn that aliases an ORR insn.
	398
cc933301 JW	399	2016-03-16 Jiong Wang <jiong.wang@arm.com>
	400
	401	* arm-dis.c (neon_opcodes): Support new FP16 instructions.
	402
f86f5863 TS	403	2016-03-07 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
	404
	405	* mcore-opc.h: Add const qualifiers.
	406	* microblaze-opc.h (struct op_code_struct): Likewise.
	407	* sh-opc.h: Likewise.
	408	* tic4x-dis.c (tic4x_print_indirect): Likewise.
	409	(tic4x_print_op): Likewise.
	410
62de1c63 AM	411	2016-03-02 Alan Modra <amodra@gmail.com>
62de1c63 AM	412
d11698cd	413	* or1k-desc.h: Regenerate.
62de1c63	414	* fr30-ibld.c: Regenerate.
c697cf0b	415	* rl78-decode.c: Regenerate.
62de1c63	416
020efce5 NC	417	2016-03-01 Nick Clifton <nickc@redhat.com>
	418
	419	PR target/19747
	420	* rl78-dis.c (print_insn_rl78_common): Fix typo.
	421
b0c11777 RL	422	2016-02-24 Renlin Li <renlin.li@arm.com>
	423
	424	* arm-dis.c (coprocessor_opcodes): Add fp16 instruction entries.
	425	(print_insn_coprocessor): Support fp16 instructions.
	426
3e309328 RL	427	2016-02-24 Renlin Li <renlin.li@arm.com>
	428
	429	* arm-dis.c (print_insn_coprocessor): Fix mask for vsel, vmaxnm,
	430	vminnm, vrint(mpna).
	431
8afc7bea RL	432	2016-02-24 Renlin Li <renlin.li@arm.com>
	433
	434	* arm-dis.c (print_insn_coprocessor): Check co-processor number for
	435	cpd/cpd2, mcr/mcr2, mrc/mrc2, ldc/ldc2, stc/stc2.
	436
4fd7268a L	437	2016-02-15 H.J. Lu <hongjiu.lu@intel.com>
	438
	439	* i386-dis.c (print_insn): Parenthesize expression to prevent
	440	truncated addresses.
	441	(OP_J): Likewise.
	442
4670103e CZ	443	2016-02-10 Claudiu Zissulescu <claziss@synopsys.com>
	444	Janek van Oirschot <jvanoirs@synopsys.com>
	445
b99747ae CZ	446	* arc-opc.c (arc_relax_opcodes, arc_num_relax_opcodes): New
b99747ae CZ	447	variable.
4670103e	448
c1d9289f NC	449	2016-02-04 Nick Clifton <nickc@redhat.com>
	450
	451	PR target/19561
	452	* msp430-dis.c (print_insn_msp430): Add a special case for
	453	decoding an RRC instruction with the ZC bit set in the extension
	454	word.
	455
a143b004 AB	456	2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
	457
	458	* cgen-ibld.in (insert_normal): Rework calculation of shift.
	459	* epiphany-ibld.c: Regenerate.
	460	* fr30-ibld.c: Regenerate.
	461	* frv-ibld.c: Regenerate.
	462	* ip2k-ibld.c: Regenerate.
	463	* iq2000-ibld.c: Regenerate.
	464	* lm32-ibld.c: Regenerate.
	465	* m32c-ibld.c: Regenerate.
	466	* m32r-ibld.c: Regenerate.
	467	* mep-ibld.c: Regenerate.
	468	* mt-ibld.c: Regenerate.
	469	* or1k-ibld.c: Regenerate.
	470	* xc16x-ibld.c: Regenerate.
	471	* xstormy16-ibld.c: Regenerate.
	472
b89807c6 AB	473	2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
	474
	475	* epiphany-dis.c: Regenerated from latest cpu files.
	476
d8c823c8 MM	477	2016-02-01 Michael McConville <mmcco@mykolab.com>
	478
	479	* cgen-dis.c (count_decodable_bits): Use unsigned value for mask
	480	test bit.
	481
5bc5ae88 RL	482	2016-01-25 Renlin Li <renlin.li@arm.com>
	483
	484	* arm-dis.c (mapping_symbol_for_insn): New function.
	485	(find_ifthen_state): Call mapping_symbol_for_insn().
	486
0bff6e2d MW	487	2016-01-20 Matthew Wahab <matthew.wahab@arm.com>
	488
	489	* aarch64-opc.c (operand_general_constraint_met_p): Check validity
	490	of MSR UAO immediate operand.
	491
100b4f2e MR	492	2016-01-18 Maciej W. Rozycki <macro@imgtec.com>
	493
	494	* mips-dis.c (print_insn_micromips): Remove 48-bit microMIPS
	495	instruction support.
	496
5c14705f AM	497	2016-01-17 Alan Modra <amodra@gmail.com>
	498
	499	* configure: Regenerate.
	500
4d82fe66 NC	501	2016-01-14 Nick Clifton <nickc@redhat.com>
	502
	503	* rl78-decode.opc (rl78_decode_opcode): Add 's' operand to movw
	504	instructions that can support stack pointer operations.
	505	* rl78-decode.c: Regenerate.
	506	* rl78-dis.c: Fix display of stack pointer in MOVW based
	507	instructions.
	508
651657fa MW	509	2016-01-14 Matthew Wahab <matthew.wahab@arm.com>
	510
	511	* aarch64-opc.c (aarch64_sys_reg_supported_p): Merge conditionals
	512	testing for RAS support. Add checks for erxfr_el1, erxctlr_el1,
	513	erxtatus_el1 and erxaddr_el1.
	514
105bde57 MW	515	2016-01-12 Matthew Wahab <matthew.wahab@arm.com>
	516
	517	* arm-dis.c (arm_opcodes): Add "esb".
	518	(thumb_opcodes): Likewise.
	519
afa8d405 PB	520	2016-01-11 Peter Bergner <bergner@vnet.ibm.com>
	521
	522	* ppc-opc.c <xscmpnedp>: Delete.
	523	<xvcmpnedp>: Likewise.
	524	<xvcmpnedp.>: Likewise.
	525	<xvcmpnesp>: Likewise.
	526	<xvcmpnesp.>: Likewise.
	527
83c3256e AS	528	2016-01-08 Andreas Schwab <schwab@linux-m68k.org>
	529
	530	PR gas/13050
	531	* m68k-opc.c (moveb, movew): For ISA_B/C only allow #,d(An) in
	532	addition to ISA_A.
	533
6f2750fe AM	534	2016-01-01 Alan Modra <amodra@gmail.com>
	535
	536	Update year range in copyright notice of all files.
	537
3499769a AM	538	For older changes see ChangeLog-2015
	539	\f
	540	Copyright (C) 2016 Free Software Foundation, Inc.
	541
	542	Copying and distribution of this file, with or without modification,
	543	are permitted in any medium without royalty provided the copyright
	544	notice and this notice are preserved.
	545
	546	Local Variables:
	547	mode: change-log
	548	left-margin: 8
	549	fill-column: 74
	550	version-control: never
	551	End: