[binutils, ARM, 8/16] BFL infrastructure with new global reloc R_ARM_THM_BF18
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
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1caf72a5
AV
12019-04-15 Sudakshina Das <sudi.das@arm.com>
2
3 * arm-dis.c (print_insn_thumb32): Updated to accept new %Y pattern.
4
f1c7f421
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52019-04-15 Sudakshina Das <sudi.das@arm.com>
6
7 * arm-dis.c (print_insn_thumb32): Add '%<bitfield>S' to print an
8 Arm register with r13 and r15 unpredictable.
9 (thumb32_opcodes): New instructions for bfx and bflx.
10
4389b29a
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112019-04-15 Sudakshina Das <sudi.das@arm.com>
12
13 * arm-dis.c (thumb32_opcodes): New instructions for bf.
14
e5d6e09e
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152019-04-15 Sudakshina Das <sudi.das@arm.com>
16
17 * arm-dis.c (print_insn_thumb32): Updated to accept new %W pattern.
18
e12437dc
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192019-04-15 Sudakshina Das <sudi.das@arm.com>
20
21 * arm-dis.c (print_insn_thumb32): Updated to accept new %G pattern.
22
031254f2
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232019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
24
25 * arm-dis.c (select_arm_features): Add logic for Armv8.1-M Mainline.
26
e5a557ac
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272019-04-12 John Darrington <john@darrington.wattle.id.au>
28
29 s12z-dis.c, s12z-opc.c, s12z-opc.h: Replace "operator" with
30 "optr". ("operator" is a reserved word in c++).
31
bd7ceb8d
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322019-04-11 Sudakshina Das <sudi.das@arm.com>
33
34 * aarch64-opc.c (aarch64_print_operand): Add case for
35 AARCH64_OPND_Rt_SP.
36 (verify_constraints): Likewise.
37 * aarch64-tbl.h (QL_LDST_AT): Update to add SP qualifier.
38 (struct aarch64_opcode): Update stg, stzg, st2g, stz2g instructions
39 to accept Rt|SP as first operand.
40 (AARCH64_OPERANDS): Add new Rt_SP.
41 * aarch64-asm-2.c: Regenerated.
42 * aarch64-dis-2.c: Regenerated.
43 * aarch64-opc-2.c: Regenerated.
44
e54010f1
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452019-04-11 Sudakshina Das <sudi.das@arm.com>
46
47 * aarch64-asm-2.c: Regenerated.
48 * aarch64-dis-2.c: Likewise.
49 * aarch64-opc-2.c: Likewise.
50 * aarch64-tbl.h (aarch64_opcode): Add new ldgm and stgm.
51
7e96e219
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522019-04-09 Robert Suchanek <robert.suchanek@mips.com>
53
54 * mips-opc.c (mips_builtin_opcodes): Add RDHWR rt rd sel.
55
6f2791d5
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562019-04-08 H.J. Lu <hongjiu.lu@intel.com>
57
58 * i386-opc.tbl: Consolidate AVX512 BF16 entries.
59 * i386-init.h: Regenerated.
60
e392bad3
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612019-04-07 Alan Modra <amodra@gmail.com>
62
63 * ppc-dis.c (print_insn_powerpc): Use a tiny state machine
64 op_separator to control printing of spaces, comma and parens
65 rather than need_comma, need_paren and spaces vars.
66
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672019-04-07 Alan Modra <amodra@gmail.com>
68
69 PR 24421
70 * arm-dis.c (print_insn_coprocessor): Correct bracket placement.
71 (print_insn_neon, print_insn_arm): Likewise.
72
d6aab7a1
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732019-04-05 Xuepeng Guo <xuepeng.guo@intel.com>
74
75 * i386-dis-evex.h (evex_table): Updated to support BF16
76 instructions.
77 * i386-dis.c (enum): Add EVEX_W_0F3852_P_1, EVEX_W_0F3872_P_1
78 and EVEX_W_0F3872_P_3.
79 * i386-gen.c (cpu_flag_init): Add CPU_AVX512_BF16_FLAGS.
80 (cpu_flags): Add bitfield for CpuAVX512_BF16.
81 * i386-opc.h (enum): Add CpuAVX512_BF16.
82 (i386_cpu_flags): Add bitfield for cpuavx512_bf16.
83 * i386-opc.tbl: Add AVX512 BF16 instructions.
84 * i386-init.h: Regenerated.
85 * i386-tbl.h: Likewise.
86
66e85460
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872019-04-05 Alan Modra <amodra@gmail.com>
88
89 * ppc-opc.c (XLBH_MASK): Subtract off BH field from BB_MASK.
90 (powerpc_opcodes): Reorder bcctr and bclr extended mnemonics
91 to favour printing of "-" branch hint when using the "y" bit.
92 Allow BH field on bc{ctr,lr,tar}{,l}{-,+}.
93
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942019-04-05 Alan Modra <amodra@gmail.com>
95
96 * ppc-dis.c (print_insn_powerpc): Delay printing spaces after
97 opcode until first operand is output.
98
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992019-04-04 Peter Bergner <bergner@linux.ibm.com>
100
101 PR gas/24349
102 * ppc-opc.c (valid_bo_pre_v2): Add comments.
103 (valid_bo_post_v2): Add support for 'at' branch hints.
104 (insert_bo): Only error on branch on ctr.
105 (get_bo_hint_mask): New function.
106 (insert_boe): Add new 'branch_taken' formal argument. Add support
107 for inserting 'at' branch hints.
108 (extract_boe): Add new 'branch_taken' formal argument. Add support
109 for extracting 'at' branch hints.
110 (insert_bom, extract_bom, insert_bop, extract_bop): New functions.
111 (BOE): Delete operand.
112 (BOM, BOP): New operands.
113 (RM): Update value.
114 (XLYLK, XLYLK_MASK, XLYBB_MASK): Delete.
115 (powerpc_opcodes) <bc-, bcl-, bca-, bcla-, bclr-, bclrl-, bcctr-,
116 bcctrl-, bctar-, bctarl->: Replace BOE with BOM.
117 (powerpc_opcodes) <bc+, bcl+, bca+, bcla+, bclr+, bclrl+, bcctr+,
118 bcctrl+, bctar+, bctarl+>: Replace BOE with BOP.
119 <bdnztar, bdnztarl, bdztar, bdztarl, btar, btarl, bdnztar-, bdnztarl-,
120 bdnztar+, bdnztarl+, bdztar-, bdztarl-, bdztar+, bdztarl+, bgetar,
121 bnltar, bgetarl, bnltarl, bletar, bngtar, bletarl, bngtarl, bnetar,
122 bnetarl, bnstar, bnutar, bnstarl, bnutarl, bgetar-, bnltar-, bgetarl-,
123 bnltarl-, bletar-, bngtar-, bletarl-, bngtarl-, bnetar-, bnetarl-,
124 bnstar-, bnutar-, bnstarl-, bnutarl-, bgetar+, bnltar+, bgetarl+,
125 bnltarl+, bletar+, bngtar+, bletarl+, bngtarl+, bnetar+, bnetarl+,
126 bnstar+, bnutar+, bnstarl+, bnutarl+, blttar, blttarl, bgttar, bgttarl,
127 beqtar, beqtarl, bsotar, buntar, bsotarl, buntarl, blttar-, blttarl-,
128 bgttar-, bgttarl-, beqtar-, beqtarl-, bsotar-, buntar-, bsotarl-,
129 buntarl-, blttar+, blttarl+, bgttar+, bgttarl+, beqtar+, beqtarl+,
130 bsotar+, buntar+, bsotarl+, buntarl+, bdnzftar, bdnzftarl, bdzftar,
131 bdzftarl, bftar, bftarl, bftar-, bftarl-, bftar+, bftarl+, bdnzttar,
132 bdnzttarl, bdzttar, bdzttarl, bttar, bttarl, bttar-, bttarl-, bttar+,
133 bttarl+>: New extended mnemonics.
134
96a86c01
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1352019-03-28 Alan Modra <amodra@gmail.com>
136
137 PR 24390
138 * ppc-opc.c (BTF): Define.
139 (powerpc_opcodes): Use for mtfsb*.
140 * ppc-dis.c (print_insn_powerpc): Print fields with both
141 PPC_OPERAND_CR_REG and PPC_OPERAND_CR_BIT as a plain number.
142
796d6298
TC
1432019-03-25 Tamar Christina <tamar.christina@arm.com>
144
145 * arm-dis.c (struct arm_private_data): Remove has_mapping_symbols.
146 (mapping_symbol_for_insn): Implement new algorithm.
147 (print_insn): Remove duplicate code.
148
60df3720
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1492019-03-25 Tamar Christina <tamar.christina@arm.com>
150
151 * aarch64-dis.c (print_insn_aarch64):
152 Implement override.
153
51457761
TC
1542019-03-25 Tamar Christina <tamar.christina@arm.com>
155
156 * aarch64-dis.c (print_insn_aarch64): Update the mapping symbol search
157 order.
158
53b2f36b
TC
1592019-03-25 Tamar Christina <tamar.christina@arm.com>
160
161 * aarch64-dis.c (last_stop_offset): New.
162 (print_insn_aarch64): Use stop_offset.
163
89199bb5
L
1642019-03-19 H.J. Lu <hongjiu.lu@intel.com>
165
166 PR gas/24359
167 * i386-gen.c (cpu_flag_init): Add CPU_ANY_AVX512F_FLAGS to
168 CPU_ANY_AVX2_FLAGS.
169 * i386-init.h: Regenerated.
170
97ed31ae
L
1712019-03-18 H.J. Lu <hongjiu.lu@intel.com>
172
173 PR gas/24348
174 * i386-opc.tbl: Add Optimize to vmovdqa32, vmovdqa64, vmovdqu8,
175 vmovdqu16, vmovdqu32 and vmovdqu64.
176 * i386-tbl.h: Regenerated.
177
0919bfe9
AK
1782019-03-12 Andreas Krebbel <krebbel@linux.ibm.com>
179
180 * s390-opc.txt: Rename selhhhr to selfhr. Remove optional operand
181 from vstrszb, vstrszh, and vstrszf.
182
1832019-03-12 Andreas Krebbel <krebbel@linux.ibm.com>
184
185 * s390-opc.txt: Add instruction descriptions.
186
21820ebe
JW
1872019-02-08 Jim Wilson <jimw@sifive.com>
188
189 * riscv-opc.c (riscv_opcodes) <beq>: Use Cz to compress 3 operand form.
190 <bne>: Likewise.
191
f7dd2fb2
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1922019-02-07 Tamar Christina <tamar.christina@arm.com>
193
194 * arm-dis.c (arm_opcodes): Redefine hlt to armv1.
195
6456d318
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1962019-02-07 Tamar Christina <tamar.christina@arm.com>
197
198 PR binutils/23212
199 * aarch64-opc.h (enum aarch64_field_kind): Add FLD_sz.
200 * aarch64-opc.c (verify_elem_sd): New.
201 (fields): Add FLD_sz entr.
202 * aarch64-tbl.h (_SIMD_INSN): New.
203 (aarch64_opcode_table): Add elem_sd verifier to fmla, fmls, fmul and
204 fmulx scalar and vector by element isns.
205
4a83b610
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2062019-02-07 Nick Clifton <nickc@redhat.com>
207
208 * po/sv.po: Updated Swedish translation.
209
fc60b8c8
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2102019-01-31 Andreas Krebbel <krebbel@linux.ibm.com>
211
212 * s390-mkopc.c (main): Accept arch13 as cpu string.
213 * s390-opc.c: Add new instruction formats and instruction opcode
214 masks.
215 * s390-opc.txt: Add new arch13 instructions.
216
e10620d3
TC
2172019-01-25 Sudakshina Das <sudi.das@arm.com>
218
219 * aarch64-tbl.h (QL_LDST_AT): Update macro.
220 (aarch64_opcode): Change encoding for stg, stzg
221 st2g and st2zg.
222 * aarch64-asm-2.c: Regenerated.
223 * aarch64-dis-2.c: Regenerated.
224 * aarch64-opc-2.c: Regenerated.
225
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2262019-01-25 Sudakshina Das <sudi.das@arm.com>
227
228 * aarch64-asm-2.c: Regenerated.
229 * aarch64-dis-2.c: Likewise.
230 * aarch64-opc-2.c: Likewise.
231 * aarch64-tbl.h (aarch64_opcode): Add new stzgm.
232
550fd7bf
SD
2332019-01-25 Sudakshina Das <sudi.das@arm.com>
234 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
235
236 * aarch64-asm.c (aarch64_ins_addr_simple_2): Remove.
237 * aarch64-asm.h (ins_addr_simple_2): Likeiwse.
238 * aarch64-dis.c (aarch64_ext_addr_simple_2): Likewise.
239 * aarch64-dis.h (ext_addr_simple_2): Likewise.
240 * aarch64-opc.c (operand_general_constraint_met_p): Remove
241 case for ldstgv_indexed.
242 (aarch64_print_operand): Remove case for AARCH64_OPND_ADDR_SIMPLE_2.
243 * aarch64-tbl.h (struct aarch64_opcode): Remove ldgv and stgv.
244 (AARCH64_OPERANDS): Remove ADDR_SIMPLE_2.
245 * aarch64-asm-2.c: Regenerated.
246 * aarch64-dis-2.c: Regenerated.
247 * aarch64-opc-2.c: Regenerated.
248
d9938630
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2492019-01-23 Nick Clifton <nickc@redhat.com>
250
251 * po/pt_BR.po: Updated Brazilian Portuguese translation.
252
375cd423
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2532019-01-21 Nick Clifton <nickc@redhat.com>
254
255 * po/de.po: Updated German translation.
256 * po/uk.po: Updated Ukranian translation.
257
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2582019-01-20 Chenghua Xu <paul.hua.gm@gmail.com>
259 * mips-dis.c (mips_arch_choices): Fix typo in
260 gs464, gs464e and gs264e descriptors.
261
f48dfe41
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2622019-01-19 Nick Clifton <nickc@redhat.com>
263
264 * configure: Regenerate.
265 * po/opcodes.pot: Regenerate.
266
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2672018-06-24 Nick Clifton <nickc@redhat.com>
268
269 2.32 branch created.
270
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2712019-01-09 John Darrington <john@darrington.wattle.id.au>
272
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273 * s12z-dis.c (print_insn_s12z): Do not dereference an operand
274 if it is null.
275 -dis.c (opr_emit_disassembly): Do not omit an index if it is
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JD
276 zero.
277
3107326d
AP
2782019-01-09 Andrew Paprocki <andrew@ishiboo.com>
279
280 * configure: Regenerate.
281
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2822019-01-07 Alan Modra <amodra@gmail.com>
283
284 * configure: Regenerate.
285 * po/POTFILES.in: Regenerate.
286
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2872019-01-03 John Darrington <john@darrington.wattle.id.au>
288
289 * s12z-opc.c: New file.
290 * s12z-opc.h: New file.
291 * s12z-dis.c: Removed all code not directly related to display
292 of instructions. Used the interface provided by the new files
293 instead.
294 * Makefile.am (TARGET_LIBOPCODES_CFILES) Add s12z-opc.c.
7e9ca91e 295 * Makefile.in: Regenerate.
ef1ad42b 296 * configure.ac (bfd_s12z_arch): Correct the dependencies.
7e9ca91e 297 * configure: Regenerate.
ef1ad42b 298
82704155
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2992019-01-01 Alan Modra <amodra@gmail.com>
300
301 Update year range in copyright notice of all files.
302
d5c04e1b 303For older changes see ChangeLog-2018
3499769a 304\f
d5c04e1b 305Copyright (C) 2019 Free Software Foundation, Inc.
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306
307Copying and distribution of this file, with or without modification,
308are permitted in any medium without royalty provided the copyright
309notice and this notice are preserved.
310
311Local Variables:
312mode: change-log
313left-margin: 8
314fill-column: 74
315version-control: never
316End:
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