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* arm-tdep.c (arm_return_value): Change type of readbuf and
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
db313fa6
DD		 12006-01-06 DJ Delorie <dj@redhat.com>
2
3 * m32c-desc.c: Regenerate.
4 * m32c-opc.c: Regenerate.
5 * m32c-opc.h: Regenerate.
6
54d46aca
DD		 72006-01-03 DJ Delorie <dj@redhat.com>
8
9 * cgen-ibld.in (extract_normal): Avoid memory range errors.
10 * m32c-ibld.c: Regenerated.
11
c85a332d
AM		 122005-12-27 Alan Modra <amodra@bigpond.net.au>
13
14 * Makefile.am: Run "make dep-am".
15 * Makefile.in: Regenerate.
16 * po/POTFILES.in: Regenerate.
17
54758c3e
NC		 182005-12-22 Laurent Menten <laurent.menten@teledisnet.be>
19
20 * pj-opc.c (jsr, ret, getstatic, putstatic, getfield, putfield,
21 invokevirtual, invokespecial, invokestatic, invokeinterface,
22 goto_w, jsr_w, ldc_quick, ldc_w_quick, ldc2_w_quick,
23 getfield_quick, putfield_quick, getfield2_quick, putfield2_quick,
24 getstatic_quick, putstatic_quick, getstatic2_quick,
25 putstatic2_quick, invokevirtual_quick, invokenonvirtual_quick,
26 invokesuper_quick, invokestatic_quick, invokeinterface_quick,
27 aastore_quick, new_quick, anewarray_quick, multianewarray_quick,
28 checkcast_quick, instanceof_quick, invokevirtiual_quick_w,
29 getfield_quick_w, putfield_quick_w, nonnull_quick,
30 agetfield_quick, aputfield_quick, agetstatic_quick,
31 aputstatic_quick, aldc_quick, aldc_w_quick, exit_sync_method): Fix
32 opcodes.
33
d031aafb
NS		 342005-12-16 Nathan Sidwell <nathan@codesourcery.com>
35
36 Second part of ms1 to mt renaming.
37 * Makefile.am (HFILES, CFILES, ALL_MACHINES): Adjust.
38 (stamp-mt): Adjust rule.
39 (mt-asm.lo, mt-desc.lo, mt-dis.lo, mt-ibld.lo, mt-opc.lo): Rename &
40 adjust.
41 * Makefile.in: Rebuilt.
42 * configure: Rebuilt.
43 * configure.in (bfd_mt_arch): Rename & adjust.
44 * disassemble.c (ARCH_mt): Renamed.
45 (disassembler): Adjust.
46 * mt-asm.c: Renamed, rebuilt.
47 * mt-desc.c: Renamed, rebuilt.
48 * mt-desc.h: Renamed, rebuilt.
49 * mt-dis.c: Renamed, rebuilt.
50 * mt-ibld.c: Renamed, rebuilt.
51 * mt-opc.c: Renamed, rebuilt.
52 * mt-opc.h: Renamed, rebuilt.
53
eda87aba
DD		 542005-12-13 DJ Delorie <dj@redhat.com>
55
56 * m32c-desc.c: Regenerate.
57 * m32c-opc.c: Regenerate.
58 * m32c-opc.h: Regenerate.
59
4970f871
NS		 602005-12-12 Nathan Sidwell <nathan@codesourcery.com>
61
62 * Makefile.am (CLEANFILES, CGEN_CPUS, MT_DEPS): Replace ms1 with mt.
63 * Makefile.in: Rebuilt.
64 * configure.in: Replace ms1 files with mt files.
65 * configure: Rebuilt.
66
272c9217
JB		 672005-12-08 Jan Beulich <jbeulich@novell.com>
68
69 * i386-dis.c (MAXLEN): Reduce to architectural limit.
70 (fetch_data): Check for sufficient buffer size.
71
422673a9
JB		 722005-12-08 Jan Beulich <jbeulich@novell.com>
73
74 * i386-dis.c (OP_ST): Remove prefix in Intel mode.
75
6e50d963
AM		 762005-12-08 Daniel Jacobowitz <dan@codesourcery.com>
77
78 * i386-dis.c (dofloat): Handle %rip-relative floating point addressing.
79
cf54500c
HPN		 802005-12-07 Hans-Peter Nilsson <hp@axis.com>
81
82 * cris-opc.c (cris_opcodes) <"move" "s,P">: Define using
83 MOVE_M_TO_PREG_OPCODE and MOVE_M_TO_PREG_ZBITS instead of constants.
84
cb712a9e
L		 852005-12-06 H.J. Lu <hongjiu.lu@intel.com>
86
87 PR gas/1874
88 * i386-dis.c (address_mode): New enum type.
89 (address_mode): New variable.
90 (mode_64bit): Removed.
91 (ckprefix): Updated to check address_mode instead of mode_64bit.
92 (prefix_name): Likewise.
93 (print_insn): Likewise.
94 (putop): Likewise.
95 (print_operand_value): Likewise.
96 (intel_operand_size): Likewise.
97 (OP_E): Likewise.
98 (OP_G): Likewise.
99 (set_op): Likewise.
100 (OP_REG): Likewise.
101 (OP_I): Likewise.
102 (OP_I64): Likewise.
103 (OP_OFF): Likewise.
104 (OP_OFF64): Likewise.
105 (ptr_reg): Likewise.
106 (OP_C): Likewise.
107 (SVME_Fixup): Likewise.
108 (print_insn): Set address_mode.
109 (PNI_Fixup): Add 64bit and address size override support for
110 monitor and mwait.
111
cdedc9f0
HPN		 1122005-12-06 Hans-Peter Nilsson <hp@axis.com>
113
114 * cris-dis.c (bytes_to_skip): Handle new parameter prefix_matchedp.
115 (print_with_operands): Check for prefix when [PC+] is seen.
116
3609e0fe
DB		 1172005-12-02 Dave Brolley <brolley@redhat.com>
118
119 * configure.in (cgen_files): Add cgen-bitset.lo.
120 (ta): Add cgen-bitset.lo when arch==bfd_cris_arch.
121 * Makefile.am (CFILES): Add cgen-bitset.c.
122 (ALL_MACHINES): Add cgen-bitset.lo.
123 (cgen-bitset.lo): New target.
6e50d963
AM		 124 * cgen-opc.c (cgen_bitset_create, cgen_bitset_init, cgen_bitset_clear)
125 (cgen_bitset_add, cgen_bitset_set, cgen_bitset_contains)
126 (cgen_bitset_compare, cgen_bitset_intersect_p, cgen_bitset_copy)
3609e0fe
DB		 127 (cgen_bitset_union): Moved from here ...
128 * cgen-bitset.c: ... to here. New file.
129 * Makefile.in: Regenerated.
130 * configure: Regenerated.
131
aa2273ba
JW		 1322005-11-22 James E Wilson <wilson@specifix.com>
133
134 * ia64-gen.c (_opcode_int64_low, _opcode_int64_high,
135 opcode_fprintf_vma): New.
136 (print_main_table): New opcode_fprintf_vma instead of fprintf_vma.
137
ce7a772b
AM		 1382005-11-16 Alan Modra <amodra@bigpond.net.au>
139
140 * ppc-opc.c (powerpc_opcodes): Add frin,friz,frip,frim. Correct
141 frsqrtes.
142
0499d65b
TS		 1432005-11-14 David Ung <davidu@mips.com>
144
145 * mips16-opc.c: Add MIPS16e save/restore opcodes.
146 * mips-dis.c (print_mips16_insn_arg): Handle printing of 'm'/'M'
147 codes for save/restore.
148
dc82c973
AS		 1492005-11-10 Andreas Schwab <schwab@suse.de>
150
151 * m68k-dis.c (print_insn_m68k): Only match FPU insns with
152 coprocessor ID 1.
153
dbb33a87
NC		 1542005-11-08 H.J. Lu <hongjiu.lu@intel.com>
155
156 * m32c-desc.c: Regenerated.
157
6f84a2a6
NS		 1582005-11-08 Nathan Sidwell <nathan@codesourcery.com>
159
160 Add ms2.
161 * ms1-asm.c, ms1-desc.c, ms1-desc.h, ms1-dis.c, ms1-ibld.c,
162 ms1-opc.c, ms1-opc.h: Regenerated.
163
a541e3ce
SE		 1642005-11-07 Steve Ellcey <sje@cup.hp.com>
165
166 * configure: Regenerate after modifying bfd/warning.m4.
167
3e7d61b2
AM		 1682005-11-07 Alan Modra <amodra@bigpond.net.au>
169
170 * i386-dis.c (ckprefix): Handle rex on fwait. Don't print
171 ignored rex prefixes here.
172 (print_insn): Instead, handle them similarly to fwait followed
173 by non-fp insns.
174
a92e0d0a
L		 1752005-11-02 H.J. Lu <hongjiu.lu@intel.com>
176
177 * iq2000-desc.c: Regenerated.
178 * iq2000-desc.h: Likewise.
179 * iq2000-dis.c: Likewise.
180 * iq2000-opc.c: Likewise.
181
36b0c57d
PB		 1822005-11-02 Paul Brook <paul@codesourcery.com>
183
184 * arm-dis.c (print_insn_thumb32): Word align blx target address.
185
9a2ff3f5
AM		 1862005-10-31 Alan Modra <amodra@bigpond.net.au>
187
188 * arm-dis.c (print_insn): Warning fix.
189
9e5169a8
L		 1902005-10-30 H.J. Lu <hongjiu.lu@intel.com>
191
192 * Makefile.am: Run "make dep-am".
193 * Makefile.in: Regenerated.
194
195 * dep-in.sed: Replace " ./" with " ".
196
fb53f5a8
DB		 1972005-10-28 Dave Brolley <brolley@redhat.com>
198
199 * All CGEN-generated sources: Regenerate.
200
201 Contribute the following changes:
202 2005-09-19 Dave Brolley <brolley@redhat.com>
203
204 * disassemble.c (disassemble_init_for_target): Add 'break' to case for
205 bfd_arch_tic4x. Use cgen_bitset_create and cgen_bitset_set for
206 bfd_arch_m32c case.
207
208 2005-02-16 Dave Brolley <brolley@redhat.com>
209
210 * cgen-dis.in: Rename CGEN_ISA_MASK to CGEN_BITSET. Rename
211 cgen_isa_mask_* to cgen_bitset_*.
212 * cgen-opc.c: Likewise.
213
214 2003-11-28 Richard Sandiford <rsandifo@redhat.com>
215
216 * cgen-dis.in (print_insn_@arch@): Fix comparison with cached isas.
217 * *-dis.c: Regenerate.
218
219 2003-06-05 DJ Delorie <dj@redhat.com>
220
221 * cgen-dis.in (print_insn_@arch@): Copy prev_isas, don't assign
222 it, as it may point to a reused buffer. Set prev_isas when we
223 change cpus.
224
225 2002-12-13 Dave Brolley <brolley@redhat.com>
226
227 * cgen-opc.c (cgen_isa_mask_create): New support function for
228 CGEN_ISA_MASK.
229 (cgen_isa_mask_init): Ditto.
230 (cgen_isa_mask_clear): Ditto.
231 (cgen_isa_mask_add): Ditto.
232 (cgen_isa_mask_set): Ditto.
233 (cgen_isa_supported): Ditto.
234 (cgen_isa_mask_compare): Ditto.
235 (cgen_isa_mask_intersection): Ditto.
236 (cgen_isa_mask_copy): Ditto.
237 (cgen_isa_mask_combine): Ditto.
238 * cgen-dis.in (libiberty.h): #include it.
239 (isas): Renamed from 'isa' and now (CGEN_ISA_MASK *).
240 (print_insn_@arch@): Use CGEN_ISA_MASK and support functions.
241 * Makefile.am (CGENDEPS): Add utils-cgen.scm and attrs.scm.
242 * Makefile.in: Regenerated.
243
c6552317
DD		 2442005-10-27 DJ Delorie <dj@redhat.com>
245
246 * m32c-asm.c: Regenerate.
247 * m32c-desc.c: Regenerate.
248 * m32c-desc.h: Regenerate.
249 * m32c-dis.c: Regenerate.
250 * m32c-ibld.c: Regenerate.
251 * m32c-opc.c: Regenerate.
252 * m32c-opc.h: Regenerate.
253
f75eb1c0
DD		 2542005-10-26 DJ Delorie <dj@redhat.com>
255
256 * m32c-asm.c: Regenerate.
257 * m32c-desc.c: Regenerate.
258 * m32c-desc.h: Regenerate.
259 * m32c-dis.c: Regenerate.
260 * m32c-ibld.c: Regenerate.
261 * m32c-opc.c: Regenerate.
262 * m32c-opc.h: Regenerate.
263
f1022c90
PB		 2642005-10-26 Paul Brook <paul@codesourcery.com>
265
266 * arm-dis.c (arm_opcodes): Correct "sel" entry.
267
e277c00b
AM		 2682005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
269
270 * m32r-asm.c: Regenerate.
271
92e0a941
DD		 2722005-10-25 DJ Delorie <dj@redhat.com>
273
274 * m32c-asm.c: Regenerate.
275 * m32c-desc.c: Regenerate.
276 * m32c-desc.h: Regenerate.
277 * m32c-dis.c: Regenerate.
278 * m32c-ibld.c: Regenerate.
279 * m32c-opc.c: Regenerate.
280 * m32c-opc.h: Regenerate.
281
3c9b82ba
NC		 2822005-10-25 Arnold Metselaar <arnold.metselaar@planet.nl>
283
284 * configure.in: Add target architecture bfd_arch_z80.
285 * configure: Regenerated.
3e7d61b2 286 * disassemble.c (disassembler)<ARCH_z80>: Add case
3c9b82ba
NC		 287 bfd_arch_z80.
288 * z80-dis.c: New file.
289
3caac5b8
AM		 2902005-10-25 Alan Modra <amodra@bigpond.net.au>
291
292 * po/POTFILES.in: Regenerate.
293 * po/opcodes.pot: Regenerate.
294
6a2375c6
JB		 2952005-10-24 Jan Beulich <jbeulich@novell.com>
296
297 * ia64-asmtab.c: Regenerate.
298
a1a280bb
DD		 2992005-10-21 DJ Delorie <dj@redhat.com>
300
301 * m32c-asm.c: Regenerate.
302 * m32c-desc.c: Regenerate.
303 * m32c-desc.h: Regenerate.
304 * m32c-dis.c: Regenerate.
305 * m32c-ibld.c: Regenerate.
306 * m32c-opc.c: Regenerate.
307 * m32c-opc.h: Regenerate.
308
b7d48530
NC		 3092005-10-21 Nick Clifton <nickc@redhat.com>
310
311 * bfin-dis.c: Tidy up code, removing redundant constructs.
312
8dd744b6
MS		 3132005-10-19 Martin Schwidefsky <schwidefsky@de.ibm.com>
314
315 * s390-opc.txt: Add unnormalized hfp multiply and multiply-and-add
316 instructions.
317
e74eb924
NC		 3182005-10-18 Nick Clifton <nickc@redhat.com>
319
320 * m32r-asm.c: Regenerate after updating m32r.opc.
321
471e4e36
JZ		 3222005-10-18 Jie Zhang <jie.zhang@analog.com>
323
324 * bfin-dis.c (print_insn_bfin): Do proper endian transform when
325 reading instruction from memory.
326
5e03663f
NC		 3272005-10-18 Nick Clifton <nickc@redhat.com>
328
329 * m32r-asm.c: Regenerate after updating m32r.opc.
330
ab7c9a26
NC		 3312005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
332
333 * m32r-asm.c: Regenerate after updating m32r.opc.
334
19590ef7
RE		 3352005-10-08 James Lemke <jim@wasabisystems.com>
336
337 * arm-dis.c (coprocessor_opcodes): Fix mask for various Maverick CDP
338 operations.
339
6edfbbad
DJ		 3402005-10-06 Daniel Jacobowitz <dan@codesourcery.com>
341
342 * ppc-dis.c (struct dis_private): Remove.
343 (powerpc_dialect): Avoid aliasing warnings.
344 (print_insn_big_powerpc, print_insn_little_powerpc): Likewise.
345
095f2843
NC		 3462005-09-30 Nick Clifton <nickc@redhat.com>
347
348 * po/ga.po: New Irish translation.
349 * configure.in (ALL_LINGUAS): Add "ga".
350 * configure: Regenerate.
351
fdd3b9b3
L		 3522005-09-30 H.J. Lu <hongjiu.lu@intel.com>
353
354 * Makefile.am: Run "make dep-am".
355 * Makefile.in: Regenerated.
356 * aclocal.m4: Likewise.
357 * configure: Likewise.
358
4b7f6baa
CM		 3592005-09-30 Catherine Moore <clm@cm00re.com>
360
361 * Makefile.am: Bfin support.
362 * Makefile.in: Regenerated.
363 * aclocal.m4: Regenerated.
364 * bfin-dis.c: New file.
365 * configure.in: Bfin support.
366 * configure: Regenerated.
367 * disassemble.c (ARCH_bfin): Define.
368 (disassembler): Add case for bfd_arch_bfin.
369
1a114b12
JB		 3702005-09-28 Jan Beulich <jbeulich@novell.com>
371
372 * i386-dis.c (stack_v_mode): Renamed from branch_v_mode.
373 (indirEv): Use it.
374 (stackEv): New.
375 (Ob64, Ov64): Rename to Ob, Ov. Delete unused original definitions.
376 (dis386): Document and use new 'V' meta character. Use it for
377 single-byte push/pop opcode forms. Use stackEv for mod-r/m push/pop
378 opcode forms. Correct typo in 'pop ss'. Replace Ob64/Ov64 by Ob/Ov.
379 (putop): 'q' suffix for 'T' and 'U' meta depends on DFLAG. Mark
380 data prefix as used whenever DFLAG was examined. Handle 'V'.
381 (intel_operand_size): Use stack_v_mode.
382 (OP_E): Use stack_v_mode, but handle only the special case of
383 64-bit mode without operand size override here; fall through to
384 v_mode case otherwise.
385 (OP_REG): Special case rAX_reg ... rDI_reg only when 64-bit mode
386 and no operand size override is present.
387 (OP_J): Use get32s for obtaining the displacement also when rex64
388 is present.
389
3eb17e6b
PB		 3902005-09-08 Paul Brook <paul@codesourcery.com>
391
392 * arm-dis.c (arm_opcodes, thumb32_opcodes): Rename smi to smc.
393
61cc0267
CF		 3942005-09-06 Chao-ying Fu <fu@mips.com>
395
396 * mips-opc.c (MT32): New define.
397 (mips_builtin_opcodes): Move "bc0f", "bc0fl", "bc0t", "bc0tl" to the
398 bottom to avoid opcode collision with "mftr" and "mttr".
399 Add MT instructions.
400 * mips-dis.c (mips_arch_choices): Enable INSN_MT for mips32r2.
401 (print_insn_args): Add supports for +t, +T, !, $, *, &, g operand
402 formats.
403
b13dd07a
PB		 4042005-09-02 Paul Brook <paul@codesourcery.com>
405
406 * arm-dis.c (coprocessor_opcodes): Add null terminator.
407
8f06b2d8
PB		 4082005-09-02 Paul Brook <paul@codesourcery.com>
409
410 * arm-dis.c (coprocessor_opcodes): New.
411 (arm_opcodes, thumb32_opcodes): Remove coprocessor insns.
412 (print_insn_coprocessor): New function.
413 (print_insn_arm): Use print_insn_coprocessor. Remove coprocessor
414 format characters.
415 (print_insn_thumb32): Use print_insn_coprocessor.
416
a2dfd01f
PB		 4172005-08-30 Paul Brook <paul@codesourcery.com>
418
419 * arm-dis.c (thumb_opcodes): Disassemble sub(3) as subs.
420
3f31e633
JB		 4212005-08-26 Jan Beulich <jbeulich@novell.com>
422
423 * i386-dis.c (intel_operand_size): New, broken out from OP_E for
424 re-use.
425 (OP_E): Call intel_operand_size, move call site out of mode
426 dependent code.
427 (OP_OFF): Call intel_operand_size if suffix_always. Remove
428 ATTRIBUTE_UNUSED from parameters.
429 (OP_OFF64): Likewise.
430 (OP_ESreg): Call intel_operand_size.
431 (OP_DSreg): Likewise.
432 (OP_DIR): Use colon rather than semicolon as separator of far
433 jump/call operands.
434
fd25c5a9
CF		 4352005-08-25 Chao-ying Fu <fu@mips.com>
436
437 * mips-opc.c (WR_a, RD_a, MOD_a, DSP_VOLA, D32): New define.
438 (mips_builtin_opcodes): Add DSP instructions.
439 * mips-dis.c (mips_arch_choices): Enable INSN_DSP for mips32, mips32r2,
440 mips64, mips64r2.
441 (print_insn_args): Add supports for 3, 4, 5, 6, 7, 8, 9, 0, :, ', @
442 operand formats.
443
dd8b7c22
DU		 4442005-08-23 David Ung <davidu@mips.com>
445
446 * mips16-opc.c (mips16_opcodes): Add the MIPS16e jalrc/jrc
3e7d61b2 447 instructions to the table.
dd8b7c22 448
c17ae8a2
AM		 4492005-08-18 Alan Modra <amodra@bigpond.net.au>
450
848cf006 451 * a29k-dis.c: Delete.
c17ae8a2
AM		 452 * Makefile.am: Remove a29k support.
453 * configure.in: Likewise.
454 * disassemble.c: Likewise.
455 * Makefile.in: Regenerate.
456 * configure: Regenerate.
457 * po/POTFILES.in: Regenerate.
458
36ae0db3
DJ		 4592005-08-15 Daniel Jacobowitz <dan@codesourcery.com>
460
461 * ppc-dis.c (powerpc_dialect): Handle e300.
462 (print_ppc_disassembler_options): Likewise.
463 * ppc-opc.c (PPCE300): Define.
464 (powerpc_opcodes): Mark icbt as available for the e300.
465
63a3357b
DA		 4662005-08-13 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
467
468 * hppa-dis.c (print_insn_hppa): Don't print '%' before register names.
469 Use "rp" instead of "%r2" in "b,l" insns.
470
ad101263
MS		 4712005-08-12 Martin Schwidefsky <schwidefsky@de.ibm.com>
472
473 * s390-dis.c (print_insn_s390): Print unsigned operands with %u.
474 * s390-mkopc.c (s390_opcode_cpu_val): Add support for cpu type z9-109.
475 (main): Likewise.
476 * s390-opc.c (I32_16, U32_16, M_16): Add defines 32 bit immediates
477 and 4 bit optional masks.
478 (INSTR_RIL_RI, INSTR_RIL_RU, INSTR_RRF_M0RR, INSTR_RSE_CCRD,
479 INSTR_RSY_CCRD, INSTR_SSF_RRDRD): Add new instruction formats.
480 (MASK_RIL_RI, MASK_RIL_RU, MASK_RRF_M0RR, MASK_RSE_CCRD,
481 MASK_RSY_CCRD, MASK_SSF_RRDRD): Likewise.
482 (s390_opformats): Likewise.
483 * s390-opc.txt: Add new instructions for cpu type z9-109.
484
f1fa1093
DA		 4852005-08-05 John David Anglin <dave.anglin@nrc-crnc.gc.ca>
486
487 * hppa-dis.c (print_insn_hppa): Prefix 21-bit values with "L%".
488
e9f89963
PB		 4892005-07-29 Paul Brook <paul@codesourcery.com>
490
491 * arm-dis.c: Fix disassebly of thumb2 writeback addressing modes.
492
92e90b6e
PB		 4932005-07-29 Paul Brook <paul@codesourcery.com>
494
495 * arm-dis.c (thumb32_opc): Fix addressing mode for tbh.
496 (print_insn_thumb32): Fix decoding of thumb2 'I' operands.
497
fd54057a
DD		 4982005-07-25 DJ Delorie <dj@redhat.com>
499
500 * m32c-asm.c Regenerate.
501 * m32c-dis.c Regenerate.
502
760c0f6a
DD		 5032005-07-20 DJ Delorie <dj@redhat.com>
504
505 * disassemble.c (disassemble_init_for_target): M32C ISAs are
506 enums, so convert them to bit masks, which attributes are.
507
85da3a56
NC		 5082005-07-18 Nick Clifton <nickc@redhat.com>
509
510 * configure.in: Restore alpha ordering to list of arches.
511 * configure: Regenerate.
512 * disassemble.c: Restore alpha ordering to list of arches.
513
5142005-07-18 Nick Clifton <nickc@redhat.com>
515
516 * m32c-asm.c: Regenerate.
517 * m32c-desc.c: Regenerate.
518 * m32c-desc.h: Regenerate.
519 * m32c-dis.c: Regenerate.
520 * m32c-ibld.h: Regenerate.
521 * m32c-opc.c: Regenerate.
522 * m32c-opc.h: Regenerate.
523
22cbf2e7
L		 5242005-07-18 H.J. Lu <hongjiu.lu@intel.com>
525
526 * i386-dis.c (PNI_Fixup): Update comment.
527 (VMX_Fixup): Properly handle the suffix check.
528
0aea0460
DA		 5292005-07-16 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
530
531 * hppa-dis.c (print_insn_hppa): Add space after 'w' in wide-mode
532 mfctl disassembly.
533
0f82ff91
AM		 5342005-07-16 Alan Modra <amodra@bigpond.net.au>
535
536 * Makefile.am: Run "make dep-am".
537 (stamp-m32c): Fix cpu dependencies.
538 * Makefile.in: Regenerate.
539 * ip2k-dis.c: Regenerate.
540
90700ea2
L		 5412007-07-15 H.J. Lu <hongjiu.lu@intel.com>
542
543 * i386-dis.c (OP_VMX): New. Handle Intel VMX Instructions.
544 (VMX_Fixup): New. Fix up Intel VMX Instructions.
545 (Em): New.
546 (Gm): New.
547 (VM): New.
548 (dis386_twobyte): Updated entries 0x78 and 0x79.
549 (twobyte_has_modrm): Likewise.
550 (grps): Use OP_VMX in the "sgdtIQ" entry. Updated GRP9.
551 (OP_G): Handle m_mode.
552
49f58d10
JB		 5532005-07-14 Jim Blandy <jimb@redhat.com>
554
555 Add support for the Renesas M32C and M16C.
556 * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
557 * m32c-desc.h, m32c-opc.h: New.
558 * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
559 (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
560 m32c-opc.c.
561 (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
562 m32c-ibld.lo, m32c-opc.lo.
563 (CLEANFILES): List stamp-m32c.
564 (M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
565 (CGEN_CPUS): Add m32c.
566 (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
567 (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
568 (m32c_opc_h): New variable.
569 (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
570 (m32c-opc.lo): New rules.
571 * Makefile.in: Regenerated.
572 * configure.in: Add case for bfd_m32c_arch.
573 * configure: Regenerated.
574 * disassemble.c (ARCH_m32c): New.
575 [ARCH_m32c]: #include "m32c-desc.h".
576 (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
577 (disassemble_init_for_target) [ARCH_m32c]: Same.
578
579 * cgen-ops.h, cgen-types.h: New files.
580 * Makefile.am (HFILES): List them.
581 * Makefile.in: Regenerated.
3e7d61b2 582
0fd3a477
JW		 5832005-07-07 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
584
585 * arc-dis.c, arm-dis.c, cris-dis.c, crx-dis.c, d10v-dis.c,
586 d30v-dis.c, fr30-dis.c, h8300-dis.c, h8500-dis.c, i860-dis.c,
587 ia64-dis.c, ip2k-dis.c, m10200-dis.c, m10300-dis.c,
588 m88k-dis.c, mcore-dis.c, mips-dis.c, ms1-dis.c, or32-dis.c,
589 ppc-dis.c, sh64-dis.c, sparc-dis.c, tic4x-dis.c, tic80-dis.c,
590 v850-dis.c: Fix format bugs.
591 * ia64-gen.c (fail, warn): Add format attribute.
592 * or32-opc.c (debug): Likewise.
593
22f8fcbd
NC		 5942005-07-07 Khem Raj <kraj@mvista.com>
595
596 * arm-dis.c (opcode32 arm_opcodes): Fix ARM VFP fadds instruction
597 disassembly pattern.
598
d125c27b
AM		 5992005-07-06 Alan Modra <amodra@bigpond.net.au>
600
601 * Makefile.am (stamp-m32r): Fix path to cpu files.
602 (stamp-m32r, stamp-iq2000): Likewise.
603 * Makefile.in: Regenerate.
604 * m32r-asm.c: Regenerate.
605 * po/POTFILES.in: Remove arm-opc.h. Add ms1-asm.c, ms1-desc.c,
606 ms1-desc.h, ms1-dis.c, ms1-ibld.c, ms1-opc.c, ms1-opc.h.
607
3ec2b351
NC		 6082005-07-05 Nick Clifton <nickc@redhat.com>
609
610 * iq2000-asm.c: Regenerate.
611 * ms1-asm.c: Regenerate.
612
30123838
JB		 6132005-07-05 Jan Beulich <jbeulich@novell.com>
614
615 * i386-dis.c (SVME_Fixup): New.
616 (grps): Use it for the lidt entry.
617 (PNI_Fixup): Call OP_M rather than OP_E.
618 (INVLPG_Fixup): Likewise.
619
b0eec63e
L		 6202005-07-04 H.J. Lu <hongjiu.lu@intel.com>
621
622 * tic30-dis.c (cnvt_tmsfloat_ieee): Use HUGE_VALF if defined.
623
47b0e7ad
NC		 6242005-07-01 Nick Clifton <nickc@redhat.com>
625
626 * a29k-dis.c: Update to ISO C90 style function declarations and
627 fix formatting.
628 * alpha-opc.c: Likewise.
629 * arc-dis.c: Likewise.
630 * arc-opc.c: Likewise.
631 * avr-dis.c: Likewise.
632 * cgen-asm.in: Likewise.
633 * cgen-dis.in: Likewise.
634 * cgen-ibld.in: Likewise.
635 * cgen-opc.c: Likewise.
636 * cris-dis.c: Likewise.
637 * d10v-dis.c: Likewise.
638 * d30v-dis.c: Likewise.
639 * d30v-opc.c: Likewise.
640 * dis-buf.c: Likewise.
641 * dlx-dis.c: Likewise.
642 * h8300-dis.c: Likewise.
643 * h8500-dis.c: Likewise.
644 * hppa-dis.c: Likewise.
645 * i370-dis.c: Likewise.
646 * i370-opc.c: Likewise.
647 * m10200-dis.c: Likewise.
648 * m10300-dis.c: Likewise.
649 * m68k-dis.c: Likewise.
650 * m88k-dis.c: Likewise.
651 * mips-dis.c: Likewise.
652 * mmix-dis.c: Likewise.
653 * msp430-dis.c: Likewise.
654 * ns32k-dis.c: Likewise.
655 * or32-dis.c: Likewise.
656 * or32-opc.c: Likewise.
657 * pdp11-dis.c: Likewise.
658 * pj-dis.c: Likewise.
659 * s390-dis.c: Likewise.
660 * sh-dis.c: Likewise.
661 * sh64-dis.c: Likewise.
662 * sparc-dis.c: Likewise.
663 * sparc-opc.c: Likewise.
664 * sysdep.h: Likewise.
665 * tic30-dis.c: Likewise.
666 * tic4x-dis.c: Likewise.
667 * tic80-dis.c: Likewise.
668 * v850-dis.c: Likewise.
669 * v850-opc.c: Likewise.
670 * vax-dis.c: Likewise.
671 * w65-dis.c: Likewise.
672 * z8kgen.c: Likewise.
3e7d61b2 673
47b0e7ad
NC		 674 * fr30-*: Regenerate.
675 * frv-*: Regenerate.
676 * ip2k-*: Regenerate.
677 * iq2000-*: Regenerate.
678 * m32r-*: Regenerate.
679 * ms1-*: Regenerate.
680 * openrisc-*: Regenerate.
681 * xstormy16-*: Regenerate.
682
cc16ba8c
BE		 6832005-06-23 Ben Elliston <bje@gnu.org>
684
685 * m68k-dis.c: Use ISC C90.
686 * m68k-opc.c: Formatting fixes.
687
4b185e97
DU		 6882005-06-16 David Ung <davidu@mips.com>
689
3e7d61b2
AM		 690 * mips16-opc.c (mips16_opcodes): Add the following MIPS16e
691 instructions to the table; seb/seh/sew/zeb/zeh/zew.
4b185e97 692
ac188222
DB		 6932005-06-15 Dave Brolley <brolley@redhat.com>
694
695 Contribute Morpho ms1 on behalf of Red Hat
3e7d61b2 696 * ms1-asm.c, ms1-desc.c, ms1-dis.c, ms1-ibld.c, ms1-opc.c,
ac188222
DB		 697 ms1-opc.h: New files, Morpho ms1 target.
698
699 2004-05-14 Stan Cox <scox@redhat.com>
700
701 * disassemble.c (ARCH_ms1): Define.
702 (disassembler): Handle bfd_arch_ms1
703
704 2004-05-13 Michael Snyder <msnyder@redhat.com>
705
706 * Makefile.am, Makefile.in: Add ms1 target.
707 * configure.in: Ditto.
708
6b5d3a4d
ZW		 7092005-06-08 Zack Weinberg <zack@codesourcery.com>
710
711 * arm-opc.h: Delete; fold contents into ...
712 * arm-dis.c: ... here. Move includes of internal COFF headers
713 next to includes of internal ELF headers.
714 (streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
715 (struct arm_opcode): Rename struct opcode32. Make 'assembler' const.
716 (struct thumb_opcode): Rename struct opcode16. Make 'assembler' const.
717 (arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
718 (iwmmxt_wwnames, iwmmxt_wwssnames):
719 Make const.
720 (regnames): Remove iWMMXt coprocessor register sets.
721 (iwmmxt_regnames, iwmmxt_cregnames): New statics.
722 (get_arm_regnames): Adjust fourth argument to match above changes.
723 (set_iwmmxt_regnames): Delete.
724 (print_insn_arm): Constify 'c'. Use ISO syntax for function
725 pointer calls. Expand sole use of BDISP. Use iwmmxt_regnames
726 and iwmmxt_cregnames, not set_iwmmxt_regnames.
727 (print_insn_thumb16, print_insn_thumb32): Constify 'c'. Use
728 ISO syntax for function pointer calls.
729
4a5329c6
ZW		 7302005-06-07 Zack Weinberg <zack@codesourcery.com>
731
732 * arm-dis.c: Split up the comments describing the format codes, so
733 that the ARM and 16-bit Thumb opcode tables each have comments
734 preceding them that describe all the codes, and only the codes,
735 valid in those tables. (32-bit Thumb table is already like this.)
736 Reorder the lists in all three comments to match the order in
737 which the codes are implemented.
738 Remove all forward declarations of static functions. Convert all
739 function definitions to ISO C format.
740 (print_insn_arm, print_insn_thumb16, print_insn_thumb32):
741 Return nothing.
742 (print_insn_thumb16): Remove unused case 'I'.
743 (print_insn): Update for changed calling convention of subroutines.
744
3d456fa1
JB		 7452005-05-25 Jan Beulich <jbeulich@novell.com>
746
747 * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
748 hex (but retain it being displayed as signed). Remove redundant
749 checks. Add handling of displacements for 16-bit addressing in Intel
750 mode.
751
2888cb7a
JB		 7522005-05-25 Jan Beulich <jbeulich@novell.com>
753
754 * i386-dis.c (prefix_name): Remove pointless mode_64bit check.
755 (OP_E): Remove redundant REX_EXTZ handling. Remove pointless
756 masking of 'rm' in 16-bit memory address handling.
757
1ed8e1e4
AM		 7582005-05-19 Anton Blanchard <anton@samba.org>
759
760 * ppc-dis.c (powerpc_dialect): Handle "-Mpower5".
761 (print_ppc_disassembler_options): Document it.
762 * ppc-opc.c (SVC_LEV): Define.
763 (LEV): Allow optional operand.
764 (POWER5): Define.
765 (powerpc_opcodes): Extend "sc". Adjust "svc" and "svcl". Add
766 "hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
767
49cc2e69
KC		 7682005-05-19 Kelley Cook <kcook@gcc.gnu.org>
769
770 * Makefile.in: Regenerate.
771
c19d1205
ZW		 7722005-05-17 Zack Weinberg <zack@codesourcery.com>
773
774 * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
775 instructions. Adjust disassembly of some opcodes to match
776 unified syntax.
777 (thumb32_opcodes): New table.
778 (print_insn_thumb): Rename print_insn_thumb16; don't handle
779 two-halfword branches here.
780 (print_insn_thumb32): New function.
781 (print_insn): Choose among print_insn_arm, print_insn_thumb16,
782 and print_insn_thumb32. Be consistent about order of
783 halfwords when printing 32-bit instructions.
784
003519a7
L		 7852005-05-07 H.J. Lu <hongjiu.lu@intel.com>
786
787 PR 843
788 * i386-dis.c (branch_v_mode): New.
789 (indirEv): Use branch_v_mode instead of v_mode.
790 (OP_E): Handle branch_v_mode.
791
920a34a7
L		 7922005-05-07 H.J. Lu <hongjiu.lu@intel.com>
793
794 * d10v-dis.c (dis_2_short): Support 64bit host.
795
5de773c1
NC		 7962005-05-07 Nick Clifton <nickc@redhat.com>
797
798 * po/nl.po: Updated translation.
799
f4321104
NC		 8002005-05-07 Nick Clifton <nickc@redhat.com>
801
802 * Update the address and phone number of the FSF organization in
803 the GPL notices in the following files:
804 a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
805 arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
806 avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
807 cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
808 crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
809 d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
810 fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
811 fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
812 frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
813 h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
814 i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
815 ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
816 ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
817 ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
818 ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
819 iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
820 iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
821 m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
822 m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
823 m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
824 maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
825 mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
826 openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
827 openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
828 or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
829 pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
830 s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
831 sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
832 tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
833 v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
834 xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
835 xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
836 xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
837
10b076a2
JW		 8382005-05-05 James E Wilson <wilson@specifixinc.com>
839
840 * ia64-opc.c: Include sysdep.h before libiberty.h.
841
022716b6
NC		 8422005-05-05 Nick Clifton <nickc@redhat.com>
843
844 * configure.in (ALL_LINGUAS): Add vi.
845 * configure: Regenerate.
846 * po/vi.po: New.
847
db5152b4
JG		 8482005-04-26 Jerome Guitton <guitton@gnat.com>
849
850 * configure.in: Fix the check for basename declaration.
851 * configure: Regenerate.
852
eed0d89a
AM		 8532005-04-19 Alan Modra <amodra@bigpond.net.au>
854
855 * ppc-opc.c (RTO): Define.
856 (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
857 entries to suit PPC440.
858
791fe849
MK		 8592005-04-18 Mark Kettenis <kettenis@gnu.org>
860
861 * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
862 Add xcrypt-ctr.
863
ffe58f7c
NC		 8642005-04-14 Nick Clifton <nickc@redhat.com>
865
866 * po/fi.po: New translation: Finnish.
867 * configure.in (ALL_LINGUAS): Add fi.
868 * configure: Regenerate.
869
9e9b66a9
AM		 8702005-04-14 Alan Modra <amodra@bigpond.net.au>
871
872 * Makefile.am (NO_WERROR): Define.
873 * configure.in: Invoke AM_BINUTILS_WARNINGS.
874 * Makefile.in: Regenerate.
875 * aclocal.m4: Regenerate.
876 * configure: Regenerate.
877
9494d739
NC		 8782005-04-04 Nick Clifton <nickc@redhat.com>
879
880 * fr30-asm.c: Regenerate.
881 * frv-asm.c: Regenerate.
882 * iq2000-asm.c: Regenerate.
883 * m32r-asm.c: Regenerate.
884 * openrisc-asm.c: Regenerate.
885
6128c599
JB		 8862005-04-01 Jan Beulich <jbeulich@novell.com>
887
888 * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
889 visible operands in Intel mode. The first operand of monitor is
890 %rax in 64-bit mode.
891
373ff435
JB		 8922005-04-01 Jan Beulich <jbeulich@novell.com>
893
894 * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
895 easier future additions.
896
4bd60896
JG		 8972005-03-31 Jerome Guitton <guitton@gnat.com>
898
899 * configure.in: Check for basename.
900 * configure: Regenerate.
901 * config.in: Ditto.
902
4cc91dba
L		 9032005-03-29 H.J. Lu <hongjiu.lu@intel.com>
904
905 * i386-dis.c (SEG_Fixup): New.
906 (Sv): New.
907 (dis386): Use "Sv" for 0x8c and 0x8e.
908
ec72cfe5
NC		 9092005-03-21 Jan-Benedict Glaw <jbglaw@lug-owl.de>
910 Nick Clifton <nickc@redhat.com>
c19d1205 911
ec72cfe5
NC		 912 * vax-dis.c: (entry_addr): New varible: An array of user supplied
913 function entry mask addresses.
914 (entry_addr_occupied_slots): New variable: The number of occupied
c19d1205 915 elements in entry_addr.
ec72cfe5
NC		 916 (entry_addr_total_slots): New variable: The total number of
917 elements in entry_addr.
918 (parse_disassembler_options): New function. Fills in the entry_addr
919 array.
920 (free_entry_array): New function. Release the memory used by the
921 entry addr array. Suppressed because there is no way to call it.
922 (is_function_entry): Check if a given address is a function's
923 start address by looking at supplied entry mask addresses and
924 symbol information, if available.
925 (print_insn_vax): Use parse_disassembler_options and is_function_entry.
926
85064c79
L		 9272005-03-23 H.J. Lu <hongjiu.lu@intel.com>
928
929 * cris-dis.c (print_with_operands): Use ~31L for long instead
930 of ~31.
931
de7141c7
L		 9322005-03-20 H.J. Lu <hongjiu.lu@intel.com>
933
934 * mmix-opc.c (O): Revert the last change.
935 (Z): Likewise.
936
e493ab45
L		 9372005-03-19 H.J. Lu <hongjiu.lu@intel.com>
938
939 * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
940 (Z): Likewise.
941
d8d7c459
HPN		 9422005-03-19 Hans-Peter Nilsson <hp@bitrange.com>
943
944 * mmix-opc.c (O, Z): Force expression as unsigned long.
945
ebdb0383
NC		 9462005-03-18 Nick Clifton <nickc@redhat.com>
947
948 * ip2k-asm.c: Regenerate.
949 * op/opcodes.pot: Regenerate.
950
1ad12f97
NC		 9512005-03-16 Nick Clifton <nickc@redhat.com>
952 Ben Elliston <bje@au.ibm.com>
953
569acd2c 954 * configure.in (werror): New switch: Add -Werror to the
1ad12f97 955 compiler command line. Enabled by default. Disable via
569acd2c 956 --disable-werror.
1ad12f97
NC		 957 * configure: Regenerate.
958
4eb30afc
AM		 9592005-03-16 Alan Modra <amodra@bigpond.net.au>
960
961 * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
962 BOOKE.
963
ea8409f7
AM		 9642005-03-15 Alan Modra <amodra@bigpond.net.au>
965
729ae8d2
AM		 966 * po/es.po: Commit new Spanish translation.
967
ea8409f7
AM		 968 * po/fr.po: Commit new French translation.
969
4f495e61
NC		 9702005-03-14 Jan-Benedict Glaw <jbglaw@lug-owl.de>
971
972 * vax-dis.c: Fix spelling error
973 (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
974 of just "Entry mask: < r1 ... >"
975
0a003adc
ZW		 9762005-03-12 Zack Weinberg <zack@codesourcery.com>
977
978 * arm-dis.c (arm_opcodes): Document %E and %V.
979 Add entries for v6T2 ARM instructions:
980 bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
981 (print_insn_arm): Add support for %E and %V.
885fc257 982 (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
0a003adc 983
da99ee72
AM		 9842005-03-10 Jeff Baker <jbaker@qnx.com>
985 Alan Modra <amodra@bigpond.net.au>
986
987 * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
988 (powerpc_operands <SPRG>): Call the above. Bit field is 5 bits.
989 (SPRG_MASK): Delete.
990 (XSPRG_MASK): Mask off extra bits now part of sprg field.
0a003adc 991 (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask. Move
da99ee72
AM		 992 mfsprg4..7 after msprg and consolidate.
993
220abb21
AM		 9942005-03-09 Jan-Benedict Glaw <jbglaw@lug-owl.de>
995
996 * vax-dis.c (entry_mask_bit): New array.
997 (print_insn_vax): Decode function entry mask.
998
0e06657a
AH		 9992005-03-07 Aldy Hernandez <aldyh@redhat.com>
1000
1001 * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
1002
06647dfd
AM		 10032005-03-05 Alan Modra <amodra@bigpond.net.au>
1004
1005 * po/opcodes.pot: Regenerate.
1006
82b829a7
RR		 10072005-03-03 Ramana Radhakrishnan <ramana.radhakrishnan@codito.com>
1008
220abb21 1009 * arc-dis.c (a4_decoding_class): New enum.
06647dfd
AM		 1010 (dsmOneArcInst): Use the enum values for the decoding class.
1011 Remove redundant case in the switch for decodingClass value 11.
82b829a7 1012
c4a530c5
JB		 10132005-03-02 Jan Beulich <jbeulich@novell.com>
1014
1015 * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
1016 accesses.
1017 (OP_C): Consider lock prefix in non-64-bit modes.
1018
47d8304e
AM		 10192005-02-24 Alan Modra <amodra@bigpond.net.au>
1020
1021 * cris-dis.c (format_hex): Remove ineffective warning fix.
1022 * crx-dis.c (make_instruction): Warning fix.
1023 * frv-asm.c: Regenerate.
1024
ec36c4a4
NC		 10252005-02-23 Nick Clifton <nickc@redhat.com>
1026
33b71eeb
NC		 1027 * cgen-dis.in: Use bfd_byte for buffers that are passed to
1028 read_memory.
06647dfd 1029
33b71eeb 1030 * ia64-opc.c (locate_opcode_ent): Initialise opval array.
06647dfd 1031
ec36c4a4
NC		 1032 * crx-dis.c (make_instruction): Move argument structure into inner
1033 scope and ensure that all of its fields are initialised before
1034 they are used.
1035
33b71eeb
NC		 1036 * fr30-asm.c: Regenerate.
1037 * fr30-dis.c: Regenerate.
1038 * frv-asm.c: Regenerate.
1039 * frv-dis.c: Regenerate.
1040 * ip2k-asm.c: Regenerate.
1041 * ip2k-dis.c: Regenerate.
1042 * iq2000-asm.c: Regenerate.
1043 * iq2000-dis.c: Regenerate.
1044 * m32r-asm.c: Regenerate.
1045 * m32r-dis.c: Regenerate.
1046 * openrisc-asm.c: Regenerate.
1047 * openrisc-dis.c: Regenerate.
1048 * xstormy16-asm.c: Regenerate.
1049 * xstormy16-dis.c: Regenerate.
1050
53c9ebc5
AM		 10512005-02-22 Alan Modra <amodra@bigpond.net.au>
1052
1053 * arc-ext.c: Warning fixes.
1054 * arc-ext.h: Likewise.
1055 * cgen-opc.c: Likewise.
1056 * ia64-gen.c: Likewise.
1057 * maxq-dis.c: Likewise.
1058 * ns32k-dis.c: Likewise.
1059 * w65-dis.c: Likewise.
1060 * ia64-asmtab.c: Regenerate.
1061
610ad19b
AM		 10622005-02-22 Alan Modra <amodra@bigpond.net.au>
1063
1064 * fr30-desc.c: Regenerate.
1065 * fr30-desc.h: Regenerate.
1066 * fr30-opc.c: Regenerate.
1067 * fr30-opc.h: Regenerate.
1068 * frv-desc.c: Regenerate.
1069 * frv-desc.h: Regenerate.
1070 * frv-opc.c: Regenerate.
1071 * frv-opc.h: Regenerate.
1072 * ip2k-desc.c: Regenerate.
1073 * ip2k-desc.h: Regenerate.
1074 * ip2k-opc.c: Regenerate.
1075 * ip2k-opc.h: Regenerate.
1076 * iq2000-desc.c: Regenerate.
1077 * iq2000-desc.h: Regenerate.
1078 * iq2000-opc.c: Regenerate.
1079 * iq2000-opc.h: Regenerate.
1080 * m32r-desc.c: Regenerate.
1081 * m32r-desc.h: Regenerate.
1082 * m32r-opc.c: Regenerate.
1083 * m32r-opc.h: Regenerate.
1084 * m32r-opinst.c: Regenerate.
1085 * openrisc-desc.c: Regenerate.
1086 * openrisc-desc.h: Regenerate.
1087 * openrisc-opc.c: Regenerate.
1088 * openrisc-opc.h: Regenerate.
1089 * xstormy16-desc.c: Regenerate.
1090 * xstormy16-desc.h: Regenerate.
1091 * xstormy16-opc.c: Regenerate.
1092 * xstormy16-opc.h: Regenerate.
1093
db9db6f2
AM		 10942005-02-21 Alan Modra <amodra@bigpond.net.au>
1095
1096 * Makefile.am: Run "make dep-am"
1097 * Makefile.in: Regenerate.
1098
bf143b25
NC		 10992005-02-15 Nick Clifton <nickc@redhat.com>
1100
1101 * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
1102 compile time warnings.
1103 (print_keyword): Likewise.
1104 (default_print_insn): Likewise.
1105
1106 * fr30-desc.c: Regenerated.
1107 * fr30-desc.h: Regenerated.
1108 * fr30-dis.c: Regenerated.
1109 * fr30-opc.c: Regenerated.
1110 * fr30-opc.h: Regenerated.
1111 * frv-desc.c: Regenerated.
1112 * frv-dis.c: Regenerated.
1113 * frv-opc.c: Regenerated.
1114 * ip2k-asm.c: Regenerated.
1115 * ip2k-desc.c: Regenerated.
1116 * ip2k-desc.h: Regenerated.
1117 * ip2k-dis.c: Regenerated.
1118 * ip2k-opc.c: Regenerated.
1119 * ip2k-opc.h: Regenerated.
1120 * iq2000-desc.c: Regenerated.
1121 * iq2000-dis.c: Regenerated.
1122 * iq2000-opc.c: Regenerated.
1123 * m32r-asm.c: Regenerated.
1124 * m32r-desc.c: Regenerated.
1125 * m32r-desc.h: Regenerated.
1126 * m32r-dis.c: Regenerated.
1127 * m32r-opc.c: Regenerated.
1128 * m32r-opc.h: Regenerated.
1129 * m32r-opinst.c: Regenerated.
1130 * openrisc-desc.c: Regenerated.
1131 * openrisc-desc.h: Regenerated.
1132 * openrisc-dis.c: Regenerated.
1133 * openrisc-opc.c: Regenerated.
1134 * openrisc-opc.h: Regenerated.
1135 * xstormy16-desc.c: Regenerated.
1136 * xstormy16-desc.h: Regenerated.
1137 * xstormy16-dis.c: Regenerated.
1138 * xstormy16-opc.c: Regenerated.
1139 * xstormy16-opc.h: Regenerated.
1140
d6098898
L		 11412005-02-14 H.J. Lu <hongjiu.lu@intel.com>
1142
1143 * dis-buf.c (perror_memory): Use sprintf_vma to print out
1144 address.
1145
5a84f3e0
NC		 11462005-02-11 Nick Clifton <nickc@redhat.com>
1147
bc18c937
NC		 1148 * iq2000-asm.c: Regenerate.
1149
5a84f3e0
NC		 1150 * frv-dis.c: Regenerate.
1151
0a40490e
JB		 11522005-02-07 Jim Blandy <jimb@redhat.com>
1153
1154 * Makefile.am (CGEN): Load guile.scm before calling the main
1155 application script.
1156 * Makefile.in: Regenerated.
1157 * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
1158 Simply pass the cgen-opc.scm path to ${cgen} as its first
1159 argument; ${cgen} itself now contains the '-s', or whatever is
1160 appropriate for the Scheme being used.
1161
c46f8c51
AC		 11622005-01-31 Andrew Cagney <cagney@gnu.org>
1163
1164 * configure: Regenerate to track ../gettext.m4.
1165
60b9a617
JB		 11662005-01-31 Jan Beulich <jbeulich@novell.com>
1167
1168 * ia64-gen.c (NELEMS): Define.
1169 (shrink): Generate alias with missing second predicate register when
1170 opcode has two outputs and these are both predicates.
1171 * ia64-opc-i.c (FULL17): Define.
1172 (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
1173 here to generate output template.
1174 (TBITCM, TNATCM): Undefine after use.
1175 * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
1176 first input. Add ld16 aliases without ar.csd as second output. Add
1177 st16 aliases without ar.csd as second input. Add cmpxchg aliases
1178 without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
1179 ar.ccv as third/fourth inputs. Consolidate through...
1180 (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
1181 CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
1182 * ia64-asmtab.c: Regenerate.
1183
a53bf506
AC		 11842005-01-27 Andrew Cagney <cagney@gnu.org>
1185
1186 * configure: Regenerate to track ../gettext.m4 change.
1187
90219bd0
AO		 11882005-01-25 Alexandre Oliva <aoliva@redhat.com>
1189
1190 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
1191 * frv-asm.c: Rebuilt.
1192 * frv-desc.c: Rebuilt.
1193 * frv-desc.h: Rebuilt.
1194 * frv-dis.c: Rebuilt.
1195 * frv-ibld.c: Rebuilt.
1196 * frv-opc.c: Rebuilt.
1197 * frv-opc.h: Rebuilt.
1198
45181ed1
AC		 11992005-01-24 Andrew Cagney <cagney@gnu.org>
1200
1201 * configure: Regenerate, ../gettext.m4 was updated.
1202
9e836e3d
FF		 12032005-01-21 Fred Fish <fnf@specifixinc.com>
1204
1205 * mips-opc.c: Change INSN_ALIAS to INSN2_ALIAS.
1206 Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
1207 Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
1208 * mips-dis.c: Ditto.
1209
5e8cb021
AM		 12102005-01-20 Alan Modra <amodra@bigpond.net.au>
1211
1212 * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
1213
986e18a5
FF		 12142005-01-19 Fred Fish <fnf@specifixinc.com>
1215
1216 * mips-dis.c (no_aliases): New disassembly option flag.
1217 (set_default_mips_dis_options): Init no_aliases to zero.
1218 (parse_mips_dis_option): Handle no-aliases option.
1219 (print_insn_mips): Ignore table entries that are aliases
1220 if no_aliases is set.
1221 (print_insn_mips16): Ditto.
1222 * mips-opc.c (mips_builtin_opcodes): Add initializer column for
1223 new pinfo2 member and add INSN_ALIAS initializers as needed. Also
1224 move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
1225 * mips16-opc.c (mips16_opcodes): Ditto.
1226
e38bc3b5
NC		 12272005-01-17 Andrew Stubbs <andrew.stubbs@st.com>
1228
1229 * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
1230 (inheritance diagram): Add missing edge.
1231 (arch_sh1_up): Rename arch_sh_up to match external name to make life
1232 easier for the testsuite.
1233 (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
1234 (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
610ad19b 1235 (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
e38bc3b5
NC		 1236 arch_sh2a_or_sh4_up child.
1237 (sh_table): Do renaming as above.
1238 Correct comment for ldc.l for gas testsuite to read.
1239 Remove rogue mul.l from sh1 (duplicate of the one for sh2).
1240 Correct comments for movy.w and movy.l for gas testsuite to read.
1241 Correct comments for fmov.d and fmov.s for gas testsuite to read.
1242
9df48ba9
L		 12432005-01-12 H.J. Lu <hongjiu.lu@intel.com>
1244
1245 * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
1246
2033b4b9
L		 12472005-01-12 H.J. Lu <hongjiu.lu@intel.com>
1248
1249 * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
1250
0bcb06d2
AS		 12512005-01-10 Andreas Schwab <schwab@suse.de>
1252
1253 * disassemble.c (disassemble_init_for_target) <case
1254 bfd_arch_ia64>: Set skip_zeroes to 16.
1255 <case bfd_arch_tic4x>: Set skip_zeroes to 32.
1256
47add74d
TL		 12572004-12-23 Tomer Levi <Tomer.Levi@nsc.com>
1258
1259 * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
1260
246f4c05
SS		 12612004-12-14 Svein E. Seldal <Svein.Seldal@solidas.com>
1262
1263 * avr-dis.c: Prettyprint. Added printing of symbol names in all
1264 memory references. Convert avr_operand() to C90 formatting.
1265
0e1200e5
TL		 12662004-12-05 Tomer Levi <Tomer.Levi@nsc.com>
1267
1268 * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
1269
89a649f7
TL		 12702004-11-29 Tomer Levi <Tomer.Levi@nsc.com>
1271
1272 * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
1273 (no_op_insn): Initialize array with instructions that have no
1274 operands.
1275 * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
1276
6255809c
RE		 12772004-11-29 Richard Earnshaw <rearnsha@arm.com>
1278
1279 * arm-dis.c: Correct top-level comment.
1280
2fbad815
RE		 12812004-11-27 Richard Earnshaw <rearnsha@arm.com>
1282
1283 * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
1284 architecuture defining the insn.
1285 (arm_opcodes, thumb_opcodes): Delete. Move to ...
6b8725b9
RE		 1286 * arm-dis.c (arm_opcodes, thumb_opcodes): Here. Add architecutre
1287 field.
2fbad815
RE		 1288 Also include opcode/arm.h.
1289 * Makefile.am (arm-dis.lo): Update dependency list.
1290 * Makefile.in: Regenerate.
1291
d81acc42
NC		 12922004-11-22 Ravi Ramaseshan <ravi.ramaseshan@codito.com>
1293
1294 * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
1295 reflect the change to the short immediate syntax.
1296
ca4f2377
AM		 12972004-11-19 Alan Modra <amodra@bigpond.net.au>
1298
5da8bf1b
AM		 1299 * or32-opc.c (debug): Warning fix.
1300 * po/POTFILES.in: Regenerate.
1301
ca4f2377
AM		 1302 * maxq-dis.c: Formatting.
1303 (print_insn): Warning fix.
1304
b7693d02
DJ		 13052004-11-17 Daniel Jacobowitz <dan@codesourcery.com>
1306
1307 * arm-dis.c (WORD_ADDRESS): Define.
1308 (print_insn): Use it. Correct big-endian end-of-section handling.
1309
300dac7e
NC		 13102004-11-08 Inderpreet Singh <inderpreetb@nioda.hcltech.com>
1311 Vineet Sharma <vineets@noida.hcltech.com>
1312
1313 * maxq-dis.c: New file.
1314 * disassemble.c (ARCH_maxq): Define.
610ad19b 1315 (disassembler): Add 'print_insn_maxq_little' for handling maxq
300dac7e
NC		 1316 instructions..
1317 * configure.in: Add case for bfd_maxq_arch.
1318 * configure: Regenerate.
1319 * Makefile.am: Add support for maxq-dis.c
1320 * Makefile.in: Regenerate.
1321 * aclocal.m4: Regenerate.
1322
42048ee7
TL		 13232004-11-05 Tomer Levi <Tomer.Levi@nsc.com>
1324
1325 * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
1326 mode.
1327 * crx-dis.c: Likewise.
1328
bd21e58e
HPN		 13292004-11-04 Hans-Peter Nilsson <hp@axis.com>
1330
1331 Generally, handle CRISv32.
1332 * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
1333 (struct cris_disasm_data): New type.
1334 (format_reg, format_hex, cris_constraint, print_flags)
1335 (get_opcode_entry): Add struct cris_disasm_data * parameter. All
1336 callers changed.
1337 (format_sup_reg, print_insn_crisv32_with_register_prefix)
1338 (print_insn_crisv32_without_register_prefix)
1339 (print_insn_crisv10_v32_with_register_prefix)
1340 (print_insn_crisv10_v32_without_register_prefix)
1341 (cris_parse_disassembler_options): New functions.
1342 (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
1343 parameter. All callers changed.
1344 (get_opcode_entry): Call malloc, not xmalloc. Return NULL on
1345 failure.
1346 (cris_constraint) <case 'Y', 'U'>: New cases.
1347 (bytes_to_skip): Handle 'Y' and 'N' as 's'. Skip size is 4 bytes
1348 for constraint 'n'.
1349 (print_with_operands) <case 'Y'>: New case.
1350 (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
1351 <case 'N', 'Y', 'Q'>: New cases.
1352 (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
1353 (print_insn_cris_with_register_prefix)
1354 (print_insn_cris_without_register_prefix): Call
1355 cris_parse_disassembler_options.
1356 * cris-opc.c (cris_spec_regs): Mention that this table isn't used
1357 for CRISv32 and the size of immediate operands. New v32-only
1358 entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
1359 spc. Add v32-only 4-byte entries for p2, p3, p5 and p6. Change
1360 ccr, ibr, irp to be v0..v10. Change bar, dccr to be v8..v10.
1361 Change brp to be v3..v10.
1362 (cris_support_regs): New vector.
1363 (cris_opcodes): Update head comment. New format characters '[',
1364 ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
1365 Add new opcodes for v32 and adjust existing opcodes to accommodate
1366 differences to earlier variants.
1367 (cris_cond15s): New vector.
1368
9306ca4a
JB		 13692004-11-04 Jan Beulich <jbeulich@novell.com>
1370
1371 * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
1372 (indirEb): Remove.
1373 (Mp): Use f_mode rather than none at all.
1374 (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
1375 replaces what previously was x_mode; x_mode now means 128-bit SSE
1376 operands.
1377 (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
1378 mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
1379 pinsrw's second operand is Edqw.
1380 (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
1381 operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
1382 fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
1383 mode when an operand size override is present or always suffixing.
1384 More instructions will need to be added to this group.
1385 (putop): Handle new macro chars 'C' (short/long suffix selector),
1386 'I' (Intel mode override for following macro char), and 'J' (for
1387 adding the 'l' prefix to far branches in AT&T mode). When an
1388 alternative was specified in the template, honor macro character when
1389 specified for Intel mode.
1390 (OP_E): Handle new *_mode values. Correct pointer specifications for
1391 memory operands. Consolidate output of index register.
1392 (OP_G): Handle new *_mode values.
1393 (OP_I): Handle const_1_mode.
1394 (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
1395 respective opcode prefix bits have been consumed.
1396 (OP_EM, OP_EX): Provide some default handling for generating pointer
1397 specifications.
1398
f39c96a9
TL		 13992004-10-28 Tomer Levi <Tomer.Levi@nsc.com>
1400
1401 * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
1402 COP_INST macro.
1403
812337be
TL		 14042004-10-27 Tomer Levi <Tomer.Levi@nsc.com>
1405
1406 * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
1407 (getregliststring): Support HI/LO and user registers.
610ad19b 1408 * crx-opc.c (crx_instruction): Update data structure according to the
812337be
TL		 1409 rearrangement done in CRX opcode header file.
1410 (crx_regtab): Likewise.
1411 (crx_optab): Likewise.
610ad19b 1412 (crx_instruction): Reorder load/stor instructions, remove unsupported
812337be
TL		 1413 formats.
1414 support new Co-Processor instruction 'cpi'.
1415
4030fa5a
NC		 14162004-10-27 Nick Clifton <nickc@redhat.com>
1417
1418 * opcodes/iq2000-asm.c: Regenerate.
1419 * opcodes/iq2000-desc.c: Regenerate.
1420 * opcodes/iq2000-desc.h: Regenerate.
1421 * opcodes/iq2000-dis.c: Regenerate.
1422 * opcodes/iq2000-ibld.c: Regenerate.
1423 * opcodes/iq2000-opc.c: Regenerate.
1424 * opcodes/iq2000-opc.h: Regenerate.
1425
fc3d45e8
TL		 14262004-10-21 Tomer Levi <Tomer.Levi@nsc.com>
1427
1428 * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
1429 us4, us5 (respectively).
1430 Remove unsupported 'popa' instruction.
1431 Reverse operands order in store co-processor instructions.
1432
3c55da70
AM		 14332004-10-15 Alan Modra <amodra@bigpond.net.au>
1434
1435 * Makefile.am: Run "make dep-am"
1436 * Makefile.in: Regenerate.
1437
7fa3d080
BW		 14382004-10-12 Bob Wilson <bob.wilson@acm.org>
1439
1440 * xtensa-dis.c: Use ISO C90 formatting.
1441
e612bb4d
AM		 14422004-10-09 Alan Modra <amodra@bigpond.net.au>
1443
1444 * ppc-opc.c: Revert 2004-09-09 change.
1445
43cd72b9
BW		 14462004-10-07 Bob Wilson <bob.wilson@acm.org>
1447
1448 * xtensa-dis.c (state_names): Delete.
1449 (fetch_data): Use xtensa_isa_maxlength.
1450 (print_xtensa_operand): Replace operand parameter with opcode/operand
1451 pair. Remove print_sr_name parameter. Use new xtensa-isa.h functions.
1452 (print_insn_xtensa): Use new xtensa-isa.h functions. Handle multislot
1453 instruction bundles. Use xmalloc instead of malloc.
1454
bbac1f2a
NC		 14552004-10-07 David Gibson <david@gibson.dropbear.id.au>
1456
1457 * ppc-opc.c: Replace literal "0"s with NULLs in pointer
1458 initializers.
1459
48c9f030
NC		 14602004-10-07 Tomer Levi <Tomer.Levi@nsc.com>
1461
1462 * crx-opc.c (crx_instruction): Support Co-processor insns.
1463 * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
1464 (getregliststring): Change function to use the above enum.
1465 (print_arg): Handle CO-Processor insns.
1466 (crx_cinvs): Add 'b' option to invalidate the branch-target
1467 cache.
1468
12c64a4e
AH		 14692004-10-06 Aldy Hernandez <aldyh@redhat.com>
1470
1471 * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
1472 efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
1473 efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
1474 efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
1475 efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
1476
14127cc4
NC		 14772004-10-01 Bill Farmer <Bill@the-farmers.freeserve.co.uk>
1478
1479 * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
1480 rather than add it.
1481
0dd132b6
NC		 14822004-09-30 Paul Brook <paul@codesourcery.com>
1483
1484 * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
1485 * arm-opc.h: Document %e. Add ARMv6ZK instructions.
1486
3f85e526
L		 14872004-09-17 H.J. Lu <hongjiu.lu@intel.com>
1488
1489 * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
1490 (CONFIG_STATUS_DEPENDENCIES): New.
1491 (Makefile): Removed.
1492 (config.status): Likewise.
1493 * Makefile.in: Regenerated.
1494
8ae85421
AM		 14952004-09-17 Alan Modra <amodra@bigpond.net.au>
1496
1497 * Makefile.am: Run "make dep-am".
1498 * Makefile.in: Regenerate.
1499 * aclocal.m4: Regenerate.
1500 * configure: Regenerate.
1501 * po/POTFILES.in: Regenerate.
1502 * po/opcodes.pot: Regenerate.
1503
24443139
AS		 15042004-09-11 Andreas Schwab <schwab@suse.de>
1505
1506 * configure: Rebuild.
1507
2a309db0
AM		 15082004-09-09 Segher Boessenkool <segher@kernel.crashing.org>
1509
1510 * ppc-opc.c (L): Make this field not optional.
1511
42851540
NC		 15122004-09-03 Tomer Levi <Tomer.Levi@nsc.com>
1513
1514 * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
1515 Fix parameter to 'm[t|f]csr' insns.
1516
979273e3
NN		 15172004-08-30 Nathanael Nerode <neroden@gcc.gnu.org>
1518
1519 * configure.in: Autoupdate to autoconf 2.59.
1520 * aclocal.m4: Rebuild with aclocal 1.4p6.
1521 * configure: Rebuild with autoconf 2.59.
1522 * Makefile.in: Rebuild with automake 1.4p6 (picking up
1523 bfd changes for autoconf 2.59 on the way).
1524 * config.in: Rebuild with autoheader 2.59.
1525
ac28a1cb
RS		 15262004-08-27 Richard Sandiford <rsandifo@redhat.com>
1527
1528 * frv-desc.[ch], frv-opc.[ch]: Regenerated.
1529
30d1c836
ML		 15302004-07-30 Michal Ludvig <mludvig@suse.cz>
1531
1532 * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
1533 (GRPPADLCK2): New define.
1534 (twobyte_has_modrm): True for 0xA6.
1535 (grps): GRPPADLCK2 for opcode 0xA6.
1536
0b0ac059
AO		 15372004-07-29 Alexandre Oliva <aoliva@redhat.com>
1538
1539 Introduce SH2a support.
1540 * sh-opc.h (arch_sh2a_base): Renumber.
1541 (arch_sh2a_nofpu_base): Remove.
1542 (arch_sh_base_mask): Adjust.
1543 (arch_opann_mask): New.
1544 (arch_sh2a, arch_sh2a_nofpu): Adjust.
1545 (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
1546 (sh_table): Adjust whitespace.
1547 2004-02-24 Corinna Vinschen <vinschen@redhat.com>
1548 * sh-opc.h (arch_sh2a_nofpu_up): New. Use instead of arch_sh2a_up in
1549 instruction list throughout.
1550 (arch_sh2a_up): Redefine to include fpu instruction set. Use instead
1551 of arch_sh2a in instruction list throughout.
1552 (arch_sh2e_up): Accomodate above changes.
1553 (arch_sh2_up): Ditto.
1554 2004-02-20 Corinna Vinschen <vinschen@redhat.com>
1555 * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
1556 2004-02-18 Corinna Vinschen <vinschen@redhat.com>
1557 * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
1558 * sh-opc.h (arch_sh2a_nofpu): New.
1559 (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
1560 (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
1561 instruction.
1562 2004-01-20 DJ Delorie <dj@redhat.com>
1563 * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
1564 2003-12-29 DJ Delorie <dj@redhat.com>
1565 * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
1566 sh_opcode_info, sh_table): Add sh2a support.
1567 (arch_op32): New, to tag 32-bit opcodes.
1568 * sh-dis.c (print_insn_sh): Support sh2a opcodes.
1569 2003-12-02 Michael Snyder <msnyder@redhat.com>
1570 * sh-opc.h (arch_sh2a): Add.
1571 * sh-dis.c (arch_sh2a): Handle.
1572 * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
1573
670ec21d
NC		 15742004-07-27 Tomer Levi <Tomer.Levi@nsc.com>
1575
1576 * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
1577
ed049af3
NC		 15782004-07-22 Nick Clifton <nickc@redhat.com>
1579
1580 PR/280
1581 * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
1582 insns - this is done by objdump itself.
1583 * h8500-dis.c (print_insn_h8500): Likewise.
1584
20f0a1fc
NC		 15852004-07-21 Jan Beulich <jbeulich@novell.com>
1586
1587 * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
1588 regardless of address size prefix in effect.
1589 (ptr_reg): Size or address registers does not depend on rex64, but
1590 on the presence of an address size override.
1591 (OP_MMX): Use rex.x only for xmm registers.
1592 (OP_EM): Use rex.z only for xmm registers.
1593
6f14957b
MR		 15942004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
1595
1596 * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
1597 move/branch operations to the bottom so that VR5400 multimedia
1598 instructions take precedence in disassembly.
1599
1586d91e
MR		 16002004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
1601
1602 * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
1603 ISA-specific "break" encoding.
1604
982de27a
NC		 16052004-07-13 Elvis Chiang <elvisfb@gmail.com>
1606
1607 * arm-opc.h: Fix typo in comment.
1608
4300ab10
AS		 16092004-07-11 Andreas Schwab <schwab@suse.de>
1610
1611 * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
1612
8577e690
AS		 16132004-07-09 Andreas Schwab <schwab@suse.de>
1614
1615 * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
1616
1fe1f39c
NC		 16172004-07-07 Tomer Levi <Tomer.Levi@nsc.com>
1618
1619 * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
1620 (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
1621 (crx-dis.lo): New target.
1622 (crx-opc.lo): Likewise.
1623 * Makefile.in: Regenerate.
1624 * configure.in: Handle bfd_crx_arch.
1625 * configure: Regenerate.
1626 * crx-dis.c: New file.
1627 * crx-opc.c: New file.
1628 * disassemble.c (ARCH_crx): Define.
1629 (disassembler): Handle ARCH_crx.
1630
7a33b495
JW		 16312004-06-29 James E Wilson <wilson@specifixinc.com>
1632
1633 * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
1634 * ia64-asmtab.c: Regnerate.
1635
98e69875
AM		 16362004-06-28 Alan Modra <amodra@bigpond.net.au>
1637
1638 * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
1639 (extract_fxm): Don't test dialect.
1640 (XFXFXM_MASK): Include the power4 bit.
1641 (XFXM): Add p4 param.
1642 (powerpc_opcodes): Add mfocrf and mtocrf. Adjust mtcr.
1643
a53b85e2
AO		 16442004-06-27 Alexandre Oliva <aoliva@redhat.com>
1645
1646 2003-07-21 Richard Sandiford <rsandifo@redhat.com>
1647 * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
1648
d0618d1c
AM		 16492004-06-26 Alan Modra <amodra@bigpond.net.au>
1650
1651 * ppc-opc.c (BH, XLBH_MASK): Define.
1652 (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
1653
1d9f512f
AM		 16542004-06-24 Alan Modra <amodra@bigpond.net.au>
1655
1656 * i386-dis.c (x_mode): Comment.
1657 (two_source_ops): File scope.
1658 (float_mem): Correct fisttpll and fistpll.
1659 (float_mem_mode): New table.
1660 (dofloat): Use it.
1661 (OP_E): Correct intel mode PTR output.
1662 (ptr_reg): Use open_char and close_char.
1663 (PNI_Fixup): Handle possible suffix on sidt. Use op1out etc. for
1664 operands. Set two_source_ops.
1665
52886d70
AM		 16662004-06-15 Alan Modra <amodra@bigpond.net.au>
1667
1668 * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
1669 instead of _raw_size.
1670
bad9ceea
JJ		 16712004-06-08 Jakub Jelinek <jakub@redhat.com>
1672
1673 * ia64-gen.c (in_iclass): Handle more postinc st
1674 and ld variants.
1675 * ia64-asmtab.c: Rebuilt.
1676
0451f5df
MS		 16772004-06-01 Martin Schwidefsky <schwidefsky@de.ibm.com>
1678
1679 * s390-opc.txt: Correct architecture mask for some opcodes.
1680 lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
1681 in the esa mode as well.
1682
f6f9408f
JR		 16832004-05-28 Andrew Stubbs <andrew.stubbs@superh.com>
1684
1685 * sh-dis.c (target_arch): Make unsigned.
1686 (print_insn_sh): Replace (most of) switch with a call to
1687 sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
1688 * sh-opc.h: Redefine architecture flags values.
1689 Add sh3-nommu architecture.
1690 Reorganise <arch>_up macros so they make more visual sense.
1691 (SH_MERGE_ARCH_SET): Define new macro.
1692 (SH_VALID_BASE_ARCH_SET): Likewise.
1693 (SH_VALID_MMU_ARCH_SET): Likewise.
1694 (SH_VALID_CO_ARCH_SET): Likewise.
1695 (SH_VALID_ARCH_SET): Likewise.
1696 (SH_MERGE_ARCH_SET_VALID): Likewise.
1697 (SH_ARCH_SET_HAS_FPU): Likewise.
1698 (SH_ARCH_SET_HAS_DSP): Likewise.
1699 (SH_ARCH_UNKNOWN_ARCH): Likewise.
1700 (sh_get_arch_from_bfd_mach): Add prototype.
1701 (sh_get_arch_up_from_bfd_mach): Likewise.
1702 (sh_get_bfd_mach_from_arch_set): Likewise.
1703 (sh_merge_bfd_arc): Likewise.
1704
be8c092b
NC		 17052004-05-24 Peter Barada <peter@the-baradas.com>
1706
1707 * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
610ad19b
AM		 1708 into new match_insn_m68k function. Loop over canidate
1709 matches and select first that completely matches.
be8c092b
NC		 1710 * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
1711 * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
610ad19b 1712 to verify addressing for MAC/EMAC.
be8c092b
NC		 1713 * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
1714 reigster halves since 'fpu' and 'spl' look misleading.
1715 * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
1716 * m68k-opc.c: Rearragne mac/emac cases to use longest for
1717 first, tighten up match masks.
1718 * m68k-opc.c: Add 'size' field to struct m68k_opcode. Produce
1719 'size' from special case code in print_insn_m68k to
1720 determine decode size of insns.
1721
a30e9cc4
AM		 17222004-05-19 Alan Modra <amodra@bigpond.net.au>
1723
1724 * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
1725 well as when -mpower4.
1726
9598fbe5
NC		 17272004-05-13 Nick Clifton <nickc@redhat.com>
1728
1729 * po/fr.po: Updated French translation.
1730
6b6e92f4
NC		 17312004-05-05 Peter Barada <peter@the-baradas.com>
1732
1733 * m68k-dis.c(print_insn_m68k): Add new chips, use core
1734 variants in arch_mask. Only set m68881/68851 for 68k chips.
1735 * m68k-op.c: Switch from ColdFire chips to core variants.
1736
a404d431
AM		 17372004-05-05 Alan Modra <amodra@bigpond.net.au>
1738
a30e9cc4 1739 PR 147.
a404d431
AM		 1740 * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
1741
f3806e43
BE		 17422004-04-29 Ben Elliston <bje@au.ibm.com>
1743
520ceea4
BE		 1744 * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
1745 (powerpc_opcodes): Add "dbczl" instruction for PPC970.
f3806e43 1746
1f1799d5
KK		 17472004-04-22 Kaz Kojima <kkojima@rr.iij4u.or.jp>
1748
1749 * sh-dis.c (print_insn_sh): Print the value in constant pool
1750 as a symbol if it looks like a symbol.
1751
fd99574b
NC		 17522004-04-22 Peter Barada <peter@the-baradas.com>
1753
1754 * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
1755 appropriate ColdFire architectures.
1756 (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
1757 mask addressing.
1758 Add EMAC instructions, fix MAC instructions. Remove
1759 macmw/macml/msacmw/msacml instructions since mask addressing now
1760 supported.
1761
b4781d44
JJ		 17622004-04-20 Jakub Jelinek <jakub@redhat.com>
1763
1764 * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
1765 (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
1766 suffix. Use fmov*x macros, create all 3 fpsize variants in one
1767 macro. Adjust all users.
1768
91809fda 17692004-04-15 Anil Paranjpe <anilp1@kpitcummins.com>
610ad19b 1770
91809fda
NC		 1771 * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
1772 separately.
1773
f4453dfa
NC		 17742004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
1775
1776 * m32r-asm.c: Regenerate.
1777
9b0de91a
SS		 17782004-03-29 Stan Shebs <shebs@apple.com>
1779
1780 * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
1781 used.
1782
e20c0b3d
AM		 17832004-03-19 Alan Modra <amodra@bigpond.net.au>
1784
1785 * aclocal.m4: Regenerate.
1786 * config.in: Regenerate.
1787 * configure: Regenerate.
1788 * po/POTFILES.in: Regenerate.
1789 * po/opcodes.pot: Regenerate.
1790
fdd12ef3
AM		 17912004-03-16 Alan Modra <amodra@bigpond.net.au>
1792
1793 * ppc-dis.c (print_insn_powerpc): Don't print tabs. Handle
1794 PPC_OPERANDS_GPR_0.
1795 * ppc-opc.c (RA0): Define.
1796 (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
1797 (RAOPT): Rename from RAO. Update all uses.
a9c3619e 1798 (powerpc_opcodes): Use RA0 as appropriate.
fdd12ef3 1799
2dc111b3 18002004-03-15 Aldy Hernandez <aldyh@redhat.com>
fdd12ef3
AM		 1801
1802 * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
2dc111b3 1803
7bfeee7b
AM		 18042004-03-15 Alan Modra <amodra@bigpond.net.au>
1805
1806 * sparc-dis.c (print_insn_sparc): Update getword prototype.
1807
7ffdda93
ML		 18082004-03-12 Michal Ludvig <mludvig@suse.cz>
1809
1810 * i386-dis.c (GRPPLOCK): Delete.
7bfeee7b 1811 (grps): Delete GRPPLOCK entry.
7ffdda93 1812
cc0ec051
AM		 18132004-03-12 Alan Modra <amodra@bigpond.net.au>
1814
1815 * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1816 (M, Mp): Use OP_M.
1817 (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1818 (GRPPADLCK): Define.
1819 (dis386): Use NOP_Fixup on "nop".
1820 (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1821 (twobyte_has_modrm): Set for 0xa7.
1822 (padlock_table): Delete. Move to..
1823 (grps): ..here, using OP_0f07. Use OP_Ofae on lfence, mfence
1824 and clflush.
1825 (print_insn): Revert PADLOCK_SPECIAL code.
1826 (OP_E): Delete sfence, lfence, mfence checks.
1827
4fd61dcb
JJ		 18282004-03-12 Jakub Jelinek <jakub@redhat.com>
1829
1830 * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1831 (INVLPG_Fixup): New function.
1832 (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1833
0f10071e
ML		 18342004-03-12 Michal Ludvig <mludvig@suse.cz>
1835
1836 * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1837 (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1838 (padlock_table): New struct with PadLock instructions.
1839 (print_insn): Handle PADLOCK_SPECIAL.
1840
c02908d2
AM		 18412004-03-12 Alan Modra <amodra@bigpond.net.au>
1842
1843 * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1844 (OP_E): Twiddle clflush to sfence here.
1845
d5bb7600
NC		 18462004-03-08 Nick Clifton <nickc@redhat.com>
1847
1848 * po/de.po: Updated German translation.
1849
ae51a426
JR		 18502003-03-03 Andrew Stubbs <andrew.stubbs@superh.com>
1851
1852 * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1853 nofpu mode. Add BFD type bfd_mach_sh4_nommu_nofpu.
1854 * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1855 accordingly.
1856
676a64f4
RS		 18572004-03-01 Richard Sandiford <rsandifo@redhat.com>
1858
1859 * frv-asm.c: Regenerate.
1860 * frv-desc.c: Regenerate.
1861 * frv-desc.h: Regenerate.
1862 * frv-dis.c: Regenerate.
1863 * frv-ibld.c: Regenerate.
1864 * frv-opc.c: Regenerate.
1865 * frv-opc.h: Regenerate.
1866
c7a48b9a
RS		 18672004-03-01 Richard Sandiford <rsandifo@redhat.com>
1868
1869 * frv-desc.c, frv-opc.c: Regenerate.
1870
8ae0baa2
RS		 18712004-03-01 Richard Sandiford <rsandifo@redhat.com>
1872
1873 * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1874
ce11586c
JR		 18752004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1876
1877 * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1878 Also correct mistake in the comment.
1879
6a5709a5
JR		 18802004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1881
1882 * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1883 ensure that double registers have even numbers.
1884 Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1885 that reserved instruction 0xfffd does not decode the same
1886 as 0xfdfd (ftrv).
1887 * sh-opc.h: Add REG_N_D nibble type and use it whereever
1888 REG_N refers to a double register.
1889 Add REG_N_B01 nibble type and use it instead of REG_NM
1890 in ftrv.
1891 Adjust the bit patterns in a few comments.
1892
e5d2b64f 18932004-02-25 Aldy Hernandez <aldyh@redhat.com>
7bfeee7b
AM		 1894
1895 * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
e5d2b64f 1896
1f04b05f
AH		 18972004-02-20 Aldy Hernandez <aldyh@redhat.com>
1898
1899 * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1900
2f3b8700
AH		 19012004-02-20 Aldy Hernandez <aldyh@redhat.com>
1902
1903 * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1904
f0b26da6 19052004-02-20 Aldy Hernandez <aldyh@redhat.com>
7bfeee7b
AM		 1906
1907 * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1908 mtivor32, mtivor33, mtivor34.
f0b26da6 1909
23d59c56 19102004-02-19 Aldy Hernandez <aldyh@redhat.com>
7bfeee7b
AM		 1911
1912 * ppc-opc.c (powerpc_opcodes): Add mfmcar.
23d59c56 1913
34920d91
NC		 19142004-02-10 Petko Manolov <petkan@nucleusys.com>
1915
1916 * arm-opc.h Maverick accumulator register opcode fixes.
1917
44d86481
BE		 19182004-02-13 Ben Elliston <bje@wasabisystems.com>
1919
1920 * m32r-dis.c: Regenerate.
1921
17707c23
MS		 19222004-01-27 Michael Snyder <msnyder@redhat.com>
1923
1924 * sh-opc.h (sh_table): "fsrra", not "fssra".
1925
fe3a9bc4
NC		 19262004-01-23 Andrew Over <andrew.over@cs.anu.edu.au>
1927
1928 * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1929 contraints.
1930
ff24f124
JJ		 19312004-01-19 Andrew Over <andrew.over@cs.anu.edu.au>
1932
1933 * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1934
a02a862a
AM		 19352004-01-19 Alan Modra <amodra@bigpond.net.au>
1936
1937 * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1938 1. Don't print scale factor on AT&T mode when index missing.
1939
d164ea7f
AO		 19402004-01-16 Alexandre Oliva <aoliva@redhat.com>
1941
1942 * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1943 when loaded into XR registers.
1944
cb10e79a
RS		 19452004-01-14 Richard Sandiford <rsandifo@redhat.com>
1946
1947 * frv-desc.h: Regenerate.
1948 * frv-desc.c: Regenerate.
1949 * frv-opc.c: Regenerate.
1950
f532f3fa
MS		 19512004-01-13 Michael Snyder <msnyder@redhat.com>
1952
1953 * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1954
e45d0630
PB		 19552004-01-09 Paul Brook <paul@codesourcery.com>
1956
1957 * arm-opc.h (arm_opcodes): Move generic mcrr after known
1958 specific opcodes.
1959
3ba7a1aa
DJ		 19602004-01-07 Daniel Jacobowitz <drow@mvista.com>
1961
1962 * Makefile.am (libopcodes_la_DEPENDENCIES)
1963 (libopcodes_la_LIBADD): Revert 2003-05-17 change. Add explanatory
1964 comment about the problem.
1965 * Makefile.in: Regenerate.
1966
ba2d3f07
AO		 19672004-01-06 Alexandre Oliva <aoliva@redhat.com>
1968
1969 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
1970 * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1971 cut&paste errors in shifting/truncating numerical operands.
1972 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1973 * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1974 (parse_uslo16): Likewise.
1975 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1976 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1977 (parse_s12): Likewise.
1978 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1979 * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1980 (parse_uslo16): Likewise.
1981 (parse_uhi16): Parse gothi and gotfuncdeschi.
1982 (parse_d12): Parse got12 and gotfuncdesc12.
1983 (parse_s12): Likewise.
1984
3ab48931
NC		 19852004-01-02 Albert Bartoszko <albar@nt.kegel.com.pl>
1986
1987 * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1988 instruction which looks similar to an 'rla' instruction.
a0bd404e 1989
c9e214e5 1990For older changes see ChangeLog-0203
252b5132
RH		 1991\f
1992Local Variables:
2f6d2f85
NC		 1993mode: change-log
1994left-margin: 8
1995fill-column: 74
252b5132
RH		 1996version-control: never
1997End:
GDB Binutils - Deliverables
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