[deliverable/binutils-gdb.git] / opcodes / ChangeLog

2016-05-25  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Rename CPU_ANY87_FLAGS to
	CPU_ANY_X87_FLAGS.  Add CPU_ANY_MMX_FLAGS.
	* i386-init.h: Regenerated.

2016-05-23  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-dis.c (print_flags): Set branch_delay_insns, and insn_type
	information.
	(print_insn_arc): Set insn_type information.
	* arc-opc.c (C_CC): Add F_CLASS_COND.
	* arc-tbl.h (bbit0, bbit1): Update subclass to COND.
	(beq_s, bge_s, bgt_s, bhi_s, bhs_s): Likewise.
	(ble_s, blo_s, bls_s, blt_s, bne_s): Likewise.
	(breq, breq_s, brge, brhs, brlo, brlt): Likewise.
	(brne, brne_s, jeq_s, jne_s): Likewise.

2016-05-23  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-tbl.h (neg): New instruction variant.

2016-05-23  Cupertino Miranda  <cmiranda@synopsys.com>

	* arc-dis.c (find_format, find_format, get_auxreg)
	(print_insn_arc): Changed.
	* arc-ext.h (INSERT_XOP): Likewise.

2016-05-23  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>

	* tic54x-dis.c (sprint_mmr): Adjust.
	* tic54x-opc.c: Likewise.

2016-05-19  Alan Modra  <amodra@gmail.com>

	* ppc-opc.c (NSISIGNOPT): Use insert_nsi and extract_nsi.

2016-05-19  Alan Modra  <amodra@gmail.com>

	* ppc-opc.c: Formatting.
	(NSISIGNOPT): Define.
	(powerpc_opcodes <subis>): Use NSISIGNOPT.

2016-05-18  Maciej W. Rozycki  <macro@imgtec.com>

	* mips-dis.c (is_compressed_mode_p): Add `micromips_p' operand,
	replacing references to `micromips_ase' throughout.
	(_print_insn_mips): Don't use file-level microMIPS annotation to
	determine the disassembly mode with the symbol table.

2016-05-13  Peter Bergner <bergner@vnet.ibm.com>

	* ppc-opc.c (IMM8): Use PPC_OPERAND_SIGNOPT.

2016-05-11  Andrew Bennett  <andrew.bennett@imgtec.com>

	* mips-dis.c (mips_arch_choices): Add ASE_DSPR3 to mips32r6 and
	mips64r6.
	* mips-opc.c (D34): New macro.
	(mips_builtin_opcodes): Define bposge32c for DSPr3.

2016-05-10  Alexander Fomin  <alexander.fomin@intel.com>

	* i386-dis.c (prefix_table): Add RDPID instruction.
	* i386-gen.c (cpu_flag_init): Add RDPID flag.
	(cpu_flags): Add RDPID bitfield.
	* i386-opc.h (enum): Add RDPID element.
	(i386_cpu_flags): Add RDPID field.
	* i386-opc.tbl: Add RDPID instruction.
	* i386-init.h: Regenerate.
	* i386-tbl.h: Regenerate.

2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>

	* arm-dis.c (get_sym_code_type): Use ARM_GET_SYM_BRANCH_TYPE to get
	branch type of a symbol.
	(print_insn): Likewise.

2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>

	* arm-dis.c (coprocessor_opcodes): Add entries for VFP ARMv8-M
	Mainline Security Extensions instructions.
	(thumb_opcodes): Add entries for narrow ARMv8-M Security
	Extensions instructions.
	(thumb32_opcodes): Add entries for wide ARMv8-M Security Extensions
	instructions.
	(psr_name): Add new MSP_NS and PSP_NS ARMv8-M Security Extensions
	special registers.

2016-05-09  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* sparc-opc.c (sparc_opcodes): Fix mnemonic of faligndatai.

2016-05-03  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-ext.c (dump_ARC_extmap): Handle SYNATX_NOP and SYNTAX_1OP.
	(arcExtMap_genOpcode): Likewise.
	* arc-opc.c (arg_32bit_rc): Define new variable.
	(arg_32bit_u6): Likewise.
	(arg_32bit_limm): Likewise.

2016-05-03  Szabolcs Nagy  <szabolcs.nagy@arm.com>

	* aarch64-gen.c (VERIFIER): Define.
	* aarch64-opc.c (VERIFIER): Define.
	(verify_ldpsw): Use static linkage.
	* aarch64-opc.h (verify_ldpsw): Remove.
	* aarch64-tbl.h: Use VERIFIER for verifiers.

2016-04-28  Nick Clifton  <nickc@redhat.com>

	PR target/19722
	* aarch64-dis.c (aarch64_opcode_decode): Run verifier if present.
	* aarch64-opc.c (verify_ldpsw): New function.
	* aarch64-opc.h (verify_ldpsw): New prototype.
	* aarch64-tbl.h: Add initialiser for verifier field.
	(LDPSW): Set verifier to verify_ldpsw.

2016-04-23  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/19983
	PR binutils/19984
	* i386-dis.c (print_insn): Return -1 if size of bfd_vma is
	smaller than address size.

2016-04-20  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>

	* alpha-dis.c: Regenerate.
	* crx-dis.c: Likewise.
	* disassemble.c: Likewise.
	* epiphany-opc.c: Likewise.
	* fr30-opc.c: Likewise.
	* frv-opc.c: Likewise.
	* ip2k-opc.c: Likewise.
	* iq2000-opc.c: Likewise.
	* lm32-opc.c: Likewise.
	* lm32-opinst.c: Likewise.
	* m32c-opc.c: Likewise.
	* m32r-opc.c: Likewise.
	* m32r-opinst.c: Likewise.
	* mep-opc.c: Likewise.
	* mt-opc.c: Likewise.
	* or1k-opc.c: Likewise.
	* or1k-opinst.c: Likewise.
	* tic80-opc.c: Likewise.
	* xc16x-opc.c: Likewise.
	* xstormy16-opc.c: Likewise.

2016-04-19  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add addb, subb, adcb, sbcb, andb, xorb, orb,
	fxorb, wxorb, shlb, shrb, notb, cntbb, div, mod, divm, qcmp,
	calcsd, and calcxd instructions.
	* arc-opc.c (insert_nps_bitop_size): Delete.
	(extract_nps_bitop_size): Delete.
	(MAKE_SRC_POS_INSERT_EXTRACT_FUNCS): Define, and use.
	(extract_nps_qcmp_m3): Define.
	(extract_nps_qcmp_m2): Define.
	(extract_nps_qcmp_m1): Define.
	(arc_flag_operands): Add F_NPS_SX, F_NPS_AR, F_NPS_AL.
	(arc_flag_classes): Add C_NPS_SX, C_NPS_AR_AL
	(arc_operands): Add NPS_SRC2_POS, NPS_SRC1_POS, NPS_ADDB_SIZE,
	NPS_ANDB_SIZE, NPS_FXORB_SIZ, NPS_WXORB_SIZ, NPS_R_XLDST,
	NPS_DIV_UIMM4, NPS_QCMP_SIZE, NPS_QCMP_M1, NPS_QCMP_M2, and
	NPS_QCMP_M3.

2016-04-19  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add dctcp, dcip, dcet, and dcacl instructions.

2016-04-15  H.J. Lu  <hongjiu.lu@intel.com>

	* Makefile.in: Regenerated with automake 1.11.6.
	* aclocal.m4: Likewise.

2016-04-14  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add xldb, xldw, xld, xstb, xstw, and xst
	instructions.
	* arc-opc.c (insert_nps_cmem_uimm16): New function.
	(extract_nps_cmem_uimm16): New function.
	(arc_operands): Add NPS_XLDST_UIMM16 operand.

2016-04-14  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-dis.c (arc_insn_length): New function.
	(print_insn_arc): Use arc_insn_length, change insnLen to unsigned.
	(find_format): Change insnLen parameter to unsigned.

2016-04-13  Nick Clifton  <nickc@redhat.com>

	PR target/19937
	* v850-opc.c (v850_opcodes): Correct masks for long versions of
	the LD.B and LD.BU instructions.

2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-dis.c (find_format): Check for extension flags.
	(print_flags): New function.
	(print_insn_arc): Update for .extCondCode, .extCoreRegister and
	.extAuxRegister.
	* arc-ext.c (arcExtMap_coreRegName): Use
	LAST_EXTENSION_CORE_REGISTER.
	(arcExtMap_coreReadWrite): Likewise.
	(dump_ARC_extmap): Update printing.
	* arc-opc.c (arc_flag_classes): Add F_CLASS_EXTEND flag.
	(arc_aux_regs): Add cpu field.
	* arc-regs.h: Add cpu field, lower case name aux registers.

2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-tbl.h: Add rtsc, sleep with no arguments.

2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-opc.c (flags_none, flags_f, flags_cc, flags_ccf):
	Initialize.
	(arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
	(arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
	(arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
	(arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
	(arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
	(arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
	(arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
	(arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
	(arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
	(arc_opcode arc_opcodes): Null terminate the array.
	(arc_num_opcodes): Remove.
	* arc-ext.h (INSERT_XOP): Define.
	(extInstruction_t): Likewise.
	(arcExtMap_instName): Delete.
	(arcExtMap_insn): New function.
	(arcExtMap_genOpcode): Likewise.
	* arc-ext.c (ExtInstruction): Remove.
	(create_map): Zero initialize instruction fields.
	(arcExtMap_instName): Remove.
	(arcExtMap_insn): New function.
	(dump_ARC_extmap): More info while debuging.
	(arcExtMap_genOpcode): New function.
	* arc-dis.c (find_format): New function.
	(print_insn_arc): Use find_format.
	(arc_get_disassembler): Enable dump_ARC_extmap only when
	debugging.

2016-04-11  Maciej W. Rozycki  <macro@imgtec.com>

	* mips-dis.c (print_mips16_insn_arg): Mask unused extended
	instruction bits out.

2016-04-07  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add schd, sync, and hwschd instructions.
	* arc-opc.c (arc_flag_operands): Add new flags.
	(arc_flag_classes): Add new classes.

2016-04-07  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-opc.c (arc_opcodes): Extend comment to discus table layout.

2016-04-05  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add movbi, decode1, fbset, fbclear, encode0,
	encode1, rflt, crc16, and crc32 instructions.
	* arc-opc.c (arc_flag_operands): Add F_NPS_R.
	(arc_flag_classes): Add C_NPS_R.
	(insert_nps_bitop_size_2b): New function.
	(extract_nps_bitop_size_2b): Likewise.
	(insert_nps_bitop_uimm8): Likewise.
	(extract_nps_bitop_uimm8): Likewise.
	(arc_operands): Add new operand entries.

2016-04-05  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-regs.h: Add a new subclass field.  Add double assist
	accumulator register values.
	* arc-tbl.h: Use DPA subclass to mark the double assist
	instructions.  Use DPX/SPX subclas to mark the FPX instructions.
	* arc-opc.c (RSP): Define instead of SP.
	(arc_aux_regs): Add the subclass field.

2016-04-05  Jiong Wang  <jiong.wang@arm.com>

	* arm-dis.c: Support FP16 vmul, vmla, vmls (by scalar).

2016-03-31  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-opc.c (arc_operands): Fix operand flags for NPS_R_DST, and
	NPS_R_SRC1.

2016-03-30  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add a header comment, and fix some whitespace
	issues.  No functional changes.

2016-03-30  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-regs.h (IC_RAM_ADDRESS, IC_TAG, IC_WP, IC_DATA, CONTROL0)
	(AX2, AY2, MX2, MY2, AY0, AY1, DC_RAM_ADDR, DC_TAG, CONTROL1)
	(RTT): Remove duplicate.
	(LCDINSTR, LCDDATA, LCDSTAT, CC_*, PCT_COUNT*, PCT_SNAP*)
	(PCT_CONFIG*): Remove.
	(D1L, D1H, D2H, D2L): Define.

2016-03-29  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-ext-tbl.h (dsp_fp_i2flt): Fix typo.

2016-03-29  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-tbl.h (invld07): Remove.
	* arc-ext-tbl.h: New file.
	* arc-dis.c (FIELDA, FIELDB, FIELDC): Remove.
	* arc-opc.c (arc_opcodes): Add ext-tbl include.

2016-03-24  Jan Kratochvil  <jan.kratochvil@redhat.com>

	Fix -Wstack-usage warnings.
	* aarch64-dis.c (print_operands): Substitute size.
	* aarch64-opc.c (print_register_offset_address): Substitute tblen.

2016-03-22  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* sparc-opc.c (sparc_opcodes): Reorder entries for `rd' in order
	to get a proper diagnostic when an invalid ASR register is used.

2016-03-22  Nick Clifton  <nickc@redhat.com>

	* configure: Regenerate.

2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: New file.
	* arc-opc.c: Add top level comment.
	(insert_nps_3bit_dst): New function.
	(extract_nps_3bit_dst): New function.
	(insert_nps_3bit_src2): New function.
	(extract_nps_3bit_src2): New function.
	(insert_nps_bitop_size): New function.
	(extract_nps_bitop_size): New function.
	(arc_flag_operands): Add nps400 entries.
	(arc_flag_classes): Add nps400 entries.
	(arc_operands): Add nps400 entries.
	(arc_opcodes): Add nps400 include.

2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-opc.c (arc_flag_classes): Convert all flag classes to use
	the new class enum values.

2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-dis.c (print_insn_arc): Handle nps400.

2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-opc.c (BASE): Delete.

2016-03-18  Nick Clifton  <nickc@redhat.com>

	PR target/19721
	* aarch64-tbl.h (aarch64_opcode_table): Fix type of second operand
	of MOV insn that aliases an ORR insn.

2016-03-16  Jiong Wang  <jiong.wang@arm.com>

	* arm-dis.c (neon_opcodes): Support new FP16 instructions.

2016-03-07  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>

	* mcore-opc.h: Add const qualifiers.
	* microblaze-opc.h (struct op_code_struct): Likewise.
	* sh-opc.h: Likewise.
	* tic4x-dis.c (tic4x_print_indirect): Likewise.
	(tic4x_print_op): Likewise.

2016-03-02  Alan Modra  <amodra@gmail.com>

	* or1k-desc.h: Regenerate.
	* fr30-ibld.c: Regenerate.
	* rl78-decode.c: Regenerate.

2016-03-01  Nick Clifton  <nickc@redhat.com>

	PR target/19747
	* rl78-dis.c (print_insn_rl78_common): Fix typo.

2016-02-24  Renlin Li  <renlin.li@arm.com>

	* arm-dis.c (coprocessor_opcodes): Add fp16 instruction entries.
	(print_insn_coprocessor): Support fp16 instructions.

2016-02-24  Renlin Li  <renlin.li@arm.com>

	* arm-dis.c (print_insn_coprocessor): Fix mask for vsel, vmaxnm,
	vminnm, vrint(mpna).

2016-02-24  Renlin Li  <renlin.li@arm.com>

	* arm-dis.c (print_insn_coprocessor): Check co-processor number for
	cpd/cpd2, mcr/mcr2, mrc/mrc2, ldc/ldc2, stc/stc2.

2016-02-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (print_insn): Parenthesize expression to prevent
	truncated addresses.
	(OP_J): Likewise.

2016-02-10  Claudiu Zissulescu  <claziss@synopsys.com>
	    Janek van Oirschot  <jvanoirs@synopsys.com>

	* arc-opc.c (arc_relax_opcodes, arc_num_relax_opcodes): New
	variable.

2016-02-04  Nick Clifton  <nickc@redhat.com>

	PR target/19561
	* msp430-dis.c (print_insn_msp430): Add a special case for
	decoding an RRC instruction with the ZC bit set in the extension
	word.

2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>

	* cgen-ibld.in (insert_normal): Rework calculation of shift.
	* epiphany-ibld.c: Regenerate.
	* fr30-ibld.c: Regenerate.
	* frv-ibld.c: Regenerate.
	* ip2k-ibld.c: Regenerate.
	* iq2000-ibld.c: Regenerate.
	* lm32-ibld.c: Regenerate.
	* m32c-ibld.c: Regenerate.
	* m32r-ibld.c: Regenerate.
	* mep-ibld.c: Regenerate.
	* mt-ibld.c: Regenerate.
	* or1k-ibld.c: Regenerate.
	* xc16x-ibld.c: Regenerate.
	* xstormy16-ibld.c: Regenerate.

2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>

	* epiphany-dis.c: Regenerated from latest cpu files.

2016-02-01  Michael McConville  <mmcco@mykolab.com>

	* cgen-dis.c (count_decodable_bits): Use unsigned value for mask
	test bit.

2016-01-25  Renlin Li  <renlin.li@arm.com>

	* arm-dis.c (mapping_symbol_for_insn): New function.
	(find_ifthen_state): Call mapping_symbol_for_insn().

2016-01-20  Matthew Wahab  <matthew.wahab@arm.com>

	* aarch64-opc.c (operand_general_constraint_met_p): Check validity
	of MSR UAO immediate operand.

2016-01-18  Maciej W. Rozycki  <macro@imgtec.com>

	* mips-dis.c (print_insn_micromips): Remove 48-bit microMIPS
	instruction support.

2016-01-17  Alan Modra  <amodra@gmail.com>

	* configure: Regenerate.

2016-01-14  Nick Clifton  <nickc@redhat.com>

	* rl78-decode.opc (rl78_decode_opcode): Add 's' operand to movw
	instructions that can support stack pointer operations.
	* rl78-decode.c: Regenerate.
	* rl78-dis.c: Fix display of stack pointer in MOVW based
	instructions.

2016-01-14  Matthew Wahab  <matthew.wahab@arm.com>

	* aarch64-opc.c (aarch64_sys_reg_supported_p): Merge conditionals
	testing for RAS support.  Add checks for erxfr_el1, erxctlr_el1,
	erxtatus_el1 and erxaddr_el1.

2016-01-12  Matthew Wahab  <matthew.wahab@arm.com>

	* arm-dis.c (arm_opcodes): Add "esb".
	(thumb_opcodes): Likewise.

2016-01-11  Peter Bergner <bergner@vnet.ibm.com>

	* ppc-opc.c <xscmpnedp>: Delete.
	<xvcmpnedp>: Likewise.
	<xvcmpnedp.>: Likewise.
	<xvcmpnesp>: Likewise.
	<xvcmpnesp.>: Likewise.

2016-01-08  Andreas Schwab  <schwab@linux-m68k.org>

	PR gas/13050
	* m68k-opc.c (moveb, movew): For ISA_B/C only allow #,d(An) in
	addition to ISA_A.

2016-01-01  Alan Modra  <amodra@gmail.com>

	Update year range in copyright notice of all files.

For older changes see ChangeLog-2015
\f
Copyright (C) 2016 Free Software Foundation, Inc.

Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved.

Local Variables:
mode: change-log
left-margin: 8
fill-column: 74
version-control: never
End:
Commit	Line	Data
293f5f65 L	1	2016-05-25 H.J. Lu <hongjiu.lu@intel.com>
	2
	3	* i386-gen.c (cpu_flag_init): Rename CPU_ANY87_FLAGS to
	4	CPU_ANY_X87_FLAGS. Add CPU_ANY_MMX_FLAGS.
	5	* i386-init.h: Regenerated.
	6
d9eca1df CZ	7	2016-05-23 Claudiu Zissulescu <claziss@synopsys.com>
	8
	9	* arc-dis.c (print_flags): Set branch_delay_insns, and insn_type
	10	information.
	11	(print_insn_arc): Set insn_type information.
	12	* arc-opc.c (C_CC): Add F_CLASS_COND.
	13	* arc-tbl.h (bbit0, bbit1): Update subclass to COND.
	14	(beq_s, bge_s, bgt_s, bhi_s, bhs_s): Likewise.
	15	(ble_s, blo_s, bls_s, blt_s, bne_s): Likewise.
	16	(breq, breq_s, brge, brhs, brlo, brlt): Likewise.
	17	(brne, brne_s, jeq_s, jne_s): Likewise.
	18
87789e08 CZ	19	2016-05-23 Claudiu Zissulescu <claziss@synopsys.com>
	20
	21	* arc-tbl.h (neg): New instruction variant.
	22
c810e0b8 CZ	23	2016-05-23 Cupertino Miranda <cmiranda@synopsys.com>
	24
	25	* arc-dis.c (find_format, find_format, get_auxreg)
	26	(print_insn_arc): Changed.
	27	* arc-ext.h (INSERT_XOP): Likewise.
	28
3d207518 TS	29	2016-05-23 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
	30
	31	* tic54x-dis.c (sprint_mmr): Adjust.
	32	* tic54x-opc.c: Likewise.
	33
514e58b7 AM	34	2016-05-19 Alan Modra <amodra@gmail.com>
	35
	36	* ppc-opc.c (NSISIGNOPT): Use insert_nsi and extract_nsi.
	37
e43de63c AM	38	2016-05-19 Alan Modra <amodra@gmail.com>
	39
	40	* ppc-opc.c: Formatting.
	41	(NSISIGNOPT): Define.
	42	(powerpc_opcodes <subis>): Use NSISIGNOPT.
	43
1401d2fe MR	44	2016-05-18 Maciej W. Rozycki <macro@imgtec.com>
	45
	46	* mips-dis.c (is_compressed_mode_p): Add `micromips_p' operand,
	47	replacing references to `micromips_ase' throughout.
	48	(_print_insn_mips): Don't use file-level microMIPS annotation to
	49	determine the disassembly mode with the symbol table.
	50
1178da44 PB	51	2016-05-13 Peter Bergner <bergner@vnet.ibm.com>
	52
	53	* ppc-opc.c (IMM8): Use PPC_OPERAND_SIGNOPT.
	54
8f4f9071 MF	55	2016-05-11 Andrew Bennett <andrew.bennett@imgtec.com>
	56
	57	* mips-dis.c (mips_arch_choices): Add ASE_DSPR3 to mips32r6 and
	58	mips64r6.
	59	* mips-opc.c (D34): New macro.
	60	(mips_builtin_opcodes): Define bposge32c for DSPr3.
	61
8bc52696 AF	62	2016-05-10 Alexander Fomin <alexander.fomin@intel.com>
	63
	64	* i386-dis.c (prefix_table): Add RDPID instruction.
	65	* i386-gen.c (cpu_flag_init): Add RDPID flag.
	66	(cpu_flags): Add RDPID bitfield.
	67	* i386-opc.h (enum): Add RDPID element.
	68	(i386_cpu_flags): Add RDPID field.
	69	* i386-opc.tbl: Add RDPID instruction.
	70	* i386-init.h: Regenerate.
	71	* i386-tbl.h: Regenerate.
	72
39d911fc TP	73	2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
	74
	75	* arm-dis.c (get_sym_code_type): Use ARM_GET_SYM_BRANCH_TYPE to get
	76	branch type of a symbol.
	77	(print_insn): Likewise.
	78
16a1fa25 TP	79	2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
	80
	81	* arm-dis.c (coprocessor_opcodes): Add entries for VFP ARMv8-M
	82	Mainline Security Extensions instructions.
	83	(thumb_opcodes): Add entries for narrow ARMv8-M Security
	84	Extensions instructions.
	85	(thumb32_opcodes): Add entries for wide ARMv8-M Security Extensions
	86	instructions.
	87	(psr_name): Add new MSP_NS and PSP_NS ARMv8-M Security Extensions
	88	special registers.
	89
d751b79e JM	90	2016-05-09 Jose E. Marchesi <jose.marchesi@oracle.com>
	91
	92	* sparc-opc.c (sparc_opcodes): Fix mnemonic of faligndatai.
	93
945e0f82 CZ	94	2016-05-03 Claudiu Zissulescu <claziss@synopsys.com>
	95
	96	* arc-ext.c (dump_ARC_extmap): Handle SYNATX_NOP and SYNTAX_1OP.
	97	(arcExtMap_genOpcode): Likewise.
	98	* arc-opc.c (arg_32bit_rc): Define new variable.
	99	(arg_32bit_u6): Likewise.
	100	(arg_32bit_limm): Likewise.
	101
20f55f38 SN	102	2016-05-03 Szabolcs Nagy <szabolcs.nagy@arm.com>
	103
	104	* aarch64-gen.c (VERIFIER): Define.
	105	* aarch64-opc.c (VERIFIER): Define.
	106	(verify_ldpsw): Use static linkage.
	107	* aarch64-opc.h (verify_ldpsw): Remove.
	108	* aarch64-tbl.h: Use VERIFIER for verifiers.
	109
4bd13cde NC	110	2016-04-28 Nick Clifton <nickc@redhat.com>
	111
	112	PR target/19722
	113	* aarch64-dis.c (aarch64_opcode_decode): Run verifier if present.
	114	* aarch64-opc.c (verify_ldpsw): New function.
	115	* aarch64-opc.h (verify_ldpsw): New prototype.
	116	* aarch64-tbl.h: Add initialiser for verifier field.
	117	(LDPSW): Set verifier to verify_ldpsw.
	118
c0f92bf9 L	119	2016-04-23 H.J. Lu <hongjiu.lu@intel.com>
	120
	121	PR binutils/19983
	122	PR binutils/19984
	123	* i386-dis.c (print_insn): Return -1 if size of bfd_vma is
	124	smaller than address size.
	125
e6c7cdec TS	126	2016-04-20 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
	127
	128	* alpha-dis.c: Regenerate.
	129	* crx-dis.c: Likewise.
	130	* disassemble.c: Likewise.
	131	* epiphany-opc.c: Likewise.
	132	* fr30-opc.c: Likewise.
	133	* frv-opc.c: Likewise.
	134	* ip2k-opc.c: Likewise.
	135	* iq2000-opc.c: Likewise.
	136	* lm32-opc.c: Likewise.
	137	* lm32-opinst.c: Likewise.
	138	* m32c-opc.c: Likewise.
	139	* m32r-opc.c: Likewise.
	140	* m32r-opinst.c: Likewise.
	141	* mep-opc.c: Likewise.
	142	* mt-opc.c: Likewise.
	143	* or1k-opc.c: Likewise.
	144	* or1k-opinst.c: Likewise.
	145	* tic80-opc.c: Likewise.
	146	* xc16x-opc.c: Likewise.
	147	* xstormy16-opc.c: Likewise.
	148
537aefaf AB	149	2016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
	150
	151	* arc-nps400-tbl.h: Add addb, subb, adcb, sbcb, andb, xorb, orb,
	152	fxorb, wxorb, shlb, shrb, notb, cntbb, div, mod, divm, qcmp,
	153	calcsd, and calcxd instructions.
	154	* arc-opc.c (insert_nps_bitop_size): Delete.
	155	(extract_nps_bitop_size): Delete.
	156	(MAKE_SRC_POS_INSERT_EXTRACT_FUNCS): Define, and use.
	157	(extract_nps_qcmp_m3): Define.
	158	(extract_nps_qcmp_m2): Define.
	159	(extract_nps_qcmp_m1): Define.
	160	(arc_flag_operands): Add F_NPS_SX, F_NPS_AR, F_NPS_AL.
	161	(arc_flag_classes): Add C_NPS_SX, C_NPS_AR_AL
	162	(arc_operands): Add NPS_SRC2_POS, NPS_SRC1_POS, NPS_ADDB_SIZE,
	163	NPS_ANDB_SIZE, NPS_FXORB_SIZ, NPS_WXORB_SIZ, NPS_R_XLDST,
	164	NPS_DIV_UIMM4, NPS_QCMP_SIZE, NPS_QCMP_M1, NPS_QCMP_M2, and
	165	NPS_QCMP_M3.
	166
c8f785f2 AB	167	2016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
	168
	169	* arc-nps400-tbl.h: Add dctcp, dcip, dcet, and dcacl instructions.
	170
6fd8e7c2 L	171	2016-04-15 H.J. Lu <hongjiu.lu@intel.com>
	172
	173	* Makefile.in: Regenerated with automake 1.11.6.
	174	* aclocal.m4: Likewise.
	175
4b0c052e AB	176	2016-04-14 Andrew Burgess <andrew.burgess@embecosm.com>
	177
	178	* arc-nps400-tbl.h: Add xldb, xldw, xld, xstb, xstw, and xst
	179	instructions.
	180	* arc-opc.c (insert_nps_cmem_uimm16): New function.
	181	(extract_nps_cmem_uimm16): New function.
	182	(arc_operands): Add NPS_XLDST_UIMM16 operand.
	183
cb040366 AB	184	2016-04-14 Andrew Burgess <andrew.burgess@embecosm.com>
	185
	186	* arc-dis.c (arc_insn_length): New function.
	187	(print_insn_arc): Use arc_insn_length, change insnLen to unsigned.
	188	(find_format): Change insnLen parameter to unsigned.
	189
accc0180 NC	190	2016-04-13 Nick Clifton <nickc@redhat.com>
	191
	192	PR target/19937
	193	* v850-opc.c (v850_opcodes): Correct masks for long versions of
	194	the LD.B and LD.BU instructions.
	195
f36e33da CZ	196	2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
	197
	198	* arc-dis.c (find_format): Check for extension flags.
	199	(print_flags): New function.
	200	(print_insn_arc): Update for .extCondCode, .extCoreRegister and
	201	.extAuxRegister.
	202	* arc-ext.c (arcExtMap_coreRegName): Use
	203	LAST_EXTENSION_CORE_REGISTER.
	204	(arcExtMap_coreReadWrite): Likewise.
	205	(dump_ARC_extmap): Update printing.
	206	* arc-opc.c (arc_flag_classes): Add F_CLASS_EXTEND flag.
	207	(arc_aux_regs): Add cpu field.
	208	* arc-regs.h: Add cpu field, lower case name aux registers.
	209
1c2e355e CZ	210	2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
	211
	212	* arc-tbl.h: Add rtsc, sleep with no arguments.
	213
b99747ae CZ	214	2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
	215
	216	* arc-opc.c (flags_none, flags_f, flags_cc, flags_ccf):
	217	Initialize.
	218	(arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
	219	(arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
	220	(arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
	221	(arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
	222	(arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
	223	(arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
	224	(arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
	225	(arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
	226	(arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
	227	(arc_opcode arc_opcodes): Null terminate the array.
	228	(arc_num_opcodes): Remove.
	229	* arc-ext.h (INSERT_XOP): Define.
	230	(extInstruction_t): Likewise.
	231	(arcExtMap_instName): Delete.
	232	(arcExtMap_insn): New function.
	233	(arcExtMap_genOpcode): Likewise.
	234	* arc-ext.c (ExtInstruction): Remove.
	235	(create_map): Zero initialize instruction fields.
	236	(arcExtMap_instName): Remove.
	237	(arcExtMap_insn): New function.
	238	(dump_ARC_extmap): More info while debuging.
	239	(arcExtMap_genOpcode): New function.
	240	* arc-dis.c (find_format): New function.
	241	(print_insn_arc): Use find_format.
	242	(arc_get_disassembler): Enable dump_ARC_extmap only when
	243	debugging.
	244
92708cec MR	245	2016-04-11 Maciej W. Rozycki <macro@imgtec.com>
	246
	247	* mips-dis.c (print_mips16_insn_arg): Mask unused extended
	248	instruction bits out.
	249
a42a4f84 AB	250	2016-04-07 Andrew Burgess <andrew.burgess@embecosm.com>
	251
	252	* arc-nps400-tbl.h: Add schd, sync, and hwschd instructions.
	253	* arc-opc.c (arc_flag_operands): Add new flags.
	254	(arc_flag_classes): Add new classes.
	255
1328504b AB	256	2016-04-07 Andrew Burgess <andrew.burgess@embecosm.com>
	257
	258	* arc-opc.c (arc_opcodes): Extend comment to discus table layout.
	259
820f03ff AB	260	2016-04-05 Andrew Burgess <andrew.burgess@embecosm.com>
	261
	262	* arc-nps400-tbl.h: Add movbi, decode1, fbset, fbclear, encode0,
	263	encode1, rflt, crc16, and crc32 instructions.
	264	* arc-opc.c (arc_flag_operands): Add F_NPS_R.
	265	(arc_flag_classes): Add C_NPS_R.
	266	(insert_nps_bitop_size_2b): New function.
	267	(extract_nps_bitop_size_2b): Likewise.
	268	(insert_nps_bitop_uimm8): Likewise.
	269	(extract_nps_bitop_uimm8): Likewise.
	270	(arc_operands): Add new operand entries.
	271
8ddf6b2a CZ	272	2016-04-05 Claudiu Zissulescu <claziss@synopsys.com>
8ddf6b2a CZ	273
b99747ae CZ	274	* arc-regs.h: Add a new subclass field. Add double assist
	275	accumulator register values.
	276	* arc-tbl.h: Use DPA subclass to mark the double assist
	277	instructions. Use DPX/SPX subclas to mark the FPX instructions.
	278	* arc-opc.c (RSP): Define instead of SP.
	279	(arc_aux_regs): Add the subclass field.
8ddf6b2a	280
589a7d88 JW	281	2016-04-05 Jiong Wang <jiong.wang@arm.com>
	282
	283	* arm-dis.c: Support FP16 vmul, vmla, vmls (by scalar).
	284
0a191de9	285	2016-03-31 Andrew Burgess <andrew.burgess@embecosm.com>
2cce10e7 AB	286
	287	* arc-opc.c (arc_operands): Fix operand flags for NPS_R_DST, and
	288	NPS_R_SRC1.
	289
0a106562 AB	290	2016-03-30 Andrew Burgess <andrew.burgess@embecosm.com>
	291
	292	* arc-nps400-tbl.h: Add a header comment, and fix some whitespace
	293	issues. No functional changes.
	294
bd05ac5f CZ	295	2016-03-30 Claudiu Zissulescu <claziss@synopsys.com>
bd05ac5f CZ	296
b99747ae CZ	297	* arc-regs.h (IC_RAM_ADDRESS, IC_TAG, IC_WP, IC_DATA, CONTROL0)
	298	(AX2, AY2, MX2, MY2, AY0, AY1, DC_RAM_ADDR, DC_TAG, CONTROL1)
	299	(RTT): Remove duplicate.
	300	(LCDINSTR, LCDDATA, LCDSTAT, CC_, PCT_COUNT, PCT_SNAP*)
	301	(PCT_CONFIG*): Remove.
	302	(D1L, D1H, D2H, D2L): Define.
bd05ac5f	303
9885948f CZ	304	2016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
9885948f CZ	305
b99747ae	306	* arc-ext-tbl.h (dsp_fp_i2flt): Fix typo.
9885948f	307
f2dd8838 CZ	308	2016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
f2dd8838 CZ	309
b99747ae CZ	310	* arc-tbl.h (invld07): Remove.
	311	* arc-ext-tbl.h: New file.
	312	* arc-dis.c (FIELDA, FIELDB, FIELDC): Remove.
	313	* arc-opc.c (arc_opcodes): Add ext-tbl include.
f2dd8838	314
0d2f91fe JK	315	2016-03-24 Jan Kratochvil <jan.kratochvil@redhat.com>
	316
	317	Fix -Wstack-usage warnings.
	318	* aarch64-dis.c (print_operands): Substitute size.
	319	* aarch64-opc.c (print_register_offset_address): Substitute tblen.
	320
a6b71f42 JM	321	2016-03-22 Jose E. Marchesi <jose.marchesi@oracle.com>
	322
	323	* sparc-opc.c (sparc_opcodes): Reorder entries for `rd' in order
	324	to get a proper diagnostic when an invalid ASR register is used.
	325
9780e045 NC	326	2016-03-22 Nick Clifton <nickc@redhat.com>
	327
	328	* configure: Regenerate.
	329
e23e8ebe AB	330	2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
	331
	332	* arc-nps400-tbl.h: New file.
	333	* arc-opc.c: Add top level comment.
	334	(insert_nps_3bit_dst): New function.
	335	(extract_nps_3bit_dst): New function.
	336	(insert_nps_3bit_src2): New function.
	337	(extract_nps_3bit_src2): New function.
	338	(insert_nps_bitop_size): New function.
	339	(extract_nps_bitop_size): New function.
	340	(arc_flag_operands): Add nps400 entries.
	341	(arc_flag_classes): Add nps400 entries.
	342	(arc_operands): Add nps400 entries.
	343	(arc_opcodes): Add nps400 include.
	344
1ae8ab47 AB	345	2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
	346
	347	* arc-opc.c (arc_flag_classes): Convert all flag classes to use
	348	the new class enum values.
	349
8699fc3e AB	350	2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
	351
	352	* arc-dis.c (print_insn_arc): Handle nps400.
	353
24740d83 AB	354	2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
	355
	356	* arc-opc.c (BASE): Delete.
	357
8678914f NC	358	2016-03-18 Nick Clifton <nickc@redhat.com>
	359
	360	PR target/19721
	361	* aarch64-tbl.h (aarch64_opcode_table): Fix type of second operand
	362	of MOV insn that aliases an ORR insn.
	363
cc933301 JW	364	2016-03-16 Jiong Wang <jiong.wang@arm.com>
	365
	366	* arm-dis.c (neon_opcodes): Support new FP16 instructions.
	367
f86f5863 TS	368	2016-03-07 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
	369
	370	* mcore-opc.h: Add const qualifiers.
	371	* microblaze-opc.h (struct op_code_struct): Likewise.
	372	* sh-opc.h: Likewise.
	373	* tic4x-dis.c (tic4x_print_indirect): Likewise.
	374	(tic4x_print_op): Likewise.
	375
62de1c63 AM	376	2016-03-02 Alan Modra <amodra@gmail.com>
62de1c63 AM	377
d11698cd	378	* or1k-desc.h: Regenerate.
62de1c63	379	* fr30-ibld.c: Regenerate.
c697cf0b	380	* rl78-decode.c: Regenerate.
62de1c63	381
020efce5 NC	382	2016-03-01 Nick Clifton <nickc@redhat.com>
	383
	384	PR target/19747
	385	* rl78-dis.c (print_insn_rl78_common): Fix typo.
	386
b0c11777 RL	387	2016-02-24 Renlin Li <renlin.li@arm.com>
	388
	389	* arm-dis.c (coprocessor_opcodes): Add fp16 instruction entries.
	390	(print_insn_coprocessor): Support fp16 instructions.
	391
3e309328 RL	392	2016-02-24 Renlin Li <renlin.li@arm.com>
	393
	394	* arm-dis.c (print_insn_coprocessor): Fix mask for vsel, vmaxnm,
	395	vminnm, vrint(mpna).
	396
8afc7bea RL	397	2016-02-24 Renlin Li <renlin.li@arm.com>
	398
	399	* arm-dis.c (print_insn_coprocessor): Check co-processor number for
	400	cpd/cpd2, mcr/mcr2, mrc/mrc2, ldc/ldc2, stc/stc2.
	401
4fd7268a L	402	2016-02-15 H.J. Lu <hongjiu.lu@intel.com>
	403
	404	* i386-dis.c (print_insn): Parenthesize expression to prevent
	405	truncated addresses.
	406	(OP_J): Likewise.
	407
4670103e CZ	408	2016-02-10 Claudiu Zissulescu <claziss@synopsys.com>
	409	Janek van Oirschot <jvanoirs@synopsys.com>
	410
b99747ae CZ	411	* arc-opc.c (arc_relax_opcodes, arc_num_relax_opcodes): New
b99747ae CZ	412	variable.
4670103e	413
c1d9289f NC	414	2016-02-04 Nick Clifton <nickc@redhat.com>
	415
	416	PR target/19561
	417	* msp430-dis.c (print_insn_msp430): Add a special case for
	418	decoding an RRC instruction with the ZC bit set in the extension
	419	word.
	420
a143b004 AB	421	2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
	422
	423	* cgen-ibld.in (insert_normal): Rework calculation of shift.
	424	* epiphany-ibld.c: Regenerate.
	425	* fr30-ibld.c: Regenerate.
	426	* frv-ibld.c: Regenerate.
	427	* ip2k-ibld.c: Regenerate.
	428	* iq2000-ibld.c: Regenerate.
	429	* lm32-ibld.c: Regenerate.
	430	* m32c-ibld.c: Regenerate.
	431	* m32r-ibld.c: Regenerate.
	432	* mep-ibld.c: Regenerate.
	433	* mt-ibld.c: Regenerate.
	434	* or1k-ibld.c: Regenerate.
	435	* xc16x-ibld.c: Regenerate.
	436	* xstormy16-ibld.c: Regenerate.
	437
b89807c6 AB	438	2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
	439
	440	* epiphany-dis.c: Regenerated from latest cpu files.
	441
d8c823c8 MM	442	2016-02-01 Michael McConville <mmcco@mykolab.com>
	443
	444	* cgen-dis.c (count_decodable_bits): Use unsigned value for mask
	445	test bit.
	446
5bc5ae88 RL	447	2016-01-25 Renlin Li <renlin.li@arm.com>
	448
	449	* arm-dis.c (mapping_symbol_for_insn): New function.
	450	(find_ifthen_state): Call mapping_symbol_for_insn().
	451
0bff6e2d MW	452	2016-01-20 Matthew Wahab <matthew.wahab@arm.com>
	453
	454	* aarch64-opc.c (operand_general_constraint_met_p): Check validity
	455	of MSR UAO immediate operand.
	456
100b4f2e MR	457	2016-01-18 Maciej W. Rozycki <macro@imgtec.com>
	458
	459	* mips-dis.c (print_insn_micromips): Remove 48-bit microMIPS
	460	instruction support.
	461
5c14705f AM	462	2016-01-17 Alan Modra <amodra@gmail.com>
	463
	464	* configure: Regenerate.
	465
4d82fe66 NC	466	2016-01-14 Nick Clifton <nickc@redhat.com>
	467
	468	* rl78-decode.opc (rl78_decode_opcode): Add 's' operand to movw
	469	instructions that can support stack pointer operations.
	470	* rl78-decode.c: Regenerate.
	471	* rl78-dis.c: Fix display of stack pointer in MOVW based
	472	instructions.
	473
651657fa MW	474	2016-01-14 Matthew Wahab <matthew.wahab@arm.com>
	475
	476	* aarch64-opc.c (aarch64_sys_reg_supported_p): Merge conditionals
	477	testing for RAS support. Add checks for erxfr_el1, erxctlr_el1,
	478	erxtatus_el1 and erxaddr_el1.
	479
105bde57 MW	480	2016-01-12 Matthew Wahab <matthew.wahab@arm.com>
	481
	482	* arm-dis.c (arm_opcodes): Add "esb".
	483	(thumb_opcodes): Likewise.
	484
afa8d405 PB	485	2016-01-11 Peter Bergner <bergner@vnet.ibm.com>
	486
	487	* ppc-opc.c <xscmpnedp>: Delete.
	488	<xvcmpnedp>: Likewise.
	489	<xvcmpnedp.>: Likewise.
	490	<xvcmpnesp>: Likewise.
	491	<xvcmpnesp.>: Likewise.
	492
83c3256e AS	493	2016-01-08 Andreas Schwab <schwab@linux-m68k.org>
	494
	495	PR gas/13050
	496	* m68k-opc.c (moveb, movew): For ISA_B/C only allow #,d(An) in
	497	addition to ISA_A.
	498
6f2750fe AM	499	2016-01-01 Alan Modra <amodra@gmail.com>
	500
	501	Update year range in copyright notice of all files.
	502
3499769a AM	503	For older changes see ChangeLog-2015
	504	\f
	505	Copyright (C) 2016 Free Software Foundation, Inc.
	506
	507	Copying and distribution of this file, with or without modification,
	508	are permitted in any medium without royalty provided the copyright
	509	notice and this notice are preserved.
	510
	511	Local Variables:
	512	mode: change-log
	513	left-margin: 8
	514	fill-column: 74
	515	version-control: never
	516	End: