[deliverable/binutils-gdb.git] / opcodes / ChangeLog

2012-06-22  Roland McGrath  <mcgrathr@google.com>

	* i386-opc.h (RepPrefixOk): New enum constant.
	(i386_opcode_modifier): New bitfield 'repprefixok'.
	* i386-gen.c (opcode_modifiers): Add RepPrefixOk.
	* i386-opc.tbl: Add RepPrefixOk to bsf, bsr, and to all
	instructions that have IsString.
	* i386-tbl.h: Regenerate.

2012-06-11  Andreas Schwab  <schwab@linux-m68k.org>

	* ppc-opc.c (lvsl, lvebx, isellt, icbt, ldepx, lwepx, lvsr, lvehx)
	(iselgt, lvewx, iseleq, isel, dcbst, dcbstep, dcbfl, dcbf, lbepx)
	(lvx, dcbfep, dcbtstls, stvebx, dcbtstlse, stdepx, stwepx, dcbtls)
	(stvehx, dcbtlse, stvewx, stbepx, icblc, stvx, dcbtstt, dcbtst)
	(dcbtst, dcbtstep, dcbtt, dcbt, dcbt, lhepx, eciwx, dcbtep)
	(dcread, lxvdsx, lvxl, dcblc, sthepx, ecowx, dcbi, dcread, icbtls)
	(stvxl, lxsdx, lfdepx, stxsdx, stfdepx, dcba, dcbal, lxvw4x)
	(tlbivax, lfdpx, lxvd2x, tlbsrx., stxvw4x, tlbsx, tlbsx., stfdpx)
	(stfqx, stxvd2x, icbi, icbiep, icread, dcbzep): Change RA to RA0.

2012-05-19  Alan Modra  <amodra@gmail.com>

	* ppc-dis.c: Don't include elf32-ppc.h, do include elf/ppc.h.
	(get_powerpc_dialect): Detect VLE sections from ELF sh_flags.

2012-05-18  Alan Modra  <amodra@gmail.com>

	* ia64-opc.c: Remove #include "ansidecl.h".
	* z8kgen.c: Include sysdep.h first.

	* arc-dis.c: Include sysdep.h first, remove some redundant includes.
	* bfin-dis.c: Likewise.
	* i860-dis.c: Likewise.
	* ia64-dis.c: Likewise.
	* ia64-gen.c: Likewise.
	* m68hc11-dis.c: Likewise.
	* mmix-dis.c: Likewise.
	* msp430-dis.c: Likewise.
	* or32-dis.c: Likewise.
	* rl78-dis.c: Likewise.
	* rx-dis.c: Likewise.
	* tic4x-dis.c: Likewise.
	* tilegx-opc.c: Likewise.
	* tilepro-opc.c: Likewise.
	* rx-decode.c: Regenerate.

2012-05-17  James Lemke  <jwlemke@codesourcery.com>

	* ppc-opc.c (powerpc_macros): Add entries for e_extlwi to e_clrlslwi.

2012-05-17  James Lemke  <jwlemke@codesourcery.com>

	* ppc-opc.c (extract_sprg): Use ALLOW8_SPRG to include VLE.

2012-05-17  Daniel Richard G.  <skunk@iskunk.org>
	    Nick Clifton  <nickc@redhat.com>

	PR 14072
	* configure.in: Add check that sysdep.h has been included before
	any system header files.
	* configure: Regenerate.
	* config.in: Regenerate.
	* sysdep.h: Generate an error if included before config.h.
	* alpha-opc.c: Include sysdep.h before any other header file.
	* alpha-dis.c: Likewise.
	* avr-dis.c: Likewise.
	* cgen-opc.c: Likewise.
	* cr16-dis.c: Likewise.
	* cris-dis.c: Likewise.
	* crx-dis.c: Likewise.
	* d10v-dis.c: Likewise.
	* d10v-opc.c: Likewise.
	* d30v-dis.c: Likewise.
	* d30v-opc.c: Likewise.
	* h8500-dis.c: Likewise.
	* i370-dis.c: Likewise.
	* i370-opc.c: Likewise.
	* m10200-dis.c: Likewise.
	* m10300-dis.c: Likewise.
	* micromips-opc.c: Likewise.
	* mips-opc.c: Likewise.
	* mips61-opc.c: Likewise.
	* moxie-dis.c: Likewise.
	* or32-opc.c: Likewise.
	* pj-dis.c: Likewise.
	* ppc-dis.c: Likewise.
	* ppc-opc.c: Likewise.
	* s390-dis.c: Likewise.
	* sh-dis.c: Likewise.
	* sh64-dis.c: Likewise.
	* sparc-dis.c: Likewise.
	* sparc-opc.c: Likewise.
	* spu-dis.c: Likewise.
	* tic30-dis.c: Likewise.
	* tic54x-dis.c: Likewise.
	* tic80-dis.c: Likewise.
	* tic80-opc.c: Likewise.
	* tilegx-dis.c: Likewise.
	* tilepro-dis.c: Likewise.
	* v850-dis.c: Likewise.
	* v850-opc.c: Likewise.
	* vax-dis.c: Likewise.
	* w65-dis.c: Likewise.
	* xgate-dis.c: Likewise.
	* xtensa-dis.c: Likewise.
	* rl78-decode.opc: Likewise.
	* rl78-decode.c: Regenerate.
	* rx-decode.opc: Likewise.
	* rx-decode.c: Regenerate.

2012-05-17  Alan Modra  <amodra@gmail.com>

	* ppc_dis.c: Don't include elf/ppc.h.

2012-05-16  Meador Inge  <meadori@codesourcery.com>

	* arm-dis.c (arm_opcodes): Don't disassemble STMFD/LDMIA sp!, {reg}
	to PUSH/POP {reg}.

2012-05-15  James Murray <jsm@jsm-net.demon.co.uk>
	    Stephane Carrez <stcarrez@nerim.fr>

	* configure.in: Add S12X and XGATE co-processor support to m68hc11
	target.
	* disassemble.c: Likewise.
	* configure: Regenerate.
	* m68hc11-dis.c: Make objdump output more consistent, use hex
	instead of decimal and use 0x prefix for hex.
	* m68hc11-opc.c: Add S12X and XGATE opcodes.

2012-05-14  James Lemke  <jwlemke@codesourcery.com>

	* ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle.
	(PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines.
	(vle_opcd_indices): New array.
	(lookup_vle): New function.
	(disassemble_init_powerpc): Revise for second (VLE) opcode table.
	(print_insn_powerpc): Likewise.
	* ppc-opc.c: Likewise.

2012-05-14  Catherine Moore  <clm@codesourcery.com>
	    Maciej W. Rozycki  <macro@codesourcery.com>
	    Rhonda Wittels  <rhonda@codesourcery.com>
	    Nathan Froyd <froydnj@codesourcery.com>

	* ppc-opc.c (insert_arx, extract_arx): New functions.
	(insert_ary, extract_ary): New functions.
	(insert_li20, extract_li20): New functions.
	(insert_rx, extract_rx): New functions.
	(insert_ry, extract_ry): New functions.
	(insert_sci8, extract_sci8): New functions.
	(insert_sci8n, extract_sci8n): New functions.
	(insert_sd4h, extract_sd4h): New functions.
	(insert_sd4w, extract_sd4w): New functions.
	(insert_vlesi, extract_vlesi): New functions.
	(insert_vlensi, extract_vlensi): New functions.
	(insert_vleui, extract_vleui): New functions.
	(insert_vleil, extract_vleil): New functions.
	(BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT.
	(BI16, BI32, BO32, B8): New.
	(B15, B24, CRD32, CRS): New.
	(CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG.
	(DB, IMM20, RD, Rx, ARX, RY, RZ): New.
	(ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New.
	(SH6_MASK): Use PPC_OPSHIFT_INV.
	(SI8, UI5, OIMM5, UI7, BO16): New.
	(VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New.
	(XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV.
	(ALLOW8_SPRG): New.
	(insert_sprg, extract_sprg): Check ALLOW8_SPRG.
	(OPVUP, OPVUP_MASK OPVUP): New
	(BD8, BD8_MASK, BD8IO, BD8IO_MASK): New.
	(EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New.
	(BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New.
	(BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New.
	(IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New.
	(IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New.
	(SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New.
	(SE_IM5, SE_IM5_MASK): New.
	(SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New.
	(EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New.
	(BO32DNZ, BO32DZ): New.
	(NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE.
	(PPCVLE): New.
	(powerpc_opcodes): Add new VLE instructions.  Update existing
	instruction to include PPCVLE if supported.
	* ppc-dis.c (ppc_opts): Add vle entry.
	(get_powerpc_dialect): New function.
	(powerpc_init_dialect): VLE support.
	(print_insn_big_powerpc): Call get_powerpc_dialect.
	(print_insn_little_powerpc): Likewise.
	(operand_value_powerpc): Handle negative shift counts.
	(print_insn_powerpc): Handle 2-byte instruction lengths.

2012-05-11  Daniel Richard G.  <skunk@iskunk.org>

	PR binutils/14028
	* configure.in: Invoke ACX_HEADER_STRING.
	* configure: Regenerate.
	* config.in: Regenerate.
	* sysdep.h: If STRINGS_WITH_STRING is defined then include both
	string.h and strings.h.

2012-05-11  Nick Clifton  <nickc@redhat.com>

	PR binutils/14006
	* arm-dis.c (print_insn): Fix detection of instruction mode in
	files containing multiple executable sections.

2012-05-03  Sean Keys  <skeys@ipdatasys.com>

	* Makefile.in, configure: regenerate
	* disassemble.c (disassembler): Recognize ARCH_XGATE.
	* xgate-dis.c (read_memory, print_insn, print_insn_xgate):
	New functions.
	* configure.in: Recognize xgate.
	* xgate-dis.c, xgate-opc.c: New files for support of xgate
	* Makefile.am (CFILES, ALL_MACHINES): New files for disassembly
	and opcode generation for xgate.

2012-04-30  DJ Delorie  <dj@redhat.com>

	* rx-decode.opc (MOV): Do not sign-extend immediates which are
	already the maximum bit size.
	* rx-decode.c: Regenerate.

2012-04-27  David S. Miller  <davem@davemloft.net>

	* sparc-dis.c (v9a_asr_reg_names): Add 'cfr'.
	* sparc-opc.c (sparc_opcodes): Add rd/wr cases for %cfr.

	* sparc-opc.c (sparc_opcodes): Add 'wr X, %pause' and 'pause'.
	* sparc-dis.c (v9a_asr_reg_names): Add 'pause'.

	* sparc-opc.c (CBCOND): New define.
	(CBCOND_XCC): Likewise.
	(cbcond): New helper macro.
	(sparc_opcodes): Add compare-and-branch instructions.

	* sparc-dis.c (print_insn_sparc): Handle ')'.
	* sparc-opc.c (sparc_opcodes): Add crypto instructions.

	* sparc-opc.c (sparc_opcodes): Rework table to put HWCAP values
	into new struct sparc_opcode 'hwcaps' field instead of 'flags'.

2012-04-12  David S. Miller  <davem@davemloft.net>

	* sparc-dis.c (X_DISP10): Define.
	(print_insn_sparc): Handle '='.

2012-04-01  Mike Frysinger  <vapier@gentoo.org>

	* bfin-dis.c (fmtconst): Replace decimal handling with a single
	sprintf call and the '*' field width.

2012-03-23  Maxim Kuvyrkov  <maxim@codesourcery.com>

	* mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.

2012-03-16  Alan Modra  <amodra@gmail.com>

	* ppc-dis.c (PPC_OPC_SEGS, PPC_OP_TO_SEG): Delete.
	(powerpc_opcd_indices): Bump array size.
	(disassemble_init_powerpc): Set powerpc_opcd_indices entries
	corresponding to unused opcodes to following entry.
	(lookup_powerpc): New function, extracted and optimised from..
	(print_insn_powerpc): ..here.

2012-03-15  Alan Modra  <amodra@gmail.com>
	    James Lemke  <jwlemke@codesourcery.com>

	* disassemble.c (disassemble_init_for_target): Handle ppc init.
	* ppc-dis.c (private): New var.
	(powerpc_init_dialect): Don't return calloc failure, instead use
	private.
	(PPC_OPCD_SEGS, PPC_OP_TO_SEG): Define.
	(powerpc_opcd_indices): New array.
	(disassemble_init_powerpc): New function.
	(print_insn_big_powerpc): Don't init dialect here.
	(print_insn_little_powerpc): Likewise.
	(print_insn_powerpc): Start search using powerpc_opcd_indices.

2012-03-10  Edmar Wienskoski  <edmar@freescale.com>

	* ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
	* ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
	(PPCVEC2, PPCTMR, E6500): New short names.
	(powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
	mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
	lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
	lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
	lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
	optional operands on sync instruction for E6500 target.

2012-03-08  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	* s390-opc.txt: Set instruction type of pku to SS_L2RDRD.

2012-02-27  Alan Modra  <amodra@gmail.com>

	* mt-dis.c: Regenerate.

2012-02-27  Alan Modra  <amodra@gmail.com>

	* v850-opc.c (extract_v8): Rearrange to make it obvious this
	is the inverse of corresponding insert function.
	(extract_d22, extract_u9, extract_r4): Likewise.
	(extract_d9): Correct sign extension.
	(extract_d16_15): Don't assume "long" is 32 bits, and don't
	rely on implementation defined behaviour for shift right of
	signed types.
	(extract_d16_16, extract_d17_16, extract_i9): Likewise.
	(extract_d23): Likewise, and correct mask.

2012-02-27  Alan Modra  <amodra@gmail.com>

	* crx-dis.c (print_arg): Mask constant to 32 bits.
	* crx-opc.c (cst4_map): Use int array.

2012-02-27  Alan Modra  <amodra@gmail.com>

	* arc-dis.c (BITS): Don't use shifts to mask off bits.
	(FIELDD): Sign extend with xor,sub.

2012-02-25  Walter Lee  <walt@tilera.com>

	* tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
	* tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
	TILEPRO_OPC_LW_TLS_SN.

2012-02-21  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.h (HLEPrefixNone): New.
	(HLEPrefixLock): Likewise.
	(HLEPrefixAny): Likewise.
	(HLEPrefixRelease): Likewise.

2012-02-08  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (HLE_Fixup1): New.
	(HLE_Fixup2): Likewise.
	(HLE_Fixup3): Likewise.
	(Ebh1): Likewise.
	(Evh1): Likewise.
	(Ebh2): Likewise.
	(Evh2): Likewise.
	(Ebh3): Likewise.
	(Evh3): Likewise.
	(MOD_C6_REG_7): Likewise.
	(MOD_C7_REG_7): Likewise.
	(RM_C6_REG_7): Likewise.
	(RM_C7_REG_7): Likewise.
	(XACQUIRE_PREFIX): Likewise.
	(XRELEASE_PREFIX): Likewise.
	(dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
	cmpxchg, dec, inc, neg, not, or, sbb, sub, xor and xadd. Use
	Ebh2/Evh2 on xchg.  Use Ebh3/Evh3 on mov.
	(reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
	not, or, sbb, sub and xor.  Use Ebh3/Evh3 on mov.  Use
	MOD_C6_REG_7 and MOD_C7_REG_7.
	(mod_table): Add MOD_C6_REG_7 and MOD_C7_REG_7.
	(rm_table): Add RM_C6_REG_7 and RM_C7_REG_7.  Add xend and
	xtest.
	(prefix_name): Handle XACQUIRE_PREFIX and XRELEASE_PREFIX.
	(CMPXCHG8B_Fixup): Handle HLE prefix on cmpxchg8b.

	* i386-gen.c (cpu_flag_init): Add CPU_HLE_FLAGS and
	CPU_RTM_FLAGS.
	(cpu_flags): Add CpuHLE and CpuRTM.
	(opcode_modifiers): Add HLEPrefixOk.

	* i386-opc.h (CpuHLE): New.
	(CpuRTM): Likewise.
	(HLEPrefixOk): Likewise.
	(i386_cpu_flags): Add cpuhle and cpurtm.
	(i386_opcode_modifier): Add hleprefixok.

	* i386-opc.tbl: Add HLEPrefixOk=3 to mov.  Add HLEPrefixOk to
	add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
	sbb, sub, xor and xadd.  Add HLEPrefixOk=2 to xchg with memory
	operand.  Add xacquire, xrelease, xabort, xbegin, xend and
	xtest.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

2012-01-24  DJ Delorie  <dj@redhat.com>

	* rl78-decode.opc (rl78_decode_opcode): Add NOT1.
	* rl78-decode.c: Regenerate.

2012-01-17  James Murray  <jsm@jsm-net.demon.co.uk>

	PR binutils/10173
	* cr16-dis.c (print_arg): Test symtab_size not num_symbols.

2012-01-17  Andreas Schwab  <schwab@linux-m68k.org>

	* m68k-opc.c (m68k_opcodes): Fix entries for pmove with BADx/BACx
	register and move them after pmove with PSR/PCSR register.

2012-01-13  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (mod_table): Add vmfunc.

	* i386-gen.c (cpu_flag_init): Add CPU_VMFUNC_FLAGS.
	(cpu_flags): CpuVMFUNC.

	* i386-opc.h (CpuVMFUNC): New.
	(i386_cpu_flags): Add cpuvmfunc.

	* i386-opc.tbl: Add vmfunc.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

For older changes see ChangeLog-2011
\f
Local Variables:
mode: change-log
left-margin: 8
fill-column: 74
version-control: never
End:
Commit	Line	Data
29c048b6 RM	1	2012-06-22 Roland McGrath <mcgrathr@google.com>
	2
	3	* i386-opc.h (RepPrefixOk): New enum constant.
	4	(i386_opcode_modifier): New bitfield 'repprefixok'.
	5	* i386-gen.c (opcode_modifiers): Add RepPrefixOk.
	6	* i386-opc.tbl: Add RepPrefixOk to bsf, bsr, and to all
	7	instructions that have IsString.
	8	* i386-tbl.h: Regenerate.
	9
c7a8dbf9 AS	10	2012-06-11 Andreas Schwab <schwab@linux-m68k.org>
	11
	12	* ppc-opc.c (lvsl, lvebx, isellt, icbt, ldepx, lwepx, lvsr, lvehx)
	13	(iselgt, lvewx, iseleq, isel, dcbst, dcbstep, dcbfl, dcbf, lbepx)
	14	(lvx, dcbfep, dcbtstls, stvebx, dcbtstlse, stdepx, stwepx, dcbtls)
	15	(stvehx, dcbtlse, stvewx, stbepx, icblc, stvx, dcbtstt, dcbtst)
	16	(dcbtst, dcbtstep, dcbtt, dcbt, dcbt, lhepx, eciwx, dcbtep)
	17	(dcread, lxvdsx, lvxl, dcblc, sthepx, ecowx, dcbi, dcread, icbtls)
	18	(stvxl, lxsdx, lfdepx, stxsdx, stfdepx, dcba, dcbal, lxvw4x)
	19	(tlbivax, lfdpx, lxvd2x, tlbsrx., stxvw4x, tlbsx, tlbsx., stfdpx)
	20	(stfqx, stxvd2x, icbi, icbiep, icread, dcbzep): Change RA to RA0.
	21
94caa966 AM	22	2012-05-19 Alan Modra <amodra@gmail.com>
	23
	24	* ppc-dis.c: Don't include elf32-ppc.h, do include elf/ppc.h.
	25	(get_powerpc_dialect): Detect VLE sections from ELF sh_flags.
	26
5eb3690e AM	27	2012-05-18 Alan Modra <amodra@gmail.com>
5eb3690e AM	28
71fe7bab AM	29	* ia64-opc.c: Remove #include "ansidecl.h".
	30	* z8kgen.c: Include sysdep.h first.
	31
5eb3690e AM	32	* arc-dis.c: Include sysdep.h first, remove some redundant includes.
	33	* bfin-dis.c: Likewise.
	34	* i860-dis.c: Likewise.
	35	* ia64-dis.c: Likewise.
	36	* ia64-gen.c: Likewise.
	37	* m68hc11-dis.c: Likewise.
	38	* mmix-dis.c: Likewise.
	39	* msp430-dis.c: Likewise.
	40	* or32-dis.c: Likewise.
	41	* rl78-dis.c: Likewise.
	42	* rx-dis.c: Likewise.
	43	* tic4x-dis.c: Likewise.
	44	* tilegx-opc.c: Likewise.
	45	* tilepro-opc.c: Likewise.
	46	* rx-decode.c: Regenerate.
	47
a4ebc835 AM	48	2012-05-17 James Lemke <jwlemke@codesourcery.com>
	49
	50	* ppc-opc.c (powerpc_macros): Add entries for e_extlwi to e_clrlslwi.
	51
98c76446 AM	52	2012-05-17 James Lemke <jwlemke@codesourcery.com>
	53
	54	* ppc-opc.c (extract_sprg): Use ALLOW8_SPRG to include VLE.
	55
df7b86aa NC	56	2012-05-17 Daniel Richard G. <skunk@iskunk.org>
	57	Nick Clifton <nickc@redhat.com>
	58
	59	PR 14072
	60	* configure.in: Add check that sysdep.h has been included before
	61	any system header files.
	62	* configure: Regenerate.
	63	* config.in: Regenerate.
	64	* sysdep.h: Generate an error if included before config.h.
	65	* alpha-opc.c: Include sysdep.h before any other header file.
	66	* alpha-dis.c: Likewise.
	67	* avr-dis.c: Likewise.
	68	* cgen-opc.c: Likewise.
	69	* cr16-dis.c: Likewise.
	70	* cris-dis.c: Likewise.
	71	* crx-dis.c: Likewise.
	72	* d10v-dis.c: Likewise.
	73	* d10v-opc.c: Likewise.
	74	* d30v-dis.c: Likewise.
	75	* d30v-opc.c: Likewise.
	76	* h8500-dis.c: Likewise.
	77	* i370-dis.c: Likewise.
	78	* i370-opc.c: Likewise.
	79	* m10200-dis.c: Likewise.
	80	* m10300-dis.c: Likewise.
	81	* micromips-opc.c: Likewise.
	82	* mips-opc.c: Likewise.
	83	* mips61-opc.c: Likewise.
	84	* moxie-dis.c: Likewise.
	85	* or32-opc.c: Likewise.
	86	* pj-dis.c: Likewise.
	87	* ppc-dis.c: Likewise.
	88	* ppc-opc.c: Likewise.
	89	* s390-dis.c: Likewise.
	90	* sh-dis.c: Likewise.
	91	* sh64-dis.c: Likewise.
	92	* sparc-dis.c: Likewise.
	93	* sparc-opc.c: Likewise.
	94	* spu-dis.c: Likewise.
	95	* tic30-dis.c: Likewise.
	96	* tic54x-dis.c: Likewise.
	97	* tic80-dis.c: Likewise.
	98	* tic80-opc.c: Likewise.
	99	* tilegx-dis.c: Likewise.
	100	* tilepro-dis.c: Likewise.
	101	* v850-dis.c: Likewise.
	102	* v850-opc.c: Likewise.
	103	* vax-dis.c: Likewise.
	104	* w65-dis.c: Likewise.
	105	* xgate-dis.c: Likewise.
	106	* xtensa-dis.c: Likewise.
	107	* rl78-decode.opc: Likewise.
	108	* rl78-decode.c: Regenerate.
	109	* rx-decode.opc: Likewise.
	110	* rx-decode.c: Regenerate.
	111
e1dad58d AM	112	2012-05-17 Alan Modra <amodra@gmail.com>
	113
	114	* ppc_dis.c: Don't include elf/ppc.h.
	115
101af531 NC	116	2012-05-16 Meador Inge <meadori@codesourcery.com>
	117
	118	* arm-dis.c (arm_opcodes): Don't disassemble STMFD/LDMIA sp!, {reg}
	119	to PUSH/POP {reg}.
	120
6927f982 NC	121	2012-05-15 James Murray <jsm@jsm-net.demon.co.uk>
	122	Stephane Carrez <stcarrez@nerim.fr>
	123
	124	* configure.in: Add S12X and XGATE co-processor support to m68hc11
	125	target.
	126	* disassemble.c: Likewise.
	127	* configure: Regenerate.
	128	* m68hc11-dis.c: Make objdump output more consistent, use hex
	129	instead of decimal and use 0x prefix for hex.
	130	* m68hc11-opc.c: Add S12X and XGATE opcodes.
	131
b9c361e0 JL	132	2012-05-14 James Lemke <jwlemke@codesourcery.com>
	133
	134	* ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle.
	135	(PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines.
	136	(vle_opcd_indices): New array.
	137	(lookup_vle): New function.
	138	(disassemble_init_powerpc): Revise for second (VLE) opcode table.
	139	(print_insn_powerpc): Likewise.
	140	* ppc-opc.c: Likewise.
	141
	142	2012-05-14 Catherine Moore <clm@codesourcery.com>
	143	Maciej W. Rozycki <macro@codesourcery.com>
	144	Rhonda Wittels <rhonda@codesourcery.com>
	145	Nathan Froyd <froydnj@codesourcery.com>
	146
	147	* ppc-opc.c (insert_arx, extract_arx): New functions.
	148	(insert_ary, extract_ary): New functions.
	149	(insert_li20, extract_li20): New functions.
	150	(insert_rx, extract_rx): New functions.
	151	(insert_ry, extract_ry): New functions.
	152	(insert_sci8, extract_sci8): New functions.
	153	(insert_sci8n, extract_sci8n): New functions.
	154	(insert_sd4h, extract_sd4h): New functions.
	155	(insert_sd4w, extract_sd4w): New functions.
	156	(insert_vlesi, extract_vlesi): New functions.
	157	(insert_vlensi, extract_vlensi): New functions.
	158	(insert_vleui, extract_vleui): New functions.
	159	(insert_vleil, extract_vleil): New functions.
	160	(BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT.
	161	(BI16, BI32, BO32, B8): New.
	162	(B15, B24, CRD32, CRS): New.
	163	(CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG.
	164	(DB, IMM20, RD, Rx, ARX, RY, RZ): New.
	165	(ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New.
	166	(SH6_MASK): Use PPC_OPSHIFT_INV.
	167	(SI8, UI5, OIMM5, UI7, BO16): New.
	168	(VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New.
	169	(XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV.
	170	(ALLOW8_SPRG): New.
	171	(insert_sprg, extract_sprg): Check ALLOW8_SPRG.
	172	(OPVUP, OPVUP_MASK OPVUP): New
	173	(BD8, BD8_MASK, BD8IO, BD8IO_MASK): New.
	174	(EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New.
	175	(BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New.
	176	(BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New.
	177	(IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New.
	178	(IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New.
	179	(SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New.
	180	(SE_IM5, SE_IM5_MASK): New.
	181	(SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New.
	182	(EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New.
	183	(BO32DNZ, BO32DZ): New.
	184	(NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE.
	185	(PPCVLE): New.
	186	(powerpc_opcodes): Add new VLE instructions. Update existing
	187	instruction to include PPCVLE if supported.
	188	* ppc-dis.c (ppc_opts): Add vle entry.
	189	(get_powerpc_dialect): New function.
	190	(powerpc_init_dialect): VLE support.
	191	(print_insn_big_powerpc): Call get_powerpc_dialect.
	192	(print_insn_little_powerpc): Likewise.
	193	(operand_value_powerpc): Handle negative shift counts.
	194	(print_insn_powerpc): Handle 2-byte instruction lengths.
	195
208a4923 NC	196	2012-05-11 Daniel Richard G. <skunk@iskunk.org>
	197
	198	PR binutils/14028
	199	* configure.in: Invoke ACX_HEADER_STRING.
	200	* configure: Regenerate.
	201	* config.in: Regenerate.
	202	* sysdep.h: If STRINGS_WITH_STRING is defined then include both
	203	string.h and strings.h.
	204
6750a3a7 NC	205	2012-05-11 Nick Clifton <nickc@redhat.com>
	206
	207	PR binutils/14006
	208	* arm-dis.c (print_insn): Fix detection of instruction mode in
	209	files containing multiple executable sections.
	210
f6c1a2d5 NC	211	2012-05-03 Sean Keys <skeys@ipdatasys.com>
	212
	213	* Makefile.in, configure: regenerate
	214	* disassemble.c (disassembler): Recognize ARCH_XGATE.
	215	* xgate-dis.c (read_memory, print_insn, print_insn_xgate):
	216	New functions.
	217	* configure.in: Recognize xgate.
	218	* xgate-dis.c, xgate-opc.c: New files for support of xgate
	219	* Makefile.am (CFILES, ALL_MACHINES): New files for disassembly
	220	and opcode generation for xgate.
	221
78e98aab DD	222	2012-04-30 DJ Delorie <dj@redhat.com>
	223
	224	* rx-decode.opc (MOV): Do not sign-extend immediates which are
	225	already the maximum bit size.
	226	* rx-decode.c: Regenerate.
	227
ec668d69 DM	228	2012-04-27 David S. Miller <davem@davemloft.net>
ec668d69 DM	229
2e52845b DM	230	* sparc-dis.c (v9a_asr_reg_names): Add 'cfr'.
	231	* sparc-opc.c (sparc_opcodes): Add rd/wr cases for %cfr.
	232
58004e23 DM	233	* sparc-opc.c (sparc_opcodes): Add 'wr X, %pause' and 'pause'.
	234	* sparc-dis.c (v9a_asr_reg_names): Add 'pause'.
	235
698544e1 DM	236	* sparc-opc.c (CBCOND): New define.
	237	(CBCOND_XCC): Likewise.
	238	(cbcond): New helper macro.
	239	(sparc_opcodes): Add compare-and-branch instructions.
	240
6cda1326 DM	241	* sparc-dis.c (print_insn_sparc): Handle ')'.
	242	* sparc-opc.c (sparc_opcodes): Add crypto instructions.
	243
ec668d69 DM	244	* sparc-opc.c (sparc_opcodes): Rework table to put HWCAP values
	245	into new struct sparc_opcode 'hwcaps' field instead of 'flags'.
	246
2615994e DM	247	2012-04-12 David S. Miller <davem@davemloft.net>
	248
	249	* sparc-dis.c (X_DISP10): Define.
	250	(print_insn_sparc): Handle '='.
	251
5de10af0 MF	252	2012-04-01 Mike Frysinger <vapier@gentoo.org>
	253
	254	* bfin-dis.c (fmtconst): Replace decimal handling with a single
	255	sprintf call and the '*' field width.
	256
55a36193 MK	257	2012-03-23 Maxim Kuvyrkov <maxim@codesourcery.com>
	258
	259	* mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.
	260
d6688282 AM	261	2012-03-16 Alan Modra <amodra@gmail.com>
	262
	263	* ppc-dis.c (PPC_OPC_SEGS, PPC_OP_TO_SEG): Delete.
	264	(powerpc_opcd_indices): Bump array size.
	265	(disassemble_init_powerpc): Set powerpc_opcd_indices entries
	266	corresponding to unused opcodes to following entry.
	267	(lookup_powerpc): New function, extracted and optimised from..
	268	(print_insn_powerpc): ..here.
	269
b240011a AM	270	2012-03-15 Alan Modra <amodra@gmail.com>
	271	James Lemke <jwlemke@codesourcery.com>
	272
	273	* disassemble.c (disassemble_init_for_target): Handle ppc init.
	274	* ppc-dis.c (private): New var.
	275	(powerpc_init_dialect): Don't return calloc failure, instead use
	276	private.
	277	(PPC_OPCD_SEGS, PPC_OP_TO_SEG): Define.
	278	(powerpc_opcd_indices): New array.
	279	(disassemble_init_powerpc): New function.
	280	(print_insn_big_powerpc): Don't init dialect here.
	281	(print_insn_little_powerpc): Likewise.
	282	(print_insn_powerpc): Start search using powerpc_opcd_indices.
	283
aea77599 AM	284	2012-03-10 Edmar Wienskoski <edmar@freescale.com>
	285
	286	* ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
	287	* ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
	288	(PPCVEC2, PPCTMR, E6500): New short names.
	289	(powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
	290	mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
	291	lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
	292	lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
	293	lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
	294	optional operands on sync instruction for E6500 target.
	295
5333187a AK	296	2012-03-08 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
	297
	298	* s390-opc.txt: Set instruction type of pku to SS_L2RDRD.
	299
a597d2d3 AM	300	2012-02-27 Alan Modra <amodra@gmail.com>
	301
	302	* mt-dis.c: Regenerate.
	303
3f26eb3a AM	304	2012-02-27 Alan Modra <amodra@gmail.com>
	305
	306	* v850-opc.c (extract_v8): Rearrange to make it obvious this
	307	is the inverse of corresponding insert function.
	308	(extract_d22, extract_u9, extract_r4): Likewise.
	309	(extract_d9): Correct sign extension.
	310	(extract_d16_15): Don't assume "long" is 32 bits, and don't
	311	rely on implementation defined behaviour for shift right of
	312	signed types.
	313	(extract_d16_16, extract_d17_16, extract_i9): Likewise.
	314	(extract_d23): Likewise, and correct mask.
	315
1f42f8b3 AM	316	2012-02-27 Alan Modra <amodra@gmail.com>
	317
	318	* crx-dis.c (print_arg): Mask constant to 32 bits.
	319	* crx-opc.c (cst4_map): Use int array.
	320
cdb06235 AM	321	2012-02-27 Alan Modra <amodra@gmail.com>
	322
	323	* arc-dis.c (BITS): Don't use shifts to mask off bits.
	324	(FIELDD): Sign extend with xor,sub.
	325
6f7be959 WL	326	2012-02-25 Walter Lee <walt@tilera.com>
	327
	328	* tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
	329	* tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
	330	TILEPRO_OPC_LW_TLS_SN.
	331
82c2def5 L	332	2012-02-21 H.J. Lu <hongjiu.lu@intel.com>
	333
	334	* i386-opc.h (HLEPrefixNone): New.
	335	(HLEPrefixLock): Likewise.
	336	(HLEPrefixAny): Likewise.
	337	(HLEPrefixRelease): Likewise.
	338
42164a71 L	339	2012-02-08 H.J. Lu <hongjiu.lu@intel.com>
	340
	341	* i386-dis.c (HLE_Fixup1): New.
	342	(HLE_Fixup2): Likewise.
	343	(HLE_Fixup3): Likewise.
	344	(Ebh1): Likewise.
	345	(Evh1): Likewise.
	346	(Ebh2): Likewise.
	347	(Evh2): Likewise.
	348	(Ebh3): Likewise.
	349	(Evh3): Likewise.
	350	(MOD_C6_REG_7): Likewise.
	351	(MOD_C7_REG_7): Likewise.
	352	(RM_C6_REG_7): Likewise.
	353	(RM_C7_REG_7): Likewise.
	354	(XACQUIRE_PREFIX): Likewise.
	355	(XRELEASE_PREFIX): Likewise.
	356	(dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
	357	cmpxchg, dec, inc, neg, not, or, sbb, sub, xor and xadd. Use
	358	Ebh2/Evh2 on xchg. Use Ebh3/Evh3 on mov.
	359	(reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
	360	not, or, sbb, sub and xor. Use Ebh3/Evh3 on mov. Use
	361	MOD_C6_REG_7 and MOD_C7_REG_7.
	362	(mod_table): Add MOD_C6_REG_7 and MOD_C7_REG_7.
	363	(rm_table): Add RM_C6_REG_7 and RM_C7_REG_7. Add xend and
	364	xtest.
	365	(prefix_name): Handle XACQUIRE_PREFIX and XRELEASE_PREFIX.
	366	(CMPXCHG8B_Fixup): Handle HLE prefix on cmpxchg8b.
	367
	368	* i386-gen.c (cpu_flag_init): Add CPU_HLE_FLAGS and
	369	CPU_RTM_FLAGS.
	370	(cpu_flags): Add CpuHLE and CpuRTM.
	371	(opcode_modifiers): Add HLEPrefixOk.
	372
	373	* i386-opc.h (CpuHLE): New.
	374	(CpuRTM): Likewise.
	375	(HLEPrefixOk): Likewise.
	376	(i386_cpu_flags): Add cpuhle and cpurtm.
	377	(i386_opcode_modifier): Add hleprefixok.
	378
	379	* i386-opc.tbl: Add HLEPrefixOk=3 to mov. Add HLEPrefixOk to
	380	add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
	381	sbb, sub, xor and xadd. Add HLEPrefixOk=2 to xchg with memory
	382	operand. Add xacquire, xrelease, xabort, xbegin, xend and
	383	xtest.
	384	* i386-init.h: Regenerated.
	385	* i386-tbl.h: Likewise.
	386
21abe33a DD	387	2012-01-24 DJ Delorie <dj@redhat.com>
	388
	389	* rl78-decode.opc (rl78_decode_opcode): Add NOT1.
	390	* rl78-decode.c: Regenerate.
	391
e20cc039 AM	392	2012-01-17 James Murray <jsm@jsm-net.demon.co.uk>
	393
	394	PR binutils/10173
	395	* cr16-dis.c (print_arg): Test symtab_size not num_symbols.
	396
e143d25c AS	397	2012-01-17 Andreas Schwab <schwab@linux-m68k.org>
	398
	399	* m68k-opc.c (m68k_opcodes): Fix entries for pmove with BADx/BACx
	400	register and move them after pmove with PSR/PCSR register.
	401
8729a6f6 L	402	2012-01-13 H.J. Lu <hongjiu.lu@intel.com>
	403
	404	* i386-dis.c (mod_table): Add vmfunc.
	405
	406	* i386-gen.c (cpu_flag_init): Add CPU_VMFUNC_FLAGS.
	407	(cpu_flags): CpuVMFUNC.
	408
	409	* i386-opc.h (CpuVMFUNC): New.
	410	(i386_cpu_flags): Add cpuvmfunc.
	411
	412	* i386-opc.tbl: Add vmfunc.
	413	* i386-init.h: Regenerated.
	414	* i386-tbl.h: Likewise.
5011093d	415
23e1d329	416	For older changes see ChangeLog-2011
252b5132 RH	417	\f
252b5132 RH	418	Local Variables:
2f6d2f85 NC	419	mode: change-log
	420	left-margin: 8
	421	fill-column: 74
252b5132 RH	422	version-control: never
252b5132 RH	423	End: