Add support for TBM instructions.
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
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12011-01-17 Quentin Neill <quentin.neill@amd.com>
2
3 * i386-dis.c (REG_XOP_TBM_01): New.
4 (REG_XOP_TBM_02): New.
5 (reg_table): Add REG_XOP_TBM_01 and REG_XOP_TBM_02 tables.
6 (xop_table): Redirect to REG_XOP_TBM_01 and REG_XOP_TBM_02
7 entries, and add bextr instruction.
8
9 * i386-gen.c (cpu_flag_init): Add CPU_TBM_FLAGS, CpuTBM.
10 (cpu_flags): Add CpuTBM.
11
12 * i386-opc.h (CpuTBM) New.
13 (i386_cpu_flags): Add bit cputbm.
14
15 * i386-opc.tbl: Add bextr, blcfill, blci, blcic, blcmsk,
16 blcs, blsfill, blsic, t1mskc, and tzmsk.
17
18 * i386-init.h: Regenerated.
19 * i386-tbl.h: Regenerated
20
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212011-01-12 DJ Delorie <dj@redhat.com>
22
23 * rx-dis.c (print_insn_rx): Support RX_Operand_TwoReg.
24
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252011-01-11 Mingjie Xing <mingjie.xing@gmail.com>
26
27 * mips-dis.c (print_insn_args): Adjust the value to print the real
28 offset for "+c" argument.
29
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302011-01-10 Nick Clifton <nickc@redhat.com>
31
32 * po/da.po: Updated Danish translation.
33
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342011-01-05 Nathan Sidwell <nathan@codesourcery.com>
35
36 * arm-dis.c (thumb32_opcodes): BLX must have bit zero clear.
37
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382011-01-04 H.J. Lu <hongjiu.lu@intel.com>
39
40 * i386-dis.c (REG_VEX_38F3): New.
41 (PREFIX_0FBC): Likewise.
42 (PREFIX_VEX_38F2): Likewise.
43 (PREFIX_VEX_38F3_REG_1): Likewise.
44 (PREFIX_VEX_38F3_REG_2): Likewise.
45 (PREFIX_VEX_38F3_REG_3): Likewise.
46 (PREFIX_VEX_38F7): Likewise.
47 (VEX_LEN_38F2_P_0): Likewise.
48 (VEX_LEN_38F3_R_1_P_0): Likewise.
49 (VEX_LEN_38F3_R_2_P_0): Likewise.
50 (VEX_LEN_38F3_R_3_P_0): Likewise.
51 (VEX_LEN_38F7_P_0): Likewise.
52 (dis386_twobyte): Use PREFIX_0FBC.
53 (reg_table): Add REG_VEX_38F3.
54 (prefix_table): Add PREFIX_0FBC, PREFIX_VEX_38F2,
55 PREFIX_VEX_38F3_REG_1, PREFIX_VEX_38F3_REG_2,
56 PREFIX_VEX_38F3_REG_3 and PREFIX_VEX_38F7.
57 (vex_table): Use PREFIX_VEX_38F2, REG_VEX_38F3 and
58 PREFIX_VEX_38F7.
59 (vex_len_table): Add VEX_LEN_38F2_P_0, VEX_LEN_38F3_R_1_P_0,
60 VEX_LEN_38F3_R_2_P_0, VEX_LEN_38F3_R_3_P_0 and
61 VEX_LEN_38F7_P_0.
62
63 * i386-gen.c (cpu_flag_init): Add CPU_BMI_FLAGS.
64 (cpu_flags): Add CpuBMI.
65
66 * i386-opc.h (CpuBMI): New.
67 (i386_cpu_flags): Add cpubmi.
68
69 * i386-opc.tbl: Add andn, bextr, blsi, blsmsk, blsr and tzcnt.
70 * i386-init.h: Regenerated.
71 * i386-tbl.h: Likewise.
72
cb21baef
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732011-01-04 H.J. Lu <hongjiu.lu@intel.com>
74
75 * i386-dis.c (VexGdq): New.
76 (OP_VEX): Handle dq_mode.
77
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782011-01-01 H.J. Lu <hongjiu.lu@intel.com>
79
80 * i386-gen.c (process_copyright): Update copyright to 2011.
81
9e9e0820 82For older changes see ChangeLog-2010
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