Commit | Line | Data |
---|---|---|
d2159fdc HW |
1 | 2018-02-12 Henry Wong <henry@stuffedcow.net> |
2 | ||
3 | * mips-opc.c (mips_builtin_opcodes): Correct "sigrie" encoding. | |
4 | ||
f174ef9f NC |
5 | 2018-02-05 Nick Clifton <nickc@redhat.com> |
6 | ||
7 | * po/pt_BR.po: Updated Brazilian Portuguese translation. | |
8 | ||
be3a8dca IT |
9 | 2018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com> |
10 | ||
11 | * i386-dis.c (enum): Add pconfig. | |
12 | * i386-gen.c (cpu_flag_init): Add CPU_PCONFIG_FLAGS. | |
13 | (cpu_flags): Add CpuPCONFIG. | |
14 | * i386-opc.h (enum): Add CpuPCONFIG. | |
15 | (i386_cpu_flags): Add cpupconfig. | |
16 | * i386-opc.tbl: Add PCONFIG instruction. | |
17 | * i386-init.h: Regenerate. | |
18 | * i386-tbl.h: Likewise. | |
19 | ||
3233d7d0 IT |
20 | 2018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com> |
21 | ||
22 | * i386-dis.c (enum): Add PREFIX_0F09. | |
23 | * i386-gen.c (cpu_flag_init): Add CPU_WBNOINVD_FLAGS. | |
24 | (cpu_flags): Add CpuWBNOINVD. | |
25 | * i386-opc.h (enum): Add CpuWBNOINVD. | |
26 | (i386_cpu_flags): Add cpuwbnoinvd. | |
27 | * i386-opc.tbl: Add WBNOINVD instruction. | |
28 | * i386-init.h: Regenerate. | |
29 | * i386-tbl.h: Likewise. | |
30 | ||
e925c834 JW |
31 | 2018-01-17 Jim Wilson <jimw@sifive.com> |
32 | ||
33 | * riscv-opc.c (riscv_opcodes) <addi>: Use z instead of 0. | |
34 | ||
d777820b IT |
35 | 2018-01-17 Igor Tsimbalist <igor.v.tsimbalist@intel.com> |
36 | ||
37 | * i386-gen.c (cpu_flag_init): Delete CPU_CET_FLAGS, CpuCET. | |
38 | Add CPU_IBT_FLAGS, CPU_SHSTK_FLAGS, CPY_ANY_IBT_FLAGS, | |
39 | CPU_ANY_SHSTK_FLAGS, CpuIBT, CpuSHSTK. | |
40 | (cpu_flags): Add CpuIBT, CpuSHSTK. | |
41 | * i386-opc.h (enum): Add CpuIBT, CpuSHSTK. | |
42 | (i386_cpu_flags): Add cpuibt, cpushstk. | |
43 | * i386-opc.tbl: Change CpuCET to CpuSHSTK and CpuIBT. | |
44 | * i386-init.h: Regenerate. | |
45 | * i386-tbl.h: Likewise. | |
46 | ||
f6efed01 NC |
47 | 2018-01-16 Nick Clifton <nickc@redhat.com> |
48 | ||
49 | * po/pt_BR.po: Updated Brazilian Portugese translation. | |
50 | * po/de.po: Updated German translation. | |
51 | ||
2721d702 JW |
52 | 2018-01-15 Jim Wilson <jimw@sifive.com> |
53 | ||
54 | * riscv-opc.c (match_c_nop): New. | |
55 | (riscv_opcodes) <addi>: Handle an addi that compresses to c.nop. | |
56 | ||
616dcb87 NC |
57 | 2018-01-15 Nick Clifton <nickc@redhat.com> |
58 | ||
59 | * po/uk.po: Updated Ukranian translation. | |
60 | ||
3957a496 NC |
61 | 2018-01-13 Nick Clifton <nickc@redhat.com> |
62 | ||
63 | * po/opcodes.pot: Regenerated. | |
64 | ||
769c7ea5 NC |
65 | 2018-01-13 Nick Clifton <nickc@redhat.com> |
66 | ||
67 | * configure: Regenerate. | |
68 | ||
faf766e3 NC |
69 | 2018-01-13 Nick Clifton <nickc@redhat.com> |
70 | ||
71 | 2.30 branch created. | |
72 | ||
888a89da IT |
73 | 2018-01-11 Igor Tsimbalist <igor.v.tsimbalist@intel.com> |
74 | ||
75 | * i386-opc.tbl: Remove VL variants for 4FMAPS and 4VNNIW insns. | |
76 | * i386-tbl.h: Regenerate. | |
77 | ||
cbda583a JB |
78 | 2018-01-10 Jan Beulich <jbeulich@suse.com> |
79 | ||
80 | * i386-opc.tbl (v4fmaddss, v4fnmaddss): Adjust Disp8MemShift. | |
81 | * i386-tbl.h: Re-generate. | |
82 | ||
c9e92278 JB |
83 | 2018-01-10 Jan Beulich <jbeulich@suse.com> |
84 | ||
85 | * i386-opc.tbl (vpcmpeqb, vpcmpleb, vpcmpltb, vpcmpneqb, | |
86 | vpcmpnleb, vpcmpnltb, vpcmpequb, vpcmpleub, vpcmpltub, | |
87 | vpcmpnequb, vpcmpnleub, vpcmpnltub, vpcmpeqw, vpcmplew, | |
88 | vpcmpltw, vpcmpneqw, vpcmpnlew, vpcmpnltw, vpcmpequw, vpcmpleuw, | |
89 | vpcmpltuw, vpcmpnequw, vpcmpnleuw, vpcmpnltuw): Adjust | |
90 | Disp8MemShift of AVX512VL forms. | |
91 | * i386-tbl.h: Re-generate. | |
92 | ||
35fd2b2b JW |
93 | 2018-01-09 Jim Wilson <jimw@sifive.com> |
94 | ||
95 | * riscv-dis.c (maybe_print_address): If base_reg is zero, | |
96 | then the hi_addr value is zero. | |
97 | ||
91d8b670 JG |
98 | 2018-01-09 James Greenhalgh <james.greenhalgh@arm.com> |
99 | ||
100 | * arm-dis.c (arm_opcodes): Add csdb. | |
101 | (thumb32_opcodes): Add csdb. | |
102 | ||
be2e7d95 JG |
103 | 2018-01-09 James Greenhalgh <james.greenhalgh@arm.com> |
104 | ||
105 | * aarch64-tbl.h (aarch64_opcode_table): Add "csdb". | |
106 | * aarch64-asm-2.c: Regenerate. | |
107 | * aarch64-dis-2.c: Regenerate. | |
108 | * aarch64-opc-2.c: Regenerate. | |
109 | ||
704a705d L |
110 | 2018-01-08 H.J. Lu <hongjiu.lu@intel.com> |
111 | ||
112 | PR gas/22681 | |
113 | * i386-opc.tbl: Properly encode vmovd with Qword memeory operand. | |
114 | Remove AVX512 vmovd with 64-bit operands. | |
115 | * i386-tbl.h: Regenerated. | |
116 | ||
35eeb78f JW |
117 | 2018-01-05 Jim Wilson <jimw@sifive.com> |
118 | ||
119 | * riscv-dis.c (print_insn_args) <'s'>: Call maybe_print_address for a | |
120 | jalr. | |
121 | ||
219d1afa AM |
122 | 2018-01-03 Alan Modra <amodra@gmail.com> |
123 | ||
124 | Update year range in copyright notice of all files. | |
125 | ||
1508bbf5 JB |
126 | 2018-01-02 Jan Beulich <jbeulich@suse.com> |
127 | ||
128 | * i386-gen.c (operand_type_init): Restore OPERAND_TYPE_REGYMM | |
129 | and OPERAND_TYPE_REGZMM entries. | |
130 | ||
1e563868 | 131 | For older changes see ChangeLog-2017 |
3499769a | 132 | \f |
1e563868 | 133 | Copyright (C) 2018 Free Software Foundation, Inc. |
3499769a AM |
134 | |
135 | Copying and distribution of this file, with or without modification, | |
136 | are permitted in any medium without royalty provided the copyright | |
137 | notice and this notice are preserved. | |
138 | ||
139 | Local Variables: | |
140 | mode: change-log | |
141 | left-margin: 8 | |
142 | fill-column: 74 | |
143 | version-control: never | |
144 | End: |