gas/
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
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12006-02-27 H.J. Lu <hongjiu.lu@intel.com>
2
3 * i386-dis.c (IS_3BYTE_OPCODE): New for 3-byte opcodes used by
4 Intel Merom New Instructions.
5 (THREE_BYTE_0): Likewise.
6 (THREE_BYTE_1): Likewise.
7 (three_byte_table): Likewise.
8 (dis386_twobyte): Use THREE_BYTE_0 for entry 0x38. Use
9 THREE_BYTE_1 for entry 0x3a.
10 (twobyte_has_modrm): Updated.
11 (twobyte_uses_SSE_prefix): Likewise.
12 (print_insn): Handle 3-byte opcodes used by Intel Merom New
13 Instructions.
14
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152006-02-24 David S. Miller <davem@sunset.davemloft.net>
16
17 * sparc-dis.c (v9_priv_reg_names): Add "gl" entry.
18 (v9_hpriv_reg_names): New table.
19 (print_insn_sparc): Allow values up to 16 for '?' and '!'.
20 New cases '$' and '%' for read/write hyperprivileged register.
21 * sparc-opc.c (sparc_opcodes): Add new entries for UA2005
22 window handling and rdhpr/wrhpr instructions.
23
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242006-02-24 DJ Delorie <dj@redhat.com>
25
26 * m32c-desc.c: Regenerate with linker relaxation attributes.
27 * m32c-desc.h: Likewise.
28 * m32c-dis.c: Likewise.
29 * m32c-opc.c: Likewise.
30
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312006-02-24 Paul Brook <paul@codesourcery.com>
32
33 * arm-dis.c (arm_opcodes): Add V7 instructions.
34 (thumb32_opcodes): Ditto. Handle V7M MSR/MRS variants.
35 (print_arm_address): New function.
36 (print_insn_arm): Use it. Add 'P' and 'U' cases.
37 (psr_name): New function.
38 (print_insn_thumb32): Add 'U', 'C' and 'D' cases.
39
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402006-02-23 H.J. Lu <hongjiu.lu@intel.com>
41
42 * ia64-opc-i.c (bXc): New.
43 (mXc): Likewise.
44 (OpX2TaTbYaXcC): Likewise.
45 (TF). Likewise.
46 (TFCM). Likewise.
47 (ia64_opcodes_i): Add instructions for tf.
48
49 * ia64-opc.h (IMMU5b): New.
50
51 * ia64-asmtab.c: Regenerated.
52
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532006-02-23 H.J. Lu <hongjiu.lu@intel.com>
54
55 * ia64-gen.c: Update copyright years.
56 * ia64-opc-b.c: Likewise.
57
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582006-02-22 H.J. Lu <hongjiu.lu@intel.com>
59
60 * ia64-gen.c (lookup_regindex): Handle ".vm".
61 (print_dependency_table): Handle '\"'.
62
63 * ia64-ic.tbl: Updated from SDM 2.2.
64 * ia64-raw.tbl: Likewise.
65 * ia64-waw.tbl: Likewise.
66 * ia64-asmtab.c: Regenerated.
67
68 * ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.
69
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702006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
71 Anil Paranjape <anilp1@kpitcummins.com>
72 Shilin Shakti <shilins@kpitcummins.com>
73
74 * xc16x-desc.h: New file
75 * xc16x-desc.c: New file
76 * xc16x-opc.h: New file
77 * xc16x-opc.c: New file
78 * xc16x-ibld.c: New file
79 * xc16x-asm.c: New file
80 * xc16x-dis.c: New file
81 * Makefile.am: Entries for xc16x
82 * Makefile.in: Regenerate
83 * cofigure.in: Add xc16x target information.
84 * configure: Regenerate.
85 * disassemble.c: Add xc16x target information.
86
a1cfb73e
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872006-02-11 H.J. Lu <hongjiu.lu@intel.com>
88
89 * i386-dis.c (dis386_twobyte): Use "movZ" for debug register
90 moves.
91
6dd5059a
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922006-02-11 H.J. Lu <hongjiu.lu@intel.com>
93
94 * i386-dis.c ('Z'): Add a new macro.
95 (dis386_twobyte): Use "movZ" for control register moves.
96
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972006-02-10 Nick Clifton <nickc@redhat.com>
98
99 * iq2000-asm.c: Regenerate.
100
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1012006-02-07 Nathan Sidwell <nathan@codesourcery.com>
102
103 * m68k-dis.c (print_insn_m68k): Use bfd_m68k_mach_to_features.
104
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1052006-01-26 David Ung <davidu@mips.com>
106
107 * mips-opc.c: Add I33 masks to these MIPS32R2 instructions: prefx,
108 ceil.l.d, ceil.l.s, cvt.d.l, cvt.l.d, cvt.l.s, cvt.s.l, floor.l.d,
109 floor.l.s, ldxc1, lwxc1, madd.d, madd.s, msub.d, msub.s, nmadd.d,
110 nmadd.s, nmsub.d, nmsub.s, recip.d, recip.s, round.l.d, rsqrt.d,
111 rsqrt.s, sdxc1, swxc1, trunc.l.d, trunc.l.s.
112
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1132006-01-18 Arnold Metselaar <arnoldm@sourceware.org>
114
115 * z80-dis.c (struct buffer, prt_d, prt_d_n, arit_d, ld_r_d,
116 ld_d_r, pref_xd_cb): Use signed char to hold data to be
117 disassembled.
118 * z80-dis.c (TXTSIZ): Increase buffer size to 24, this fixes
119 buffer overflows when disassembling instructions like
120 ld (ix+123),0x23
121 * z80-dis.c (opc_ind, pref_xd_cb): Suppress '+' in an indexed
122 operand, if the offset is negative.
123
c9021189
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1242006-01-17 Arnold Metselaar <arnoldm@sourceware.org>
125
126 * z80-dis.c (struct buffer, prt_d, prt_d_n, pref_xd_cb): Use
127 unsigned char to hold data to be disassembled.
128
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1292006-01-17 Andreas Schwab <schwab@suse.de>
130
131 PR binutils/1486
132 * disassemble.c (disassemble_init_for_target): Set
133 disassembler_needs_relocs for bfd_arch_arm.
134
c2fe9327
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1352006-01-16 Paul Brook <paul@codesourcery.com>
136
e88d958a 137 * m68k-opc.c (m68k_opcodes): Fix opcodes for ColdFire f?abss,
c2fe9327
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138 f?add?, and f?sub? instructions.
139
32fba81d
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1402006-01-16 Nick Clifton <nickc@redhat.com>
141
142 * po/zh_CN.po: New Chinese (simplified) translation.
143 * configure.in (ALL_LINGUAS): Add "zh_CH".
144 * configure: Regenerate.
145
1b3a26b5
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1462006-01-05 Paul Brook <paul@codesourcery.com>
147
148 * m68k-opc.c (m68k_opcodes): Add missing ColdFire fdsqrtd entry.
149
db313fa6
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1502006-01-06 DJ Delorie <dj@redhat.com>
151
152 * m32c-desc.c: Regenerate.
153 * m32c-opc.c: Regenerate.
154 * m32c-opc.h: Regenerate.
155
54d46aca
DD
1562006-01-03 DJ Delorie <dj@redhat.com>
157
158 * cgen-ibld.in (extract_normal): Avoid memory range errors.
159 * m32c-ibld.c: Regenerated.
160
e88d958a 161For older changes see ChangeLog-2005
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162\f
163Local Variables:
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164mode: change-log
165left-margin: 8
166fill-column: 74
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167version-control: never
168End:
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