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2005-12-02 Dave Brolley <brolley@redhat.com>
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
3609e0fe
DB		 12005-12-02 Dave Brolley <brolley@redhat.com>
2
3 * configure.in (cgen_files): Add cgen-bitset.lo.
4 (ta): Add cgen-bitset.lo when arch==bfd_cris_arch.
5 * Makefile.am (CFILES): Add cgen-bitset.c.
6 (ALL_MACHINES): Add cgen-bitset.lo.
7 (cgen-bitset.lo): New target.
8 * cgen-opc.c (cgen_bitset_create, cgen_bitset_init, cgen_bitset_clear)
9 (cgen_bitset_add, cgen_bitset_set, cgen_bitset_contains)
10 (cgen_bitset_compare, cgen_bitset_intersect_p, cgen_bitset_copy)
11 (cgen_bitset_union): Moved from here ...
12 * cgen-bitset.c: ... to here. New file.
13 * Makefile.in: Regenerated.
14 * configure: Regenerated.
15
aa2273ba
JW		 162005-11-22 James E Wilson <wilson@specifix.com>
17
18 * ia64-gen.c (_opcode_int64_low, _opcode_int64_high,
19 opcode_fprintf_vma): New.
20 (print_main_table): New opcode_fprintf_vma instead of fprintf_vma.
21
ce7a772b
AM		 222005-11-16 Alan Modra <amodra@bigpond.net.au>
23
24 * ppc-opc.c (powerpc_opcodes): Add frin,friz,frip,frim. Correct
25 frsqrtes.
26
0499d65b
TS		 272005-11-14 David Ung <davidu@mips.com>
28
29 * mips16-opc.c: Add MIPS16e save/restore opcodes.
30 * mips-dis.c (print_mips16_insn_arg): Handle printing of 'm'/'M'
31 codes for save/restore.
32
dc82c973
AS		 332005-11-10 Andreas Schwab <schwab@suse.de>
34
35 * m68k-dis.c (print_insn_m68k): Only match FPU insns with
36 coprocessor ID 1.
37
dbb33a87
NC		 382005-11-08 H.J. Lu <hongjiu.lu@intel.com>
39
40 * m32c-desc.c: Regenerated.
41
6f84a2a6
NS		 422005-11-08 Nathan Sidwell <nathan@codesourcery.com>
43
44 Add ms2.
45 * ms1-asm.c, ms1-desc.c, ms1-desc.h, ms1-dis.c, ms1-ibld.c,
46 ms1-opc.c, ms1-opc.h: Regenerated.
47
a541e3ce
SE		 482005-11-07 Steve Ellcey <sje@cup.hp.com>
49
50 * configure: Regenerate after modifying bfd/warning.m4.
51
3e7d61b2
AM		 522005-11-07 Alan Modra <amodra@bigpond.net.au>
53
54 * i386-dis.c (ckprefix): Handle rex on fwait. Don't print
55 ignored rex prefixes here.
56 (print_insn): Instead, handle them similarly to fwait followed
57 by non-fp insns.
58
a92e0d0a
L		 592005-11-02 H.J. Lu <hongjiu.lu@intel.com>
60
61 * iq2000-desc.c: Regenerated.
62 * iq2000-desc.h: Likewise.
63 * iq2000-dis.c: Likewise.
64 * iq2000-opc.c: Likewise.
65
36b0c57d
PB		 662005-11-02 Paul Brook <paul@codesourcery.com>
67
68 * arm-dis.c (print_insn_thumb32): Word align blx target address.
69
9a2ff3f5
AM		 702005-10-31 Alan Modra <amodra@bigpond.net.au>
71
72 * arm-dis.c (print_insn): Warning fix.
73
9e5169a8
L		 742005-10-30 H.J. Lu <hongjiu.lu@intel.com>
75
76 * Makefile.am: Run "make dep-am".
77 * Makefile.in: Regenerated.
78
79 * dep-in.sed: Replace " ./" with " ".
80
fb53f5a8
DB		 812005-10-28 Dave Brolley <brolley@redhat.com>
82
83 * All CGEN-generated sources: Regenerate.
84
85 Contribute the following changes:
86 2005-09-19 Dave Brolley <brolley@redhat.com>
87
88 * disassemble.c (disassemble_init_for_target): Add 'break' to case for
89 bfd_arch_tic4x. Use cgen_bitset_create and cgen_bitset_set for
90 bfd_arch_m32c case.
91
92 2005-02-16 Dave Brolley <brolley@redhat.com>
93
94 * cgen-dis.in: Rename CGEN_ISA_MASK to CGEN_BITSET. Rename
95 cgen_isa_mask_* to cgen_bitset_*.
96 * cgen-opc.c: Likewise.
97
98 2003-11-28 Richard Sandiford <rsandifo@redhat.com>
99
100 * cgen-dis.in (print_insn_@arch@): Fix comparison with cached isas.
101 * *-dis.c: Regenerate.
102
103 2003-06-05 DJ Delorie <dj@redhat.com>
104
105 * cgen-dis.in (print_insn_@arch@): Copy prev_isas, don't assign
106 it, as it may point to a reused buffer. Set prev_isas when we
107 change cpus.
108
109 2002-12-13 Dave Brolley <brolley@redhat.com>
110
111 * cgen-opc.c (cgen_isa_mask_create): New support function for
112 CGEN_ISA_MASK.
113 (cgen_isa_mask_init): Ditto.
114 (cgen_isa_mask_clear): Ditto.
115 (cgen_isa_mask_add): Ditto.
116 (cgen_isa_mask_set): Ditto.
117 (cgen_isa_supported): Ditto.
118 (cgen_isa_mask_compare): Ditto.
119 (cgen_isa_mask_intersection): Ditto.
120 (cgen_isa_mask_copy): Ditto.
121 (cgen_isa_mask_combine): Ditto.
122 * cgen-dis.in (libiberty.h): #include it.
123 (isas): Renamed from 'isa' and now (CGEN_ISA_MASK *).
124 (print_insn_@arch@): Use CGEN_ISA_MASK and support functions.
125 * Makefile.am (CGENDEPS): Add utils-cgen.scm and attrs.scm.
126 * Makefile.in: Regenerated.
127
c6552317
DD		 1282005-10-27 DJ Delorie <dj@redhat.com>
129
130 * m32c-asm.c: Regenerate.
131 * m32c-desc.c: Regenerate.
132 * m32c-desc.h: Regenerate.
133 * m32c-dis.c: Regenerate.
134 * m32c-ibld.c: Regenerate.
135 * m32c-opc.c: Regenerate.
136 * m32c-opc.h: Regenerate.
137
f75eb1c0
DD		 1382005-10-26 DJ Delorie <dj@redhat.com>
139
140 * m32c-asm.c: Regenerate.
141 * m32c-desc.c: Regenerate.
142 * m32c-desc.h: Regenerate.
143 * m32c-dis.c: Regenerate.
144 * m32c-ibld.c: Regenerate.
145 * m32c-opc.c: Regenerate.
146 * m32c-opc.h: Regenerate.
147
f1022c90
PB		 1482005-10-26 Paul Brook <paul@codesourcery.com>
149
150 * arm-dis.c (arm_opcodes): Correct "sel" entry.
151
e277c00b
AM		 1522005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
153
154 * m32r-asm.c: Regenerate.
155
92e0a941
DD		 1562005-10-25 DJ Delorie <dj@redhat.com>
157
158 * m32c-asm.c: Regenerate.
159 * m32c-desc.c: Regenerate.
160 * m32c-desc.h: Regenerate.
161 * m32c-dis.c: Regenerate.
162 * m32c-ibld.c: Regenerate.
163 * m32c-opc.c: Regenerate.
164 * m32c-opc.h: Regenerate.
165
3c9b82ba
NC		 1662005-10-25 Arnold Metselaar <arnold.metselaar@planet.nl>
167
168 * configure.in: Add target architecture bfd_arch_z80.
169 * configure: Regenerated.
3e7d61b2 170 * disassemble.c (disassembler)<ARCH_z80>: Add case
3c9b82ba
NC		 171 bfd_arch_z80.
172 * z80-dis.c: New file.
173
3caac5b8
AM		 1742005-10-25 Alan Modra <amodra@bigpond.net.au>
175
176 * po/POTFILES.in: Regenerate.
177 * po/opcodes.pot: Regenerate.
178
6a2375c6
JB		 1792005-10-24 Jan Beulich <jbeulich@novell.com>
180
181 * ia64-asmtab.c: Regenerate.
182
a1a280bb
DD		 1832005-10-21 DJ Delorie <dj@redhat.com>
184
185 * m32c-asm.c: Regenerate.
186 * m32c-desc.c: Regenerate.
187 * m32c-desc.h: Regenerate.
188 * m32c-dis.c: Regenerate.
189 * m32c-ibld.c: Regenerate.
190 * m32c-opc.c: Regenerate.
191 * m32c-opc.h: Regenerate.
192
b7d48530
NC		 1932005-10-21 Nick Clifton <nickc@redhat.com>
194
195 * bfin-dis.c: Tidy up code, removing redundant constructs.
196
8dd744b6
MS		 1972005-10-19 Martin Schwidefsky <schwidefsky@de.ibm.com>
198
199 * s390-opc.txt: Add unnormalized hfp multiply and multiply-and-add
200 instructions.
201
e74eb924
NC		 2022005-10-18 Nick Clifton <nickc@redhat.com>
203
204 * m32r-asm.c: Regenerate after updating m32r.opc.
205
471e4e36
JZ		 2062005-10-18 Jie Zhang <jie.zhang@analog.com>
207
208 * bfin-dis.c (print_insn_bfin): Do proper endian transform when
209 reading instruction from memory.
210
5e03663f
NC		 2112005-10-18 Nick Clifton <nickc@redhat.com>
212
213 * m32r-asm.c: Regenerate after updating m32r.opc.
214
ab7c9a26
NC		 2152005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
216
217 * m32r-asm.c: Regenerate after updating m32r.opc.
218
19590ef7
RE		 2192005-10-08 James Lemke <jim@wasabisystems.com>
220
221 * arm-dis.c (coprocessor_opcodes): Fix mask for various Maverick CDP
222 operations.
223
6edfbbad
DJ		 2242005-10-06 Daniel Jacobowitz <dan@codesourcery.com>
225
226 * ppc-dis.c (struct dis_private): Remove.
227 (powerpc_dialect): Avoid aliasing warnings.
228 (print_insn_big_powerpc, print_insn_little_powerpc): Likewise.
229
095f2843
NC		 2302005-09-30 Nick Clifton <nickc@redhat.com>
231
232 * po/ga.po: New Irish translation.
233 * configure.in (ALL_LINGUAS): Add "ga".
234 * configure: Regenerate.
235
fdd3b9b3
L		 2362005-09-30 H.J. Lu <hongjiu.lu@intel.com>
237
238 * Makefile.am: Run "make dep-am".
239 * Makefile.in: Regenerated.
240 * aclocal.m4: Likewise.
241 * configure: Likewise.
242
4b7f6baa
CM		 2432005-09-30 Catherine Moore <clm@cm00re.com>
244
245 * Makefile.am: Bfin support.
246 * Makefile.in: Regenerated.
247 * aclocal.m4: Regenerated.
248 * bfin-dis.c: New file.
249 * configure.in: Bfin support.
250 * configure: Regenerated.
251 * disassemble.c (ARCH_bfin): Define.
252 (disassembler): Add case for bfd_arch_bfin.
253
1a114b12
JB		 2542005-09-28 Jan Beulich <jbeulich@novell.com>
255
256 * i386-dis.c (stack_v_mode): Renamed from branch_v_mode.
257 (indirEv): Use it.
258 (stackEv): New.
259 (Ob64, Ov64): Rename to Ob, Ov. Delete unused original definitions.
260 (dis386): Document and use new 'V' meta character. Use it for
261 single-byte push/pop opcode forms. Use stackEv for mod-r/m push/pop
262 opcode forms. Correct typo in 'pop ss'. Replace Ob64/Ov64 by Ob/Ov.
263 (putop): 'q' suffix for 'T' and 'U' meta depends on DFLAG. Mark
264 data prefix as used whenever DFLAG was examined. Handle 'V'.
265 (intel_operand_size): Use stack_v_mode.
266 (OP_E): Use stack_v_mode, but handle only the special case of
267 64-bit mode without operand size override here; fall through to
268 v_mode case otherwise.
269 (OP_REG): Special case rAX_reg ... rDI_reg only when 64-bit mode
270 and no operand size override is present.
271 (OP_J): Use get32s for obtaining the displacement also when rex64
272 is present.
273
3eb17e6b
PB		 2742005-09-08 Paul Brook <paul@codesourcery.com>
275
276 * arm-dis.c (arm_opcodes, thumb32_opcodes): Rename smi to smc.
277
61cc0267
CF		 2782005-09-06 Chao-ying Fu <fu@mips.com>
279
280 * mips-opc.c (MT32): New define.
281 (mips_builtin_opcodes): Move "bc0f", "bc0fl", "bc0t", "bc0tl" to the
282 bottom to avoid opcode collision with "mftr" and "mttr".
283 Add MT instructions.
284 * mips-dis.c (mips_arch_choices): Enable INSN_MT for mips32r2.
285 (print_insn_args): Add supports for +t, +T, !, $, *, &, g operand
286 formats.
287
b13dd07a
PB		 2882005-09-02 Paul Brook <paul@codesourcery.com>
289
290 * arm-dis.c (coprocessor_opcodes): Add null terminator.
291
8f06b2d8
PB		 2922005-09-02 Paul Brook <paul@codesourcery.com>
293
294 * arm-dis.c (coprocessor_opcodes): New.
295 (arm_opcodes, thumb32_opcodes): Remove coprocessor insns.
296 (print_insn_coprocessor): New function.
297 (print_insn_arm): Use print_insn_coprocessor. Remove coprocessor
298 format characters.
299 (print_insn_thumb32): Use print_insn_coprocessor.
300
a2dfd01f
PB		 3012005-08-30 Paul Brook <paul@codesourcery.com>
302
303 * arm-dis.c (thumb_opcodes): Disassemble sub(3) as subs.
304
3f31e633
JB		 3052005-08-26 Jan Beulich <jbeulich@novell.com>
306
307 * i386-dis.c (intel_operand_size): New, broken out from OP_E for
308 re-use.
309 (OP_E): Call intel_operand_size, move call site out of mode
310 dependent code.
311 (OP_OFF): Call intel_operand_size if suffix_always. Remove
312 ATTRIBUTE_UNUSED from parameters.
313 (OP_OFF64): Likewise.
314 (OP_ESreg): Call intel_operand_size.
315 (OP_DSreg): Likewise.
316 (OP_DIR): Use colon rather than semicolon as separator of far
317 jump/call operands.
318
fd25c5a9
CF		 3192005-08-25 Chao-ying Fu <fu@mips.com>
320
321 * mips-opc.c (WR_a, RD_a, MOD_a, DSP_VOLA, D32): New define.
322 (mips_builtin_opcodes): Add DSP instructions.
323 * mips-dis.c (mips_arch_choices): Enable INSN_DSP for mips32, mips32r2,
324 mips64, mips64r2.
325 (print_insn_args): Add supports for 3, 4, 5, 6, 7, 8, 9, 0, :, ', @
326 operand formats.
327
dd8b7c22
DU		 3282005-08-23 David Ung <davidu@mips.com>
329
330 * mips16-opc.c (mips16_opcodes): Add the MIPS16e jalrc/jrc
3e7d61b2 331 instructions to the table.
dd8b7c22 332
c17ae8a2
AM		 3332005-08-18 Alan Modra <amodra@bigpond.net.au>
334
848cf006 335 * a29k-dis.c: Delete.
c17ae8a2
AM		 336 * Makefile.am: Remove a29k support.
337 * configure.in: Likewise.
338 * disassemble.c: Likewise.
339 * Makefile.in: Regenerate.
340 * configure: Regenerate.
341 * po/POTFILES.in: Regenerate.
342
36ae0db3
DJ		 3432005-08-15 Daniel Jacobowitz <dan@codesourcery.com>
344
345 * ppc-dis.c (powerpc_dialect): Handle e300.
346 (print_ppc_disassembler_options): Likewise.
347 * ppc-opc.c (PPCE300): Define.
348 (powerpc_opcodes): Mark icbt as available for the e300.
349
63a3357b
DA		 3502005-08-13 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
351
352 * hppa-dis.c (print_insn_hppa): Don't print '%' before register names.
353 Use "rp" instead of "%r2" in "b,l" insns.
354
ad101263
MS		 3552005-08-12 Martin Schwidefsky <schwidefsky@de.ibm.com>
356
357 * s390-dis.c (print_insn_s390): Print unsigned operands with %u.
358 * s390-mkopc.c (s390_opcode_cpu_val): Add support for cpu type z9-109.
359 (main): Likewise.
360 * s390-opc.c (I32_16, U32_16, M_16): Add defines 32 bit immediates
361 and 4 bit optional masks.
362 (INSTR_RIL_RI, INSTR_RIL_RU, INSTR_RRF_M0RR, INSTR_RSE_CCRD,
363 INSTR_RSY_CCRD, INSTR_SSF_RRDRD): Add new instruction formats.
364 (MASK_RIL_RI, MASK_RIL_RU, MASK_RRF_M0RR, MASK_RSE_CCRD,
365 MASK_RSY_CCRD, MASK_SSF_RRDRD): Likewise.
366 (s390_opformats): Likewise.
367 * s390-opc.txt: Add new instructions for cpu type z9-109.
368
f1fa1093
DA		 3692005-08-05 John David Anglin <dave.anglin@nrc-crnc.gc.ca>
370
371 * hppa-dis.c (print_insn_hppa): Prefix 21-bit values with "L%".
372
e9f89963
PB		 3732005-07-29 Paul Brook <paul@codesourcery.com>
374
375 * arm-dis.c: Fix disassebly of thumb2 writeback addressing modes.
376
92e90b6e
PB		 3772005-07-29 Paul Brook <paul@codesourcery.com>
378
379 * arm-dis.c (thumb32_opc): Fix addressing mode for tbh.
380 (print_insn_thumb32): Fix decoding of thumb2 'I' operands.
381
fd54057a
DD		 3822005-07-25 DJ Delorie <dj@redhat.com>
383
384 * m32c-asm.c Regenerate.
385 * m32c-dis.c Regenerate.
386
760c0f6a
DD		 3872005-07-20 DJ Delorie <dj@redhat.com>
388
389 * disassemble.c (disassemble_init_for_target): M32C ISAs are
390 enums, so convert them to bit masks, which attributes are.
391
85da3a56
NC		 3922005-07-18 Nick Clifton <nickc@redhat.com>
393
394 * configure.in: Restore alpha ordering to list of arches.
395 * configure: Regenerate.
396 * disassemble.c: Restore alpha ordering to list of arches.
397
3982005-07-18 Nick Clifton <nickc@redhat.com>
399
400 * m32c-asm.c: Regenerate.
401 * m32c-desc.c: Regenerate.
402 * m32c-desc.h: Regenerate.
403 * m32c-dis.c: Regenerate.
404 * m32c-ibld.h: Regenerate.
405 * m32c-opc.c: Regenerate.
406 * m32c-opc.h: Regenerate.
407
22cbf2e7
L		 4082005-07-18 H.J. Lu <hongjiu.lu@intel.com>
409
410 * i386-dis.c (PNI_Fixup): Update comment.
411 (VMX_Fixup): Properly handle the suffix check.
412
0aea0460
DA		 4132005-07-16 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
414
415 * hppa-dis.c (print_insn_hppa): Add space after 'w' in wide-mode
416 mfctl disassembly.
417
0f82ff91
AM		 4182005-07-16 Alan Modra <amodra@bigpond.net.au>
419
420 * Makefile.am: Run "make dep-am".
421 (stamp-m32c): Fix cpu dependencies.
422 * Makefile.in: Regenerate.
423 * ip2k-dis.c: Regenerate.
424
90700ea2
L		 4252007-07-15 H.J. Lu <hongjiu.lu@intel.com>
426
427 * i386-dis.c (OP_VMX): New. Handle Intel VMX Instructions.
428 (VMX_Fixup): New. Fix up Intel VMX Instructions.
429 (Em): New.
430 (Gm): New.
431 (VM): New.
432 (dis386_twobyte): Updated entries 0x78 and 0x79.
433 (twobyte_has_modrm): Likewise.
434 (grps): Use OP_VMX in the "sgdtIQ" entry. Updated GRP9.
435 (OP_G): Handle m_mode.
436
49f58d10
JB		 4372005-07-14 Jim Blandy <jimb@redhat.com>
438
439 Add support for the Renesas M32C and M16C.
440 * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
441 * m32c-desc.h, m32c-opc.h: New.
442 * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
443 (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
444 m32c-opc.c.
445 (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
446 m32c-ibld.lo, m32c-opc.lo.
447 (CLEANFILES): List stamp-m32c.
448 (M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
449 (CGEN_CPUS): Add m32c.
450 (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
451 (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
452 (m32c_opc_h): New variable.
453 (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
454 (m32c-opc.lo): New rules.
455 * Makefile.in: Regenerated.
456 * configure.in: Add case for bfd_m32c_arch.
457 * configure: Regenerated.
458 * disassemble.c (ARCH_m32c): New.
459 [ARCH_m32c]: #include "m32c-desc.h".
460 (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
461 (disassemble_init_for_target) [ARCH_m32c]: Same.
462
463 * cgen-ops.h, cgen-types.h: New files.
464 * Makefile.am (HFILES): List them.
465 * Makefile.in: Regenerated.
3e7d61b2 466
0fd3a477
JW		 4672005-07-07 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
468
469 * arc-dis.c, arm-dis.c, cris-dis.c, crx-dis.c, d10v-dis.c,
470 d30v-dis.c, fr30-dis.c, h8300-dis.c, h8500-dis.c, i860-dis.c,
471 ia64-dis.c, ip2k-dis.c, m10200-dis.c, m10300-dis.c,
472 m88k-dis.c, mcore-dis.c, mips-dis.c, ms1-dis.c, or32-dis.c,
473 ppc-dis.c, sh64-dis.c, sparc-dis.c, tic4x-dis.c, tic80-dis.c,
474 v850-dis.c: Fix format bugs.
475 * ia64-gen.c (fail, warn): Add format attribute.
476 * or32-opc.c (debug): Likewise.
477
22f8fcbd
NC		 4782005-07-07 Khem Raj <kraj@mvista.com>
479
480 * arm-dis.c (opcode32 arm_opcodes): Fix ARM VFP fadds instruction
481 disassembly pattern.
482
d125c27b
AM		 4832005-07-06 Alan Modra <amodra@bigpond.net.au>
484
485 * Makefile.am (stamp-m32r): Fix path to cpu files.
486 (stamp-m32r, stamp-iq2000): Likewise.
487 * Makefile.in: Regenerate.
488 * m32r-asm.c: Regenerate.
489 * po/POTFILES.in: Remove arm-opc.h. Add ms1-asm.c, ms1-desc.c,
490 ms1-desc.h, ms1-dis.c, ms1-ibld.c, ms1-opc.c, ms1-opc.h.
491
3ec2b351
NC		 4922005-07-05 Nick Clifton <nickc@redhat.com>
493
494 * iq2000-asm.c: Regenerate.
495 * ms1-asm.c: Regenerate.
496
30123838
JB		 4972005-07-05 Jan Beulich <jbeulich@novell.com>
498
499 * i386-dis.c (SVME_Fixup): New.
500 (grps): Use it for the lidt entry.
501 (PNI_Fixup): Call OP_M rather than OP_E.
502 (INVLPG_Fixup): Likewise.
503
b0eec63e
L		 5042005-07-04 H.J. Lu <hongjiu.lu@intel.com>
505
506 * tic30-dis.c (cnvt_tmsfloat_ieee): Use HUGE_VALF if defined.
507
47b0e7ad
NC		 5082005-07-01 Nick Clifton <nickc@redhat.com>
509
510 * a29k-dis.c: Update to ISO C90 style function declarations and
511 fix formatting.
512 * alpha-opc.c: Likewise.
513 * arc-dis.c: Likewise.
514 * arc-opc.c: Likewise.
515 * avr-dis.c: Likewise.
516 * cgen-asm.in: Likewise.
517 * cgen-dis.in: Likewise.
518 * cgen-ibld.in: Likewise.
519 * cgen-opc.c: Likewise.
520 * cris-dis.c: Likewise.
521 * d10v-dis.c: Likewise.
522 * d30v-dis.c: Likewise.
523 * d30v-opc.c: Likewise.
524 * dis-buf.c: Likewise.
525 * dlx-dis.c: Likewise.
526 * h8300-dis.c: Likewise.
527 * h8500-dis.c: Likewise.
528 * hppa-dis.c: Likewise.
529 * i370-dis.c: Likewise.
530 * i370-opc.c: Likewise.
531 * m10200-dis.c: Likewise.
532 * m10300-dis.c: Likewise.
533 * m68k-dis.c: Likewise.
534 * m88k-dis.c: Likewise.
535 * mips-dis.c: Likewise.
536 * mmix-dis.c: Likewise.
537 * msp430-dis.c: Likewise.
538 * ns32k-dis.c: Likewise.
539 * or32-dis.c: Likewise.
540 * or32-opc.c: Likewise.
541 * pdp11-dis.c: Likewise.
542 * pj-dis.c: Likewise.
543 * s390-dis.c: Likewise.
544 * sh-dis.c: Likewise.
545 * sh64-dis.c: Likewise.
546 * sparc-dis.c: Likewise.
547 * sparc-opc.c: Likewise.
548 * sysdep.h: Likewise.
549 * tic30-dis.c: Likewise.
550 * tic4x-dis.c: Likewise.
551 * tic80-dis.c: Likewise.
552 * v850-dis.c: Likewise.
553 * v850-opc.c: Likewise.
554 * vax-dis.c: Likewise.
555 * w65-dis.c: Likewise.
556 * z8kgen.c: Likewise.
3e7d61b2 557
47b0e7ad
NC		 558 * fr30-*: Regenerate.
559 * frv-*: Regenerate.
560 * ip2k-*: Regenerate.
561 * iq2000-*: Regenerate.
562 * m32r-*: Regenerate.
563 * ms1-*: Regenerate.
564 * openrisc-*: Regenerate.
565 * xstormy16-*: Regenerate.
566
cc16ba8c
BE		 5672005-06-23 Ben Elliston <bje@gnu.org>
568
569 * m68k-dis.c: Use ISC C90.
570 * m68k-opc.c: Formatting fixes.
571
4b185e97
DU		 5722005-06-16 David Ung <davidu@mips.com>
573
3e7d61b2
AM		 574 * mips16-opc.c (mips16_opcodes): Add the following MIPS16e
575 instructions to the table; seb/seh/sew/zeb/zeh/zew.
4b185e97 576
ac188222
DB		 5772005-06-15 Dave Brolley <brolley@redhat.com>
578
579 Contribute Morpho ms1 on behalf of Red Hat
3e7d61b2 580 * ms1-asm.c, ms1-desc.c, ms1-dis.c, ms1-ibld.c, ms1-opc.c,
ac188222
DB		 581 ms1-opc.h: New files, Morpho ms1 target.
582
583 2004-05-14 Stan Cox <scox@redhat.com>
584
585 * disassemble.c (ARCH_ms1): Define.
586 (disassembler): Handle bfd_arch_ms1
587
588 2004-05-13 Michael Snyder <msnyder@redhat.com>
589
590 * Makefile.am, Makefile.in: Add ms1 target.
591 * configure.in: Ditto.
592
6b5d3a4d
ZW		 5932005-06-08 Zack Weinberg <zack@codesourcery.com>
594
595 * arm-opc.h: Delete; fold contents into ...
596 * arm-dis.c: ... here. Move includes of internal COFF headers
597 next to includes of internal ELF headers.
598 (streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
599 (struct arm_opcode): Rename struct opcode32. Make 'assembler' const.
600 (struct thumb_opcode): Rename struct opcode16. Make 'assembler' const.
601 (arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
602 (iwmmxt_wwnames, iwmmxt_wwssnames):
603 Make const.
604 (regnames): Remove iWMMXt coprocessor register sets.
605 (iwmmxt_regnames, iwmmxt_cregnames): New statics.
606 (get_arm_regnames): Adjust fourth argument to match above changes.
607 (set_iwmmxt_regnames): Delete.
608 (print_insn_arm): Constify 'c'. Use ISO syntax for function
609 pointer calls. Expand sole use of BDISP. Use iwmmxt_regnames
610 and iwmmxt_cregnames, not set_iwmmxt_regnames.
611 (print_insn_thumb16, print_insn_thumb32): Constify 'c'. Use
612 ISO syntax for function pointer calls.
613
4a5329c6
ZW		 6142005-06-07 Zack Weinberg <zack@codesourcery.com>
615
616 * arm-dis.c: Split up the comments describing the format codes, so
617 that the ARM and 16-bit Thumb opcode tables each have comments
618 preceding them that describe all the codes, and only the codes,
619 valid in those tables. (32-bit Thumb table is already like this.)
620 Reorder the lists in all three comments to match the order in
621 which the codes are implemented.
622 Remove all forward declarations of static functions. Convert all
623 function definitions to ISO C format.
624 (print_insn_arm, print_insn_thumb16, print_insn_thumb32):
625 Return nothing.
626 (print_insn_thumb16): Remove unused case 'I'.
627 (print_insn): Update for changed calling convention of subroutines.
628
3d456fa1
JB		 6292005-05-25 Jan Beulich <jbeulich@novell.com>
630
631 * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
632 hex (but retain it being displayed as signed). Remove redundant
633 checks. Add handling of displacements for 16-bit addressing in Intel
634 mode.
635
2888cb7a
JB		 6362005-05-25 Jan Beulich <jbeulich@novell.com>
637
638 * i386-dis.c (prefix_name): Remove pointless mode_64bit check.
639 (OP_E): Remove redundant REX_EXTZ handling. Remove pointless
640 masking of 'rm' in 16-bit memory address handling.
641
1ed8e1e4
AM		 6422005-05-19 Anton Blanchard <anton@samba.org>
643
644 * ppc-dis.c (powerpc_dialect): Handle "-Mpower5".
645 (print_ppc_disassembler_options): Document it.
646 * ppc-opc.c (SVC_LEV): Define.
647 (LEV): Allow optional operand.
648 (POWER5): Define.
649 (powerpc_opcodes): Extend "sc". Adjust "svc" and "svcl". Add
650 "hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
651
49cc2e69
KC		 6522005-05-19 Kelley Cook <kcook@gcc.gnu.org>
653
654 * Makefile.in: Regenerate.
655
c19d1205
ZW		 6562005-05-17 Zack Weinberg <zack@codesourcery.com>
657
658 * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
659 instructions. Adjust disassembly of some opcodes to match
660 unified syntax.
661 (thumb32_opcodes): New table.
662 (print_insn_thumb): Rename print_insn_thumb16; don't handle
663 two-halfword branches here.
664 (print_insn_thumb32): New function.
665 (print_insn): Choose among print_insn_arm, print_insn_thumb16,
666 and print_insn_thumb32. Be consistent about order of
667 halfwords when printing 32-bit instructions.
668
003519a7
L		 6692005-05-07 H.J. Lu <hongjiu.lu@intel.com>
670
671 PR 843
672 * i386-dis.c (branch_v_mode): New.
673 (indirEv): Use branch_v_mode instead of v_mode.
674 (OP_E): Handle branch_v_mode.
675
920a34a7
L		 6762005-05-07 H.J. Lu <hongjiu.lu@intel.com>
677
678 * d10v-dis.c (dis_2_short): Support 64bit host.
679
5de773c1
NC		 6802005-05-07 Nick Clifton <nickc@redhat.com>
681
682 * po/nl.po: Updated translation.
683
f4321104
NC		 6842005-05-07 Nick Clifton <nickc@redhat.com>
685
686 * Update the address and phone number of the FSF organization in
687 the GPL notices in the following files:
688 a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
689 arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
690 avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
691 cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
692 crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
693 d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
694 fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
695 fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
696 frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
697 h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
698 i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
699 ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
700 ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
701 ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
702 ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
703 iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
704 iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
705 m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
706 m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
707 m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
708 maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
709 mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
710 openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
711 openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
712 or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
713 pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
714 s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
715 sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
716 tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
717 v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
718 xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
719 xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
720 xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
721
10b076a2
JW		 7222005-05-05 James E Wilson <wilson@specifixinc.com>
723
724 * ia64-opc.c: Include sysdep.h before libiberty.h.
725
022716b6
NC		 7262005-05-05 Nick Clifton <nickc@redhat.com>
727
728 * configure.in (ALL_LINGUAS): Add vi.
729 * configure: Regenerate.
730 * po/vi.po: New.
731
db5152b4
JG		 7322005-04-26 Jerome Guitton <guitton@gnat.com>
733
734 * configure.in: Fix the check for basename declaration.
735 * configure: Regenerate.
736
eed0d89a
AM		 7372005-04-19 Alan Modra <amodra@bigpond.net.au>
738
739 * ppc-opc.c (RTO): Define.
740 (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
741 entries to suit PPC440.
742
791fe849
MK		 7432005-04-18 Mark Kettenis <kettenis@gnu.org>
744
745 * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
746 Add xcrypt-ctr.
747
ffe58f7c
NC		 7482005-04-14 Nick Clifton <nickc@redhat.com>
749
750 * po/fi.po: New translation: Finnish.
751 * configure.in (ALL_LINGUAS): Add fi.
752 * configure: Regenerate.
753
9e9b66a9
AM		 7542005-04-14 Alan Modra <amodra@bigpond.net.au>
755
756 * Makefile.am (NO_WERROR): Define.
757 * configure.in: Invoke AM_BINUTILS_WARNINGS.
758 * Makefile.in: Regenerate.
759 * aclocal.m4: Regenerate.
760 * configure: Regenerate.
761
9494d739
NC		 7622005-04-04 Nick Clifton <nickc@redhat.com>
763
764 * fr30-asm.c: Regenerate.
765 * frv-asm.c: Regenerate.
766 * iq2000-asm.c: Regenerate.
767 * m32r-asm.c: Regenerate.
768 * openrisc-asm.c: Regenerate.
769
6128c599
JB		 7702005-04-01 Jan Beulich <jbeulich@novell.com>
771
772 * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
773 visible operands in Intel mode. The first operand of monitor is
774 %rax in 64-bit mode.
775
373ff435
JB		 7762005-04-01 Jan Beulich <jbeulich@novell.com>
777
778 * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
779 easier future additions.
780
4bd60896
JG		 7812005-03-31 Jerome Guitton <guitton@gnat.com>
782
783 * configure.in: Check for basename.
784 * configure: Regenerate.
785 * config.in: Ditto.
786
4cc91dba
L		 7872005-03-29 H.J. Lu <hongjiu.lu@intel.com>
788
789 * i386-dis.c (SEG_Fixup): New.
790 (Sv): New.
791 (dis386): Use "Sv" for 0x8c and 0x8e.
792
ec72cfe5
NC		 7932005-03-21 Jan-Benedict Glaw <jbglaw@lug-owl.de>
794 Nick Clifton <nickc@redhat.com>
c19d1205 795
ec72cfe5
NC		 796 * vax-dis.c: (entry_addr): New varible: An array of user supplied
797 function entry mask addresses.
798 (entry_addr_occupied_slots): New variable: The number of occupied
c19d1205 799 elements in entry_addr.
ec72cfe5
NC		 800 (entry_addr_total_slots): New variable: The total number of
801 elements in entry_addr.
802 (parse_disassembler_options): New function. Fills in the entry_addr
803 array.
804 (free_entry_array): New function. Release the memory used by the
805 entry addr array. Suppressed because there is no way to call it.
806 (is_function_entry): Check if a given address is a function's
807 start address by looking at supplied entry mask addresses and
808 symbol information, if available.
809 (print_insn_vax): Use parse_disassembler_options and is_function_entry.
810
85064c79
L		 8112005-03-23 H.J. Lu <hongjiu.lu@intel.com>
812
813 * cris-dis.c (print_with_operands): Use ~31L for long instead
814 of ~31.
815
de7141c7
L		 8162005-03-20 H.J. Lu <hongjiu.lu@intel.com>
817
818 * mmix-opc.c (O): Revert the last change.
819 (Z): Likewise.
820
e493ab45
L		 8212005-03-19 H.J. Lu <hongjiu.lu@intel.com>
822
823 * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
824 (Z): Likewise.
825
d8d7c459
HPN		 8262005-03-19 Hans-Peter Nilsson <hp@bitrange.com>
827
828 * mmix-opc.c (O, Z): Force expression as unsigned long.
829
ebdb0383
NC		 8302005-03-18 Nick Clifton <nickc@redhat.com>
831
832 * ip2k-asm.c: Regenerate.
833 * op/opcodes.pot: Regenerate.
834
1ad12f97
NC		 8352005-03-16 Nick Clifton <nickc@redhat.com>
836 Ben Elliston <bje@au.ibm.com>
837
569acd2c 838 * configure.in (werror): New switch: Add -Werror to the
1ad12f97 839 compiler command line. Enabled by default. Disable via
569acd2c 840 --disable-werror.
1ad12f97
NC		 841 * configure: Regenerate.
842
4eb30afc
AM		 8432005-03-16 Alan Modra <amodra@bigpond.net.au>
844
845 * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
846 BOOKE.
847
ea8409f7
AM		 8482005-03-15 Alan Modra <amodra@bigpond.net.au>
849
729ae8d2
AM		 850 * po/es.po: Commit new Spanish translation.
851
ea8409f7
AM		 852 * po/fr.po: Commit new French translation.
853
4f495e61
NC		 8542005-03-14 Jan-Benedict Glaw <jbglaw@lug-owl.de>
855
856 * vax-dis.c: Fix spelling error
857 (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
858 of just "Entry mask: < r1 ... >"
859
0a003adc
ZW		 8602005-03-12 Zack Weinberg <zack@codesourcery.com>
861
862 * arm-dis.c (arm_opcodes): Document %E and %V.
863 Add entries for v6T2 ARM instructions:
864 bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
865 (print_insn_arm): Add support for %E and %V.
885fc257 866 (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
0a003adc 867
da99ee72
AM		 8682005-03-10 Jeff Baker <jbaker@qnx.com>
869 Alan Modra <amodra@bigpond.net.au>
870
871 * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
872 (powerpc_operands <SPRG>): Call the above. Bit field is 5 bits.
873 (SPRG_MASK): Delete.
874 (XSPRG_MASK): Mask off extra bits now part of sprg field.
0a003adc 875 (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask. Move
da99ee72
AM		 876 mfsprg4..7 after msprg and consolidate.
877
220abb21
AM		 8782005-03-09 Jan-Benedict Glaw <jbglaw@lug-owl.de>
879
880 * vax-dis.c (entry_mask_bit): New array.
881 (print_insn_vax): Decode function entry mask.
882
0e06657a
AH		 8832005-03-07 Aldy Hernandez <aldyh@redhat.com>
884
885 * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
886
06647dfd
AM		 8872005-03-05 Alan Modra <amodra@bigpond.net.au>
888
889 * po/opcodes.pot: Regenerate.
890
82b829a7
RR		 8912005-03-03 Ramana Radhakrishnan <ramana.radhakrishnan@codito.com>
892
220abb21 893 * arc-dis.c (a4_decoding_class): New enum.
06647dfd
AM		 894 (dsmOneArcInst): Use the enum values for the decoding class.
895 Remove redundant case in the switch for decodingClass value 11.
82b829a7 896
c4a530c5
JB		 8972005-03-02 Jan Beulich <jbeulich@novell.com>
898
899 * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
900 accesses.
901 (OP_C): Consider lock prefix in non-64-bit modes.
902
47d8304e
AM		 9032005-02-24 Alan Modra <amodra@bigpond.net.au>
904
905 * cris-dis.c (format_hex): Remove ineffective warning fix.
906 * crx-dis.c (make_instruction): Warning fix.
907 * frv-asm.c: Regenerate.
908
ec36c4a4
NC		 9092005-02-23 Nick Clifton <nickc@redhat.com>
910
33b71eeb
NC		 911 * cgen-dis.in: Use bfd_byte for buffers that are passed to
912 read_memory.
06647dfd 913
33b71eeb 914 * ia64-opc.c (locate_opcode_ent): Initialise opval array.
06647dfd 915
ec36c4a4
NC		 916 * crx-dis.c (make_instruction): Move argument structure into inner
917 scope and ensure that all of its fields are initialised before
918 they are used.
919
33b71eeb
NC		 920 * fr30-asm.c: Regenerate.
921 * fr30-dis.c: Regenerate.
922 * frv-asm.c: Regenerate.
923 * frv-dis.c: Regenerate.
924 * ip2k-asm.c: Regenerate.
925 * ip2k-dis.c: Regenerate.
926 * iq2000-asm.c: Regenerate.
927 * iq2000-dis.c: Regenerate.
928 * m32r-asm.c: Regenerate.
929 * m32r-dis.c: Regenerate.
930 * openrisc-asm.c: Regenerate.
931 * openrisc-dis.c: Regenerate.
932 * xstormy16-asm.c: Regenerate.
933 * xstormy16-dis.c: Regenerate.
934
53c9ebc5
AM		 9352005-02-22 Alan Modra <amodra@bigpond.net.au>
936
937 * arc-ext.c: Warning fixes.
938 * arc-ext.h: Likewise.
939 * cgen-opc.c: Likewise.
940 * ia64-gen.c: Likewise.
941 * maxq-dis.c: Likewise.
942 * ns32k-dis.c: Likewise.
943 * w65-dis.c: Likewise.
944 * ia64-asmtab.c: Regenerate.
945
610ad19b
AM		 9462005-02-22 Alan Modra <amodra@bigpond.net.au>
947
948 * fr30-desc.c: Regenerate.
949 * fr30-desc.h: Regenerate.
950 * fr30-opc.c: Regenerate.
951 * fr30-opc.h: Regenerate.
952 * frv-desc.c: Regenerate.
953 * frv-desc.h: Regenerate.
954 * frv-opc.c: Regenerate.
955 * frv-opc.h: Regenerate.
956 * ip2k-desc.c: Regenerate.
957 * ip2k-desc.h: Regenerate.
958 * ip2k-opc.c: Regenerate.
959 * ip2k-opc.h: Regenerate.
960 * iq2000-desc.c: Regenerate.
961 * iq2000-desc.h: Regenerate.
962 * iq2000-opc.c: Regenerate.
963 * iq2000-opc.h: Regenerate.
964 * m32r-desc.c: Regenerate.
965 * m32r-desc.h: Regenerate.
966 * m32r-opc.c: Regenerate.
967 * m32r-opc.h: Regenerate.
968 * m32r-opinst.c: Regenerate.
969 * openrisc-desc.c: Regenerate.
970 * openrisc-desc.h: Regenerate.
971 * openrisc-opc.c: Regenerate.
972 * openrisc-opc.h: Regenerate.
973 * xstormy16-desc.c: Regenerate.
974 * xstormy16-desc.h: Regenerate.
975 * xstormy16-opc.c: Regenerate.
976 * xstormy16-opc.h: Regenerate.
977
db9db6f2
AM		 9782005-02-21 Alan Modra <amodra@bigpond.net.au>
979
980 * Makefile.am: Run "make dep-am"
981 * Makefile.in: Regenerate.
982
bf143b25
NC		 9832005-02-15 Nick Clifton <nickc@redhat.com>
984
985 * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
986 compile time warnings.
987 (print_keyword): Likewise.
988 (default_print_insn): Likewise.
989
990 * fr30-desc.c: Regenerated.
991 * fr30-desc.h: Regenerated.
992 * fr30-dis.c: Regenerated.
993 * fr30-opc.c: Regenerated.
994 * fr30-opc.h: Regenerated.
995 * frv-desc.c: Regenerated.
996 * frv-dis.c: Regenerated.
997 * frv-opc.c: Regenerated.
998 * ip2k-asm.c: Regenerated.
999 * ip2k-desc.c: Regenerated.
1000 * ip2k-desc.h: Regenerated.
1001 * ip2k-dis.c: Regenerated.
1002 * ip2k-opc.c: Regenerated.
1003 * ip2k-opc.h: Regenerated.
1004 * iq2000-desc.c: Regenerated.
1005 * iq2000-dis.c: Regenerated.
1006 * iq2000-opc.c: Regenerated.
1007 * m32r-asm.c: Regenerated.
1008 * m32r-desc.c: Regenerated.
1009 * m32r-desc.h: Regenerated.
1010 * m32r-dis.c: Regenerated.
1011 * m32r-opc.c: Regenerated.
1012 * m32r-opc.h: Regenerated.
1013 * m32r-opinst.c: Regenerated.
1014 * openrisc-desc.c: Regenerated.
1015 * openrisc-desc.h: Regenerated.
1016 * openrisc-dis.c: Regenerated.
1017 * openrisc-opc.c: Regenerated.
1018 * openrisc-opc.h: Regenerated.
1019 * xstormy16-desc.c: Regenerated.
1020 * xstormy16-desc.h: Regenerated.
1021 * xstormy16-dis.c: Regenerated.
1022 * xstormy16-opc.c: Regenerated.
1023 * xstormy16-opc.h: Regenerated.
1024
d6098898
L		 10252005-02-14 H.J. Lu <hongjiu.lu@intel.com>
1026
1027 * dis-buf.c (perror_memory): Use sprintf_vma to print out
1028 address.
1029
5a84f3e0
NC		 10302005-02-11 Nick Clifton <nickc@redhat.com>
1031
bc18c937
NC		 1032 * iq2000-asm.c: Regenerate.
1033
5a84f3e0
NC		 1034 * frv-dis.c: Regenerate.
1035
0a40490e
JB		 10362005-02-07 Jim Blandy <jimb@redhat.com>
1037
1038 * Makefile.am (CGEN): Load guile.scm before calling the main
1039 application script.
1040 * Makefile.in: Regenerated.
1041 * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
1042 Simply pass the cgen-opc.scm path to ${cgen} as its first
1043 argument; ${cgen} itself now contains the '-s', or whatever is
1044 appropriate for the Scheme being used.
1045
c46f8c51
AC		 10462005-01-31 Andrew Cagney <cagney@gnu.org>
1047
1048 * configure: Regenerate to track ../gettext.m4.
1049
60b9a617
JB		 10502005-01-31 Jan Beulich <jbeulich@novell.com>
1051
1052 * ia64-gen.c (NELEMS): Define.
1053 (shrink): Generate alias with missing second predicate register when
1054 opcode has two outputs and these are both predicates.
1055 * ia64-opc-i.c (FULL17): Define.
1056 (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
1057 here to generate output template.
1058 (TBITCM, TNATCM): Undefine after use.
1059 * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
1060 first input. Add ld16 aliases without ar.csd as second output. Add
1061 st16 aliases without ar.csd as second input. Add cmpxchg aliases
1062 without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
1063 ar.ccv as third/fourth inputs. Consolidate through...
1064 (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
1065 CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
1066 * ia64-asmtab.c: Regenerate.
1067
a53bf506
AC		 10682005-01-27 Andrew Cagney <cagney@gnu.org>
1069
1070 * configure: Regenerate to track ../gettext.m4 change.
1071
90219bd0
AO		 10722005-01-25 Alexandre Oliva <aoliva@redhat.com>
1073
1074 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
1075 * frv-asm.c: Rebuilt.
1076 * frv-desc.c: Rebuilt.
1077 * frv-desc.h: Rebuilt.
1078 * frv-dis.c: Rebuilt.
1079 * frv-ibld.c: Rebuilt.
1080 * frv-opc.c: Rebuilt.
1081 * frv-opc.h: Rebuilt.
1082
45181ed1
AC		 10832005-01-24 Andrew Cagney <cagney@gnu.org>
1084
1085 * configure: Regenerate, ../gettext.m4 was updated.
1086
9e836e3d
FF		 10872005-01-21 Fred Fish <fnf@specifixinc.com>
1088
1089 * mips-opc.c: Change INSN_ALIAS to INSN2_ALIAS.
1090 Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
1091 Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
1092 * mips-dis.c: Ditto.
1093
5e8cb021
AM		 10942005-01-20 Alan Modra <amodra@bigpond.net.au>
1095
1096 * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
1097
986e18a5
FF		 10982005-01-19 Fred Fish <fnf@specifixinc.com>
1099
1100 * mips-dis.c (no_aliases): New disassembly option flag.
1101 (set_default_mips_dis_options): Init no_aliases to zero.
1102 (parse_mips_dis_option): Handle no-aliases option.
1103 (print_insn_mips): Ignore table entries that are aliases
1104 if no_aliases is set.
1105 (print_insn_mips16): Ditto.
1106 * mips-opc.c (mips_builtin_opcodes): Add initializer column for
1107 new pinfo2 member and add INSN_ALIAS initializers as needed. Also
1108 move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
1109 * mips16-opc.c (mips16_opcodes): Ditto.
1110
e38bc3b5
NC		 11112005-01-17 Andrew Stubbs <andrew.stubbs@st.com>
1112
1113 * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
1114 (inheritance diagram): Add missing edge.
1115 (arch_sh1_up): Rename arch_sh_up to match external name to make life
1116 easier for the testsuite.
1117 (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
1118 (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
610ad19b 1119 (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
e38bc3b5
NC		 1120 arch_sh2a_or_sh4_up child.
1121 (sh_table): Do renaming as above.
1122 Correct comment for ldc.l for gas testsuite to read.
1123 Remove rogue mul.l from sh1 (duplicate of the one for sh2).
1124 Correct comments for movy.w and movy.l for gas testsuite to read.
1125 Correct comments for fmov.d and fmov.s for gas testsuite to read.
1126
9df48ba9
L		 11272005-01-12 H.J. Lu <hongjiu.lu@intel.com>
1128
1129 * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
1130
2033b4b9
L		 11312005-01-12 H.J. Lu <hongjiu.lu@intel.com>
1132
1133 * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
1134
0bcb06d2
AS		 11352005-01-10 Andreas Schwab <schwab@suse.de>
1136
1137 * disassemble.c (disassemble_init_for_target) <case
1138 bfd_arch_ia64>: Set skip_zeroes to 16.
1139 <case bfd_arch_tic4x>: Set skip_zeroes to 32.
1140
47add74d
TL		 11412004-12-23 Tomer Levi <Tomer.Levi@nsc.com>
1142
1143 * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
1144
246f4c05
SS		 11452004-12-14 Svein E. Seldal <Svein.Seldal@solidas.com>
1146
1147 * avr-dis.c: Prettyprint. Added printing of symbol names in all
1148 memory references. Convert avr_operand() to C90 formatting.
1149
0e1200e5
TL		 11502004-12-05 Tomer Levi <Tomer.Levi@nsc.com>
1151
1152 * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
1153
89a649f7
TL		 11542004-11-29 Tomer Levi <Tomer.Levi@nsc.com>
1155
1156 * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
1157 (no_op_insn): Initialize array with instructions that have no
1158 operands.
1159 * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
1160
6255809c
RE		 11612004-11-29 Richard Earnshaw <rearnsha@arm.com>
1162
1163 * arm-dis.c: Correct top-level comment.
1164
2fbad815
RE		 11652004-11-27 Richard Earnshaw <rearnsha@arm.com>
1166
1167 * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
1168 architecuture defining the insn.
1169 (arm_opcodes, thumb_opcodes): Delete. Move to ...
6b8725b9
RE		 1170 * arm-dis.c (arm_opcodes, thumb_opcodes): Here. Add architecutre
1171 field.
2fbad815
RE		 1172 Also include opcode/arm.h.
1173 * Makefile.am (arm-dis.lo): Update dependency list.
1174 * Makefile.in: Regenerate.
1175
d81acc42
NC		 11762004-11-22 Ravi Ramaseshan <ravi.ramaseshan@codito.com>
1177
1178 * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
1179 reflect the change to the short immediate syntax.
1180
ca4f2377
AM		 11812004-11-19 Alan Modra <amodra@bigpond.net.au>
1182
5da8bf1b
AM		 1183 * or32-opc.c (debug): Warning fix.
1184 * po/POTFILES.in: Regenerate.
1185
ca4f2377
AM		 1186 * maxq-dis.c: Formatting.
1187 (print_insn): Warning fix.
1188
b7693d02
DJ		 11892004-11-17 Daniel Jacobowitz <dan@codesourcery.com>
1190
1191 * arm-dis.c (WORD_ADDRESS): Define.
1192 (print_insn): Use it. Correct big-endian end-of-section handling.
1193
300dac7e
NC		 11942004-11-08 Inderpreet Singh <inderpreetb@nioda.hcltech.com>
1195 Vineet Sharma <vineets@noida.hcltech.com>
1196
1197 * maxq-dis.c: New file.
1198 * disassemble.c (ARCH_maxq): Define.
610ad19b 1199 (disassembler): Add 'print_insn_maxq_little' for handling maxq
300dac7e
NC		 1200 instructions..
1201 * configure.in: Add case for bfd_maxq_arch.
1202 * configure: Regenerate.
1203 * Makefile.am: Add support for maxq-dis.c
1204 * Makefile.in: Regenerate.
1205 * aclocal.m4: Regenerate.
1206
42048ee7
TL		 12072004-11-05 Tomer Levi <Tomer.Levi@nsc.com>
1208
1209 * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
1210 mode.
1211 * crx-dis.c: Likewise.
1212
bd21e58e
HPN		 12132004-11-04 Hans-Peter Nilsson <hp@axis.com>
1214
1215 Generally, handle CRISv32.
1216 * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
1217 (struct cris_disasm_data): New type.
1218 (format_reg, format_hex, cris_constraint, print_flags)
1219 (get_opcode_entry): Add struct cris_disasm_data * parameter. All
1220 callers changed.
1221 (format_sup_reg, print_insn_crisv32_with_register_prefix)
1222 (print_insn_crisv32_without_register_prefix)
1223 (print_insn_crisv10_v32_with_register_prefix)
1224 (print_insn_crisv10_v32_without_register_prefix)
1225 (cris_parse_disassembler_options): New functions.
1226 (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
1227 parameter. All callers changed.
1228 (get_opcode_entry): Call malloc, not xmalloc. Return NULL on
1229 failure.
1230 (cris_constraint) <case 'Y', 'U'>: New cases.
1231 (bytes_to_skip): Handle 'Y' and 'N' as 's'. Skip size is 4 bytes
1232 for constraint 'n'.
1233 (print_with_operands) <case 'Y'>: New case.
1234 (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
1235 <case 'N', 'Y', 'Q'>: New cases.
1236 (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
1237 (print_insn_cris_with_register_prefix)
1238 (print_insn_cris_without_register_prefix): Call
1239 cris_parse_disassembler_options.
1240 * cris-opc.c (cris_spec_regs): Mention that this table isn't used
1241 for CRISv32 and the size of immediate operands. New v32-only
1242 entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
1243 spc. Add v32-only 4-byte entries for p2, p3, p5 and p6. Change
1244 ccr, ibr, irp to be v0..v10. Change bar, dccr to be v8..v10.
1245 Change brp to be v3..v10.
1246 (cris_support_regs): New vector.
1247 (cris_opcodes): Update head comment. New format characters '[',
1248 ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
1249 Add new opcodes for v32 and adjust existing opcodes to accommodate
1250 differences to earlier variants.
1251 (cris_cond15s): New vector.
1252
9306ca4a
JB		 12532004-11-04 Jan Beulich <jbeulich@novell.com>
1254
1255 * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
1256 (indirEb): Remove.
1257 (Mp): Use f_mode rather than none at all.
1258 (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
1259 replaces what previously was x_mode; x_mode now means 128-bit SSE
1260 operands.
1261 (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
1262 mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
1263 pinsrw's second operand is Edqw.
1264 (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
1265 operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
1266 fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
1267 mode when an operand size override is present or always suffixing.
1268 More instructions will need to be added to this group.
1269 (putop): Handle new macro chars 'C' (short/long suffix selector),
1270 'I' (Intel mode override for following macro char), and 'J' (for
1271 adding the 'l' prefix to far branches in AT&T mode). When an
1272 alternative was specified in the template, honor macro character when
1273 specified for Intel mode.
1274 (OP_E): Handle new *_mode values. Correct pointer specifications for
1275 memory operands. Consolidate output of index register.
1276 (OP_G): Handle new *_mode values.
1277 (OP_I): Handle const_1_mode.
1278 (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
1279 respective opcode prefix bits have been consumed.
1280 (OP_EM, OP_EX): Provide some default handling for generating pointer
1281 specifications.
1282
f39c96a9
TL		 12832004-10-28 Tomer Levi <Tomer.Levi@nsc.com>
1284
1285 * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
1286 COP_INST macro.
1287
812337be
TL		 12882004-10-27 Tomer Levi <Tomer.Levi@nsc.com>
1289
1290 * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
1291 (getregliststring): Support HI/LO and user registers.
610ad19b 1292 * crx-opc.c (crx_instruction): Update data structure according to the
812337be
TL		 1293 rearrangement done in CRX opcode header file.
1294 (crx_regtab): Likewise.
1295 (crx_optab): Likewise.
610ad19b 1296 (crx_instruction): Reorder load/stor instructions, remove unsupported
812337be
TL		 1297 formats.
1298 support new Co-Processor instruction 'cpi'.
1299
4030fa5a
NC		 13002004-10-27 Nick Clifton <nickc@redhat.com>
1301
1302 * opcodes/iq2000-asm.c: Regenerate.
1303 * opcodes/iq2000-desc.c: Regenerate.
1304 * opcodes/iq2000-desc.h: Regenerate.
1305 * opcodes/iq2000-dis.c: Regenerate.
1306 * opcodes/iq2000-ibld.c: Regenerate.
1307 * opcodes/iq2000-opc.c: Regenerate.
1308 * opcodes/iq2000-opc.h: Regenerate.
1309
fc3d45e8
TL		 13102004-10-21 Tomer Levi <Tomer.Levi@nsc.com>
1311
1312 * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
1313 us4, us5 (respectively).
1314 Remove unsupported 'popa' instruction.
1315 Reverse operands order in store co-processor instructions.
1316
3c55da70
AM		 13172004-10-15 Alan Modra <amodra@bigpond.net.au>
1318
1319 * Makefile.am: Run "make dep-am"
1320 * Makefile.in: Regenerate.
1321
7fa3d080
BW		 13222004-10-12 Bob Wilson <bob.wilson@acm.org>
1323
1324 * xtensa-dis.c: Use ISO C90 formatting.
1325
e612bb4d
AM		 13262004-10-09 Alan Modra <amodra@bigpond.net.au>
1327
1328 * ppc-opc.c: Revert 2004-09-09 change.
1329
43cd72b9
BW		 13302004-10-07 Bob Wilson <bob.wilson@acm.org>
1331
1332 * xtensa-dis.c (state_names): Delete.
1333 (fetch_data): Use xtensa_isa_maxlength.
1334 (print_xtensa_operand): Replace operand parameter with opcode/operand
1335 pair. Remove print_sr_name parameter. Use new xtensa-isa.h functions.
1336 (print_insn_xtensa): Use new xtensa-isa.h functions. Handle multislot
1337 instruction bundles. Use xmalloc instead of malloc.
1338
bbac1f2a
NC		 13392004-10-07 David Gibson <david@gibson.dropbear.id.au>
1340
1341 * ppc-opc.c: Replace literal "0"s with NULLs in pointer
1342 initializers.
1343
48c9f030
NC		 13442004-10-07 Tomer Levi <Tomer.Levi@nsc.com>
1345
1346 * crx-opc.c (crx_instruction): Support Co-processor insns.
1347 * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
1348 (getregliststring): Change function to use the above enum.
1349 (print_arg): Handle CO-Processor insns.
1350 (crx_cinvs): Add 'b' option to invalidate the branch-target
1351 cache.
1352
12c64a4e
AH		 13532004-10-06 Aldy Hernandez <aldyh@redhat.com>
1354
1355 * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
1356 efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
1357 efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
1358 efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
1359 efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
1360
14127cc4
NC		 13612004-10-01 Bill Farmer <Bill@the-farmers.freeserve.co.uk>
1362
1363 * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
1364 rather than add it.
1365
0dd132b6
NC		 13662004-09-30 Paul Brook <paul@codesourcery.com>
1367
1368 * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
1369 * arm-opc.h: Document %e. Add ARMv6ZK instructions.
1370
3f85e526
L		 13712004-09-17 H.J. Lu <hongjiu.lu@intel.com>
1372
1373 * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
1374 (CONFIG_STATUS_DEPENDENCIES): New.
1375 (Makefile): Removed.
1376 (config.status): Likewise.
1377 * Makefile.in: Regenerated.
1378
8ae85421
AM		 13792004-09-17 Alan Modra <amodra@bigpond.net.au>
1380
1381 * Makefile.am: Run "make dep-am".
1382 * Makefile.in: Regenerate.
1383 * aclocal.m4: Regenerate.
1384 * configure: Regenerate.
1385 * po/POTFILES.in: Regenerate.
1386 * po/opcodes.pot: Regenerate.
1387
24443139
AS		 13882004-09-11 Andreas Schwab <schwab@suse.de>
1389
1390 * configure: Rebuild.
1391
2a309db0
AM		 13922004-09-09 Segher Boessenkool <segher@kernel.crashing.org>
1393
1394 * ppc-opc.c (L): Make this field not optional.
1395
42851540
NC		 13962004-09-03 Tomer Levi <Tomer.Levi@nsc.com>
1397
1398 * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
1399 Fix parameter to 'm[t|f]csr' insns.
1400
979273e3
NN		 14012004-08-30 Nathanael Nerode <neroden@gcc.gnu.org>
1402
1403 * configure.in: Autoupdate to autoconf 2.59.
1404 * aclocal.m4: Rebuild with aclocal 1.4p6.
1405 * configure: Rebuild with autoconf 2.59.
1406 * Makefile.in: Rebuild with automake 1.4p6 (picking up
1407 bfd changes for autoconf 2.59 on the way).
1408 * config.in: Rebuild with autoheader 2.59.
1409
ac28a1cb
RS		 14102004-08-27 Richard Sandiford <rsandifo@redhat.com>
1411
1412 * frv-desc.[ch], frv-opc.[ch]: Regenerated.
1413
30d1c836
ML		 14142004-07-30 Michal Ludvig <mludvig@suse.cz>
1415
1416 * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
1417 (GRPPADLCK2): New define.
1418 (twobyte_has_modrm): True for 0xA6.
1419 (grps): GRPPADLCK2 for opcode 0xA6.
1420
0b0ac059
AO		 14212004-07-29 Alexandre Oliva <aoliva@redhat.com>
1422
1423 Introduce SH2a support.
1424 * sh-opc.h (arch_sh2a_base): Renumber.
1425 (arch_sh2a_nofpu_base): Remove.
1426 (arch_sh_base_mask): Adjust.
1427 (arch_opann_mask): New.
1428 (arch_sh2a, arch_sh2a_nofpu): Adjust.
1429 (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
1430 (sh_table): Adjust whitespace.
1431 2004-02-24 Corinna Vinschen <vinschen@redhat.com>
1432 * sh-opc.h (arch_sh2a_nofpu_up): New. Use instead of arch_sh2a_up in
1433 instruction list throughout.
1434 (arch_sh2a_up): Redefine to include fpu instruction set. Use instead
1435 of arch_sh2a in instruction list throughout.
1436 (arch_sh2e_up): Accomodate above changes.
1437 (arch_sh2_up): Ditto.
1438 2004-02-20 Corinna Vinschen <vinschen@redhat.com>
1439 * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
1440 2004-02-18 Corinna Vinschen <vinschen@redhat.com>
1441 * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
1442 * sh-opc.h (arch_sh2a_nofpu): New.
1443 (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
1444 (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
1445 instruction.
1446 2004-01-20 DJ Delorie <dj@redhat.com>
1447 * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
1448 2003-12-29 DJ Delorie <dj@redhat.com>
1449 * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
1450 sh_opcode_info, sh_table): Add sh2a support.
1451 (arch_op32): New, to tag 32-bit opcodes.
1452 * sh-dis.c (print_insn_sh): Support sh2a opcodes.
1453 2003-12-02 Michael Snyder <msnyder@redhat.com>
1454 * sh-opc.h (arch_sh2a): Add.
1455 * sh-dis.c (arch_sh2a): Handle.
1456 * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
1457
670ec21d
NC		 14582004-07-27 Tomer Levi <Tomer.Levi@nsc.com>
1459
1460 * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
1461
ed049af3
NC		 14622004-07-22 Nick Clifton <nickc@redhat.com>
1463
1464 PR/280
1465 * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
1466 insns - this is done by objdump itself.
1467 * h8500-dis.c (print_insn_h8500): Likewise.
1468
20f0a1fc
NC		 14692004-07-21 Jan Beulich <jbeulich@novell.com>
1470
1471 * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
1472 regardless of address size prefix in effect.
1473 (ptr_reg): Size or address registers does not depend on rex64, but
1474 on the presence of an address size override.
1475 (OP_MMX): Use rex.x only for xmm registers.
1476 (OP_EM): Use rex.z only for xmm registers.
1477
6f14957b
MR		 14782004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
1479
1480 * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
1481 move/branch operations to the bottom so that VR5400 multimedia
1482 instructions take precedence in disassembly.
1483
1586d91e
MR		 14842004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
1485
1486 * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
1487 ISA-specific "break" encoding.
1488
982de27a
NC		 14892004-07-13 Elvis Chiang <elvisfb@gmail.com>
1490
1491 * arm-opc.h: Fix typo in comment.
1492
4300ab10
AS		 14932004-07-11 Andreas Schwab <schwab@suse.de>
1494
1495 * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
1496
8577e690
AS		 14972004-07-09 Andreas Schwab <schwab@suse.de>
1498
1499 * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
1500
1fe1f39c
NC		 15012004-07-07 Tomer Levi <Tomer.Levi@nsc.com>
1502
1503 * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
1504 (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
1505 (crx-dis.lo): New target.
1506 (crx-opc.lo): Likewise.
1507 * Makefile.in: Regenerate.
1508 * configure.in: Handle bfd_crx_arch.
1509 * configure: Regenerate.
1510 * crx-dis.c: New file.
1511 * crx-opc.c: New file.
1512 * disassemble.c (ARCH_crx): Define.
1513 (disassembler): Handle ARCH_crx.
1514
7a33b495
JW		 15152004-06-29 James E Wilson <wilson@specifixinc.com>
1516
1517 * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
1518 * ia64-asmtab.c: Regnerate.
1519
98e69875
AM		 15202004-06-28 Alan Modra <amodra@bigpond.net.au>
1521
1522 * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
1523 (extract_fxm): Don't test dialect.
1524 (XFXFXM_MASK): Include the power4 bit.
1525 (XFXM): Add p4 param.
1526 (powerpc_opcodes): Add mfocrf and mtocrf. Adjust mtcr.
1527
a53b85e2
AO		 15282004-06-27 Alexandre Oliva <aoliva@redhat.com>
1529
1530 2003-07-21 Richard Sandiford <rsandifo@redhat.com>
1531 * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
1532
d0618d1c
AM		 15332004-06-26 Alan Modra <amodra@bigpond.net.au>
1534
1535 * ppc-opc.c (BH, XLBH_MASK): Define.
1536 (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
1537
1d9f512f
AM		 15382004-06-24 Alan Modra <amodra@bigpond.net.au>
1539
1540 * i386-dis.c (x_mode): Comment.
1541 (two_source_ops): File scope.
1542 (float_mem): Correct fisttpll and fistpll.
1543 (float_mem_mode): New table.
1544 (dofloat): Use it.
1545 (OP_E): Correct intel mode PTR output.
1546 (ptr_reg): Use open_char and close_char.
1547 (PNI_Fixup): Handle possible suffix on sidt. Use op1out etc. for
1548 operands. Set two_source_ops.
1549
52886d70
AM		 15502004-06-15 Alan Modra <amodra@bigpond.net.au>
1551
1552 * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
1553 instead of _raw_size.
1554
bad9ceea
JJ		 15552004-06-08 Jakub Jelinek <jakub@redhat.com>
1556
1557 * ia64-gen.c (in_iclass): Handle more postinc st
1558 and ld variants.
1559 * ia64-asmtab.c: Rebuilt.
1560
0451f5df
MS		 15612004-06-01 Martin Schwidefsky <schwidefsky@de.ibm.com>
1562
1563 * s390-opc.txt: Correct architecture mask for some opcodes.
1564 lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
1565 in the esa mode as well.
1566
f6f9408f
JR		 15672004-05-28 Andrew Stubbs <andrew.stubbs@superh.com>
1568
1569 * sh-dis.c (target_arch): Make unsigned.
1570 (print_insn_sh): Replace (most of) switch with a call to
1571 sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
1572 * sh-opc.h: Redefine architecture flags values.
1573 Add sh3-nommu architecture.
1574 Reorganise <arch>_up macros so they make more visual sense.
1575 (SH_MERGE_ARCH_SET): Define new macro.
1576 (SH_VALID_BASE_ARCH_SET): Likewise.
1577 (SH_VALID_MMU_ARCH_SET): Likewise.
1578 (SH_VALID_CO_ARCH_SET): Likewise.
1579 (SH_VALID_ARCH_SET): Likewise.
1580 (SH_MERGE_ARCH_SET_VALID): Likewise.
1581 (SH_ARCH_SET_HAS_FPU): Likewise.
1582 (SH_ARCH_SET_HAS_DSP): Likewise.
1583 (SH_ARCH_UNKNOWN_ARCH): Likewise.
1584 (sh_get_arch_from_bfd_mach): Add prototype.
1585 (sh_get_arch_up_from_bfd_mach): Likewise.
1586 (sh_get_bfd_mach_from_arch_set): Likewise.
1587 (sh_merge_bfd_arc): Likewise.
1588
be8c092b
NC		 15892004-05-24 Peter Barada <peter@the-baradas.com>
1590
1591 * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
610ad19b
AM		 1592 into new match_insn_m68k function. Loop over canidate
1593 matches and select first that completely matches.
be8c092b
NC		 1594 * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
1595 * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
610ad19b 1596 to verify addressing for MAC/EMAC.
be8c092b
NC		 1597 * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
1598 reigster halves since 'fpu' and 'spl' look misleading.
1599 * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
1600 * m68k-opc.c: Rearragne mac/emac cases to use longest for
1601 first, tighten up match masks.
1602 * m68k-opc.c: Add 'size' field to struct m68k_opcode. Produce
1603 'size' from special case code in print_insn_m68k to
1604 determine decode size of insns.
1605
a30e9cc4
AM		 16062004-05-19 Alan Modra <amodra@bigpond.net.au>
1607
1608 * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
1609 well as when -mpower4.
1610
9598fbe5
NC		 16112004-05-13 Nick Clifton <nickc@redhat.com>
1612
1613 * po/fr.po: Updated French translation.
1614
6b6e92f4
NC		 16152004-05-05 Peter Barada <peter@the-baradas.com>
1616
1617 * m68k-dis.c(print_insn_m68k): Add new chips, use core
1618 variants in arch_mask. Only set m68881/68851 for 68k chips.
1619 * m68k-op.c: Switch from ColdFire chips to core variants.
1620
a404d431
AM		 16212004-05-05 Alan Modra <amodra@bigpond.net.au>
1622
a30e9cc4 1623 PR 147.
a404d431
AM		 1624 * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
1625
f3806e43
BE		 16262004-04-29 Ben Elliston <bje@au.ibm.com>
1627
520ceea4
BE		 1628 * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
1629 (powerpc_opcodes): Add "dbczl" instruction for PPC970.
f3806e43 1630
1f1799d5
KK		 16312004-04-22 Kaz Kojima <kkojima@rr.iij4u.or.jp>
1632
1633 * sh-dis.c (print_insn_sh): Print the value in constant pool
1634 as a symbol if it looks like a symbol.
1635
fd99574b
NC		 16362004-04-22 Peter Barada <peter@the-baradas.com>
1637
1638 * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
1639 appropriate ColdFire architectures.
1640 (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
1641 mask addressing.
1642 Add EMAC instructions, fix MAC instructions. Remove
1643 macmw/macml/msacmw/msacml instructions since mask addressing now
1644 supported.
1645
b4781d44
JJ		 16462004-04-20 Jakub Jelinek <jakub@redhat.com>
1647
1648 * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
1649 (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
1650 suffix. Use fmov*x macros, create all 3 fpsize variants in one
1651 macro. Adjust all users.
1652
91809fda 16532004-04-15 Anil Paranjpe <anilp1@kpitcummins.com>
610ad19b 1654
91809fda
NC		 1655 * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
1656 separately.
1657
f4453dfa
NC		 16582004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
1659
1660 * m32r-asm.c: Regenerate.
1661
9b0de91a
SS		 16622004-03-29 Stan Shebs <shebs@apple.com>
1663
1664 * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
1665 used.
1666
e20c0b3d
AM		 16672004-03-19 Alan Modra <amodra@bigpond.net.au>
1668
1669 * aclocal.m4: Regenerate.
1670 * config.in: Regenerate.
1671 * configure: Regenerate.
1672 * po/POTFILES.in: Regenerate.
1673 * po/opcodes.pot: Regenerate.
1674
fdd12ef3
AM		 16752004-03-16 Alan Modra <amodra@bigpond.net.au>
1676
1677 * ppc-dis.c (print_insn_powerpc): Don't print tabs. Handle
1678 PPC_OPERANDS_GPR_0.
1679 * ppc-opc.c (RA0): Define.
1680 (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
1681 (RAOPT): Rename from RAO. Update all uses.
a9c3619e 1682 (powerpc_opcodes): Use RA0 as appropriate.
fdd12ef3 1683
2dc111b3 16842004-03-15 Aldy Hernandez <aldyh@redhat.com>
fdd12ef3
AM		 1685
1686 * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
2dc111b3 1687
7bfeee7b
AM		 16882004-03-15 Alan Modra <amodra@bigpond.net.au>
1689
1690 * sparc-dis.c (print_insn_sparc): Update getword prototype.
1691
7ffdda93
ML		 16922004-03-12 Michal Ludvig <mludvig@suse.cz>
1693
1694 * i386-dis.c (GRPPLOCK): Delete.
7bfeee7b 1695 (grps): Delete GRPPLOCK entry.
7ffdda93 1696
cc0ec051
AM		 16972004-03-12 Alan Modra <amodra@bigpond.net.au>
1698
1699 * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1700 (M, Mp): Use OP_M.
1701 (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1702 (GRPPADLCK): Define.
1703 (dis386): Use NOP_Fixup on "nop".
1704 (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1705 (twobyte_has_modrm): Set for 0xa7.
1706 (padlock_table): Delete. Move to..
1707 (grps): ..here, using OP_0f07. Use OP_Ofae on lfence, mfence
1708 and clflush.
1709 (print_insn): Revert PADLOCK_SPECIAL code.
1710 (OP_E): Delete sfence, lfence, mfence checks.
1711
4fd61dcb
JJ		 17122004-03-12 Jakub Jelinek <jakub@redhat.com>
1713
1714 * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1715 (INVLPG_Fixup): New function.
1716 (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1717
0f10071e
ML		 17182004-03-12 Michal Ludvig <mludvig@suse.cz>
1719
1720 * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1721 (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1722 (padlock_table): New struct with PadLock instructions.
1723 (print_insn): Handle PADLOCK_SPECIAL.
1724
c02908d2
AM		 17252004-03-12 Alan Modra <amodra@bigpond.net.au>
1726
1727 * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1728 (OP_E): Twiddle clflush to sfence here.
1729
d5bb7600
NC		 17302004-03-08 Nick Clifton <nickc@redhat.com>
1731
1732 * po/de.po: Updated German translation.
1733
ae51a426
JR		 17342003-03-03 Andrew Stubbs <andrew.stubbs@superh.com>
1735
1736 * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1737 nofpu mode. Add BFD type bfd_mach_sh4_nommu_nofpu.
1738 * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1739 accordingly.
1740
676a64f4
RS		 17412004-03-01 Richard Sandiford <rsandifo@redhat.com>
1742
1743 * frv-asm.c: Regenerate.
1744 * frv-desc.c: Regenerate.
1745 * frv-desc.h: Regenerate.
1746 * frv-dis.c: Regenerate.
1747 * frv-ibld.c: Regenerate.
1748 * frv-opc.c: Regenerate.
1749 * frv-opc.h: Regenerate.
1750
c7a48b9a
RS		 17512004-03-01 Richard Sandiford <rsandifo@redhat.com>
1752
1753 * frv-desc.c, frv-opc.c: Regenerate.
1754
8ae0baa2
RS		 17552004-03-01 Richard Sandiford <rsandifo@redhat.com>
1756
1757 * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1758
ce11586c
JR		 17592004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1760
1761 * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1762 Also correct mistake in the comment.
1763
6a5709a5
JR		 17642004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1765
1766 * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1767 ensure that double registers have even numbers.
1768 Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1769 that reserved instruction 0xfffd does not decode the same
1770 as 0xfdfd (ftrv).
1771 * sh-opc.h: Add REG_N_D nibble type and use it whereever
1772 REG_N refers to a double register.
1773 Add REG_N_B01 nibble type and use it instead of REG_NM
1774 in ftrv.
1775 Adjust the bit patterns in a few comments.
1776
e5d2b64f 17772004-02-25 Aldy Hernandez <aldyh@redhat.com>
7bfeee7b
AM		 1778
1779 * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
e5d2b64f 1780
1f04b05f
AH		 17812004-02-20 Aldy Hernandez <aldyh@redhat.com>
1782
1783 * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1784
2f3b8700
AH		 17852004-02-20 Aldy Hernandez <aldyh@redhat.com>
1786
1787 * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1788
f0b26da6 17892004-02-20 Aldy Hernandez <aldyh@redhat.com>
7bfeee7b
AM		 1790
1791 * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1792 mtivor32, mtivor33, mtivor34.
f0b26da6 1793
23d59c56 17942004-02-19 Aldy Hernandez <aldyh@redhat.com>
7bfeee7b
AM		 1795
1796 * ppc-opc.c (powerpc_opcodes): Add mfmcar.
23d59c56 1797
34920d91
NC		 17982004-02-10 Petko Manolov <petkan@nucleusys.com>
1799
1800 * arm-opc.h Maverick accumulator register opcode fixes.
1801
44d86481
BE		 18022004-02-13 Ben Elliston <bje@wasabisystems.com>
1803
1804 * m32r-dis.c: Regenerate.
1805
17707c23
MS		 18062004-01-27 Michael Snyder <msnyder@redhat.com>
1807
1808 * sh-opc.h (sh_table): "fsrra", not "fssra".
1809
fe3a9bc4
NC		 18102004-01-23 Andrew Over <andrew.over@cs.anu.edu.au>
1811
1812 * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1813 contraints.
1814
ff24f124
JJ		 18152004-01-19 Andrew Over <andrew.over@cs.anu.edu.au>
1816
1817 * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1818
a02a862a
AM		 18192004-01-19 Alan Modra <amodra@bigpond.net.au>
1820
1821 * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1822 1. Don't print scale factor on AT&T mode when index missing.
1823
d164ea7f
AO		 18242004-01-16 Alexandre Oliva <aoliva@redhat.com>
1825
1826 * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1827 when loaded into XR registers.
1828
cb10e79a
RS		 18292004-01-14 Richard Sandiford <rsandifo@redhat.com>
1830
1831 * frv-desc.h: Regenerate.
1832 * frv-desc.c: Regenerate.
1833 * frv-opc.c: Regenerate.
1834
f532f3fa
MS		 18352004-01-13 Michael Snyder <msnyder@redhat.com>
1836
1837 * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1838
e45d0630
PB		 18392004-01-09 Paul Brook <paul@codesourcery.com>
1840
1841 * arm-opc.h (arm_opcodes): Move generic mcrr after known
1842 specific opcodes.
1843
3ba7a1aa
DJ		 18442004-01-07 Daniel Jacobowitz <drow@mvista.com>
1845
1846 * Makefile.am (libopcodes_la_DEPENDENCIES)
1847 (libopcodes_la_LIBADD): Revert 2003-05-17 change. Add explanatory
1848 comment about the problem.
1849 * Makefile.in: Regenerate.
1850
ba2d3f07
AO		 18512004-01-06 Alexandre Oliva <aoliva@redhat.com>
1852
1853 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
1854 * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1855 cut&paste errors in shifting/truncating numerical operands.
1856 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1857 * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1858 (parse_uslo16): Likewise.
1859 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1860 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1861 (parse_s12): Likewise.
1862 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1863 * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1864 (parse_uslo16): Likewise.
1865 (parse_uhi16): Parse gothi and gotfuncdeschi.
1866 (parse_d12): Parse got12 and gotfuncdesc12.
1867 (parse_s12): Likewise.
1868
3ab48931
NC		 18692004-01-02 Albert Bartoszko <albar@nt.kegel.com.pl>
1870
1871 * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1872 instruction which looks similar to an 'rla' instruction.
a0bd404e 1873
c9e214e5 1874For older changes see ChangeLog-0203
252b5132
RH		 1875\f
1876Local Variables:
2f6d2f85
NC		 1877mode: change-log
1878left-margin: 8
1879fill-column: 74
252b5132
RH		 1880version-control: never
1881End:
GDB Binutils - Deliverables
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