Remove unneeded AUX register symbols.
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
92708cec
MR
12016-04-11 Maciej W. Rozycki <macro@imgtec.com>
2
3 * mips-dis.c (print_mips16_insn_arg): Mask unused extended
4 instruction bits out.
5
a42a4f84
AB
62016-04-07 Andrew Burgess <andrew.burgess@embecosm.com>
7
8 * arc-nps400-tbl.h: Add schd, sync, and hwschd instructions.
9 * arc-opc.c (arc_flag_operands): Add new flags.
10 (arc_flag_classes): Add new classes.
11
1328504b
AB
122016-04-07 Andrew Burgess <andrew.burgess@embecosm.com>
13
14 * arc-opc.c (arc_opcodes): Extend comment to discus table layout.
15
820f03ff
AB
162016-04-05 Andrew Burgess <andrew.burgess@embecosm.com>
17
18 * arc-nps400-tbl.h: Add movbi, decode1, fbset, fbclear, encode0,
19 encode1, rflt, crc16, and crc32 instructions.
20 * arc-opc.c (arc_flag_operands): Add F_NPS_R.
21 (arc_flag_classes): Add C_NPS_R.
22 (insert_nps_bitop_size_2b): New function.
23 (extract_nps_bitop_size_2b): Likewise.
24 (insert_nps_bitop_uimm8): Likewise.
25 (extract_nps_bitop_uimm8): Likewise.
26 (arc_operands): Add new operand entries.
27
8ddf6b2a
CZ
282016-04-05 Claudiu Zissulescu <claziss@synopsys.com>
29
30 * arc-regs.h: Add a new subclass field. Add double assist
31 accumulator register values.
32 * arc-tbl.h: Use DPA subclass to mark the double assist
33 instructions. Use DPX/SPX subclas to mark the FPX instructions.
34 * arc-opc.c (RSP): Define instead of SP.
35 (arc_aux_regs): Add the subclass field.
36
589a7d88
JW
372016-04-05 Jiong Wang <jiong.wang@arm.com>
38
39 * arm-dis.c: Support FP16 vmul, vmla, vmls (by scalar).
40
0a191de9 412016-03-31 Andrew Burgess <andrew.burgess@embecosm.com>
2cce10e7
AB
42
43 * arc-opc.c (arc_operands): Fix operand flags for NPS_R_DST, and
44 NPS_R_SRC1.
45
0a106562
AB
462016-03-30 Andrew Burgess <andrew.burgess@embecosm.com>
47
48 * arc-nps400-tbl.h: Add a header comment, and fix some whitespace
49 issues. No functional changes.
50
bd05ac5f
CZ
512016-03-30 Claudiu Zissulescu <claziss@synopsys.com>
52
53 * arc-regs.h (IC_RAM_ADDRESS, IC_TAG, IC_WP, IC_DATA, CONTROL0)
54 (AX2, AY2, MX2, MY2, AY0, AY1, DC_RAM_ADDR, DC_TAG, CONTROL1)
55 (RTT): Remove duplicate.
56 (LCDINSTR, LCDDATA, LCDSTAT, CC_*, PCT_COUNT*, PCT_SNAP*)
57 (PCT_CONFIG*): Remove.
58 (D1L, D1H, D2H, D2L): Define.
59
9885948f
CZ
602016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
61
62 * arc-ext-tbl.h (dsp_fp_i2flt): Fix typo.
63
f2dd8838
CZ
642016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
65
66 * arc-tbl.h (invld07): Remove.
67 * arc-ext-tbl.h: New file.
68 * arc-dis.c (FIELDA, FIELDB, FIELDC): Remove.
69 * arc-opc.c (arc_opcodes): Add ext-tbl include.
70
0d2f91fe
JK
712016-03-24 Jan Kratochvil <jan.kratochvil@redhat.com>
72
73 Fix -Wstack-usage warnings.
74 * aarch64-dis.c (print_operands): Substitute size.
75 * aarch64-opc.c (print_register_offset_address): Substitute tblen.
76
a6b71f42
JM
772016-03-22 Jose E. Marchesi <jose.marchesi@oracle.com>
78
79 * sparc-opc.c (sparc_opcodes): Reorder entries for `rd' in order
80 to get a proper diagnostic when an invalid ASR register is used.
81
9780e045
NC
822016-03-22 Nick Clifton <nickc@redhat.com>
83
84 * configure: Regenerate.
85
e23e8ebe
AB
862016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
87
88 * arc-nps400-tbl.h: New file.
89 * arc-opc.c: Add top level comment.
90 (insert_nps_3bit_dst): New function.
91 (extract_nps_3bit_dst): New function.
92 (insert_nps_3bit_src2): New function.
93 (extract_nps_3bit_src2): New function.
94 (insert_nps_bitop_size): New function.
95 (extract_nps_bitop_size): New function.
96 (arc_flag_operands): Add nps400 entries.
97 (arc_flag_classes): Add nps400 entries.
98 (arc_operands): Add nps400 entries.
99 (arc_opcodes): Add nps400 include.
100
1ae8ab47
AB
1012016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
102
103 * arc-opc.c (arc_flag_classes): Convert all flag classes to use
104 the new class enum values.
105
8699fc3e
AB
1062016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
107
108 * arc-dis.c (print_insn_arc): Handle nps400.
109
24740d83
AB
1102016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
111
112 * arc-opc.c (BASE): Delete.
113
8678914f
NC
1142016-03-18 Nick Clifton <nickc@redhat.com>
115
116 PR target/19721
117 * aarch64-tbl.h (aarch64_opcode_table): Fix type of second operand
118 of MOV insn that aliases an ORR insn.
119
cc933301
JW
1202016-03-16 Jiong Wang <jiong.wang@arm.com>
121
122 * arm-dis.c (neon_opcodes): Support new FP16 instructions.
123
f86f5863
TS
1242016-03-07 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
125
126 * mcore-opc.h: Add const qualifiers.
127 * microblaze-opc.h (struct op_code_struct): Likewise.
128 * sh-opc.h: Likewise.
129 * tic4x-dis.c (tic4x_print_indirect): Likewise.
130 (tic4x_print_op): Likewise.
131
62de1c63
AM
1322016-03-02 Alan Modra <amodra@gmail.com>
133
d11698cd 134 * or1k-desc.h: Regenerate.
62de1c63 135 * fr30-ibld.c: Regenerate.
c697cf0b 136 * rl78-decode.c: Regenerate.
62de1c63 137
020efce5
NC
1382016-03-01 Nick Clifton <nickc@redhat.com>
139
140 PR target/19747
141 * rl78-dis.c (print_insn_rl78_common): Fix typo.
142
b0c11777
RL
1432016-02-24 Renlin Li <renlin.li@arm.com>
144
145 * arm-dis.c (coprocessor_opcodes): Add fp16 instruction entries.
146 (print_insn_coprocessor): Support fp16 instructions.
147
3e309328
RL
1482016-02-24 Renlin Li <renlin.li@arm.com>
149
150 * arm-dis.c (print_insn_coprocessor): Fix mask for vsel, vmaxnm,
151 vminnm, vrint(mpna).
152
8afc7bea
RL
1532016-02-24 Renlin Li <renlin.li@arm.com>
154
155 * arm-dis.c (print_insn_coprocessor): Check co-processor number for
156 cpd/cpd2, mcr/mcr2, mrc/mrc2, ldc/ldc2, stc/stc2.
157
4fd7268a
L
1582016-02-15 H.J. Lu <hongjiu.lu@intel.com>
159
160 * i386-dis.c (print_insn): Parenthesize expression to prevent
161 truncated addresses.
162 (OP_J): Likewise.
163
4670103e
CZ
1642016-02-10 Claudiu Zissulescu <claziss@synopsys.com>
165 Janek van Oirschot <jvanoirs@synopsys.com>
166
167 * arc-opc.c (arc_relax_opcodes, arc_num_relax_opcodes): New
168 variable.
169
c1d9289f
NC
1702016-02-04 Nick Clifton <nickc@redhat.com>
171
172 PR target/19561
173 * msp430-dis.c (print_insn_msp430): Add a special case for
174 decoding an RRC instruction with the ZC bit set in the extension
175 word.
176
a143b004
AB
1772016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
178
179 * cgen-ibld.in (insert_normal): Rework calculation of shift.
180 * epiphany-ibld.c: Regenerate.
181 * fr30-ibld.c: Regenerate.
182 * frv-ibld.c: Regenerate.
183 * ip2k-ibld.c: Regenerate.
184 * iq2000-ibld.c: Regenerate.
185 * lm32-ibld.c: Regenerate.
186 * m32c-ibld.c: Regenerate.
187 * m32r-ibld.c: Regenerate.
188 * mep-ibld.c: Regenerate.
189 * mt-ibld.c: Regenerate.
190 * or1k-ibld.c: Regenerate.
191 * xc16x-ibld.c: Regenerate.
192 * xstormy16-ibld.c: Regenerate.
193
b89807c6
AB
1942016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
195
196 * epiphany-dis.c: Regenerated from latest cpu files.
197
d8c823c8
MM
1982016-02-01 Michael McConville <mmcco@mykolab.com>
199
200 * cgen-dis.c (count_decodable_bits): Use unsigned value for mask
201 test bit.
202
5bc5ae88
RL
2032016-01-25 Renlin Li <renlin.li@arm.com>
204
205 * arm-dis.c (mapping_symbol_for_insn): New function.
206 (find_ifthen_state): Call mapping_symbol_for_insn().
207
0bff6e2d
MW
2082016-01-20 Matthew Wahab <matthew.wahab@arm.com>
209
210 * aarch64-opc.c (operand_general_constraint_met_p): Check validity
211 of MSR UAO immediate operand.
212
100b4f2e
MR
2132016-01-18 Maciej W. Rozycki <macro@imgtec.com>
214
215 * mips-dis.c (print_insn_micromips): Remove 48-bit microMIPS
216 instruction support.
217
5c14705f
AM
2182016-01-17 Alan Modra <amodra@gmail.com>
219
220 * configure: Regenerate.
221
4d82fe66
NC
2222016-01-14 Nick Clifton <nickc@redhat.com>
223
224 * rl78-decode.opc (rl78_decode_opcode): Add 's' operand to movw
225 instructions that can support stack pointer operations.
226 * rl78-decode.c: Regenerate.
227 * rl78-dis.c: Fix display of stack pointer in MOVW based
228 instructions.
229
651657fa
MW
2302016-01-14 Matthew Wahab <matthew.wahab@arm.com>
231
232 * aarch64-opc.c (aarch64_sys_reg_supported_p): Merge conditionals
233 testing for RAS support. Add checks for erxfr_el1, erxctlr_el1,
234 erxtatus_el1 and erxaddr_el1.
235
105bde57
MW
2362016-01-12 Matthew Wahab <matthew.wahab@arm.com>
237
238 * arm-dis.c (arm_opcodes): Add "esb".
239 (thumb_opcodes): Likewise.
240
afa8d405
PB
2412016-01-11 Peter Bergner <bergner@vnet.ibm.com>
242
243 * ppc-opc.c <xscmpnedp>: Delete.
244 <xvcmpnedp>: Likewise.
245 <xvcmpnedp.>: Likewise.
246 <xvcmpnesp>: Likewise.
247 <xvcmpnesp.>: Likewise.
248
83c3256e
AS
2492016-01-08 Andreas Schwab <schwab@linux-m68k.org>
250
251 PR gas/13050
252 * m68k-opc.c (moveb, movew): For ISA_B/C only allow #,d(An) in
253 addition to ISA_A.
254
6f2750fe
AM
2552016-01-01 Alan Modra <amodra@gmail.com>
256
257 Update year range in copyright notice of all files.
258
3499769a
AM
259For older changes see ChangeLog-2015
260\f
261Copyright (C) 2016 Free Software Foundation, Inc.
262
263Copying and distribution of this file, with or without modification,
264are permitted in any medium without royalty provided the copyright
265notice and this notice are preserved.
266
267Local Variables:
268mode: change-log
269left-margin: 8
270fill-column: 74
271version-control: never
272End:
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