[deliverable/binutils-gdb.git] / opcodes / ChangeLog

2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>

	* arm-dis.c (get_sym_code_type): Use ARM_GET_SYM_BRANCH_TYPE to get
	branch type of a symbol.
	(print_insn): Likewise.

2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>

	* arm-dis.c (coprocessor_opcodes): Add entries for VFP ARMv8-M
	Mainline Security Extensions instructions.
	(thumb_opcodes): Add entries for narrow ARMv8-M Security
	Extensions instructions.
	(thumb32_opcodes): Add entries for wide ARMv8-M Security Extensions
	instructions.
	(psr_name): Add new MSP_NS and PSP_NS ARMv8-M Security Extensions
	special registers.

2016-05-09  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* sparc-opc.c (sparc_opcodes): Fix mnemonic of faligndatai.

2016-05-03  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-ext.c (dump_ARC_extmap): Handle SYNATX_NOP and SYNTAX_1OP.
	(arcExtMap_genOpcode): Likewise.
	* arc-opc.c (arg_32bit_rc): Define new variable.
	(arg_32bit_u6): Likewise.
	(arg_32bit_limm): Likewise.

2016-05-03  Szabolcs Nagy  <szabolcs.nagy@arm.com>

	* aarch64-gen.c (VERIFIER): Define.
	* aarch64-opc.c (VERIFIER): Define.
	(verify_ldpsw): Use static linkage.
	* aarch64-opc.h (verify_ldpsw): Remove.
	* aarch64-tbl.h: Use VERIFIER for verifiers.

2016-04-28  Nick Clifton  <nickc@redhat.com>

	PR target/19722
	* aarch64-dis.c (aarch64_opcode_decode): Run verifier if present.
	* aarch64-opc.c (verify_ldpsw): New function.
	* aarch64-opc.h (verify_ldpsw): New prototype.
	* aarch64-tbl.h: Add initialiser for verifier field.
	(LDPSW): Set verifier to verify_ldpsw.

2016-04-23  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/19983
	PR binutils/19984
	* i386-dis.c (print_insn): Return -1 if size of bfd_vma is
	smaller than address size.

2016-04-20  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>

	* alpha-dis.c: Regenerate.
	* crx-dis.c: Likewise.
	* disassemble.c: Likewise.
	* epiphany-opc.c: Likewise.
	* fr30-opc.c: Likewise.
	* frv-opc.c: Likewise.
	* ip2k-opc.c: Likewise.
	* iq2000-opc.c: Likewise.
	* lm32-opc.c: Likewise.
	* lm32-opinst.c: Likewise.
	* m32c-opc.c: Likewise.
	* m32r-opc.c: Likewise.
	* m32r-opinst.c: Likewise.
	* mep-opc.c: Likewise.
	* mt-opc.c: Likewise.
	* or1k-opc.c: Likewise.
	* or1k-opinst.c: Likewise.
	* tic80-opc.c: Likewise.
	* xc16x-opc.c: Likewise.
	* xstormy16-opc.c: Likewise.

2016-04-19  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add addb, subb, adcb, sbcb, andb, xorb, orb,
	fxorb, wxorb, shlb, shrb, notb, cntbb, div, mod, divm, qcmp,
	calcsd, and calcxd instructions.
	* arc-opc.c (insert_nps_bitop_size): Delete.
	(extract_nps_bitop_size): Delete.
	(MAKE_SRC_POS_INSERT_EXTRACT_FUNCS): Define, and use.
	(extract_nps_qcmp_m3): Define.
	(extract_nps_qcmp_m2): Define.
	(extract_nps_qcmp_m1): Define.
	(arc_flag_operands): Add F_NPS_SX, F_NPS_AR, F_NPS_AL.
	(arc_flag_classes): Add C_NPS_SX, C_NPS_AR_AL
	(arc_operands): Add NPS_SRC2_POS, NPS_SRC1_POS, NPS_ADDB_SIZE,
	NPS_ANDB_SIZE, NPS_FXORB_SIZ, NPS_WXORB_SIZ, NPS_R_XLDST,
	NPS_DIV_UIMM4, NPS_QCMP_SIZE, NPS_QCMP_M1, NPS_QCMP_M2, and
	NPS_QCMP_M3.

2016-04-19  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add dctcp, dcip, dcet, and dcacl instructions.

2016-04-15  H.J. Lu  <hongjiu.lu@intel.com>

	* Makefile.in: Regenerated with automake 1.11.6.
	* aclocal.m4: Likewise.

2016-04-14  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add xldb, xldw, xld, xstb, xstw, and xst
	instructions.
	* arc-opc.c (insert_nps_cmem_uimm16): New function.
	(extract_nps_cmem_uimm16): New function.
	(arc_operands): Add NPS_XLDST_UIMM16 operand.

2016-04-14  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-dis.c (arc_insn_length): New function.
	(print_insn_arc): Use arc_insn_length, change insnLen to unsigned.
	(find_format): Change insnLen parameter to unsigned.

2016-04-13  Nick Clifton  <nickc@redhat.com>

	PR target/19937
	* v850-opc.c (v850_opcodes): Correct masks for long versions of
	the LD.B and LD.BU instructions.

2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-dis.c (find_format): Check for extension flags.
	(print_flags): New function.
	(print_insn_arc): Update for .extCondCode, .extCoreRegister and
	.extAuxRegister.
	* arc-ext.c (arcExtMap_coreRegName): Use
	LAST_EXTENSION_CORE_REGISTER.
	(arcExtMap_coreReadWrite): Likewise.
	(dump_ARC_extmap): Update printing.
	* arc-opc.c (arc_flag_classes): Add F_CLASS_EXTEND flag.
	(arc_aux_regs): Add cpu field.
	* arc-regs.h: Add cpu field, lower case name aux registers.

2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-tbl.h: Add rtsc, sleep with no arguments.

2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-opc.c (flags_none, flags_f, flags_cc, flags_ccf):
	Initialize.
	(arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
	(arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
	(arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
	(arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
	(arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
	(arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
	(arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
	(arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
	(arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
	(arc_opcode arc_opcodes): Null terminate the array.
	(arc_num_opcodes): Remove.
	* arc-ext.h (INSERT_XOP): Define.
	(extInstruction_t): Likewise.
	(arcExtMap_instName): Delete.
	(arcExtMap_insn): New function.
	(arcExtMap_genOpcode): Likewise.
	* arc-ext.c (ExtInstruction): Remove.
	(create_map): Zero initialize instruction fields.
	(arcExtMap_instName): Remove.
	(arcExtMap_insn): New function.
	(dump_ARC_extmap): More info while debuging.
	(arcExtMap_genOpcode): New function.
	* arc-dis.c (find_format): New function.
	(print_insn_arc): Use find_format.
	(arc_get_disassembler): Enable dump_ARC_extmap only when
	debugging.

2016-04-11  Maciej W. Rozycki  <macro@imgtec.com>

	* mips-dis.c (print_mips16_insn_arg): Mask unused extended
	instruction bits out.

2016-04-07  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add schd, sync, and hwschd instructions.
	* arc-opc.c (arc_flag_operands): Add new flags.
	(arc_flag_classes): Add new classes.

2016-04-07  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-opc.c (arc_opcodes): Extend comment to discus table layout.

2016-04-05  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add movbi, decode1, fbset, fbclear, encode0,
	encode1, rflt, crc16, and crc32 instructions.
	* arc-opc.c (arc_flag_operands): Add F_NPS_R.
	(arc_flag_classes): Add C_NPS_R.
	(insert_nps_bitop_size_2b): New function.
	(extract_nps_bitop_size_2b): Likewise.
	(insert_nps_bitop_uimm8): Likewise.
	(extract_nps_bitop_uimm8): Likewise.
	(arc_operands): Add new operand entries.

2016-04-05  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-regs.h: Add a new subclass field.  Add double assist
	accumulator register values.
	* arc-tbl.h: Use DPA subclass to mark the double assist
	instructions.  Use DPX/SPX subclas to mark the FPX instructions.
	* arc-opc.c (RSP): Define instead of SP.
	(arc_aux_regs): Add the subclass field.

2016-04-05  Jiong Wang  <jiong.wang@arm.com>

	* arm-dis.c: Support FP16 vmul, vmla, vmls (by scalar).

2016-03-31  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-opc.c (arc_operands): Fix operand flags for NPS_R_DST, and
	NPS_R_SRC1.

2016-03-30  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add a header comment, and fix some whitespace
	issues.  No functional changes.

2016-03-30  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-regs.h (IC_RAM_ADDRESS, IC_TAG, IC_WP, IC_DATA, CONTROL0)
	(AX2, AY2, MX2, MY2, AY0, AY1, DC_RAM_ADDR, DC_TAG, CONTROL1)
	(RTT): Remove duplicate.
	(LCDINSTR, LCDDATA, LCDSTAT, CC_*, PCT_COUNT*, PCT_SNAP*)
	(PCT_CONFIG*): Remove.
	(D1L, D1H, D2H, D2L): Define.

2016-03-29  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-ext-tbl.h (dsp_fp_i2flt): Fix typo.

2016-03-29  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-tbl.h (invld07): Remove.
	* arc-ext-tbl.h: New file.
	* arc-dis.c (FIELDA, FIELDB, FIELDC): Remove.
	* arc-opc.c (arc_opcodes): Add ext-tbl include.

2016-03-24  Jan Kratochvil  <jan.kratochvil@redhat.com>

	Fix -Wstack-usage warnings.
	* aarch64-dis.c (print_operands): Substitute size.
	* aarch64-opc.c (print_register_offset_address): Substitute tblen.

2016-03-22  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* sparc-opc.c (sparc_opcodes): Reorder entries for `rd' in order
	to get a proper diagnostic when an invalid ASR register is used.

2016-03-22  Nick Clifton  <nickc@redhat.com>

	* configure: Regenerate.

2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: New file.
	* arc-opc.c: Add top level comment.
	(insert_nps_3bit_dst): New function.
	(extract_nps_3bit_dst): New function.
	(insert_nps_3bit_src2): New function.
	(extract_nps_3bit_src2): New function.
	(insert_nps_bitop_size): New function.
	(extract_nps_bitop_size): New function.
	(arc_flag_operands): Add nps400 entries.
	(arc_flag_classes): Add nps400 entries.
	(arc_operands): Add nps400 entries.
	(arc_opcodes): Add nps400 include.

2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-opc.c (arc_flag_classes): Convert all flag classes to use
	the new class enum values.

2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-dis.c (print_insn_arc): Handle nps400.

2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-opc.c (BASE): Delete.

2016-03-18  Nick Clifton  <nickc@redhat.com>

	PR target/19721
	* aarch64-tbl.h (aarch64_opcode_table): Fix type of second operand
	of MOV insn that aliases an ORR insn.

2016-03-16  Jiong Wang  <jiong.wang@arm.com>

	* arm-dis.c (neon_opcodes): Support new FP16 instructions.

2016-03-07  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>

	* mcore-opc.h: Add const qualifiers.
	* microblaze-opc.h (struct op_code_struct): Likewise.
	* sh-opc.h: Likewise.
	* tic4x-dis.c (tic4x_print_indirect): Likewise.
	(tic4x_print_op): Likewise.

2016-03-02  Alan Modra  <amodra@gmail.com>

	* or1k-desc.h: Regenerate.
	* fr30-ibld.c: Regenerate.
	* rl78-decode.c: Regenerate.

2016-03-01  Nick Clifton  <nickc@redhat.com>

	PR target/19747
	* rl78-dis.c (print_insn_rl78_common): Fix typo.

2016-02-24  Renlin Li  <renlin.li@arm.com>

	* arm-dis.c (coprocessor_opcodes): Add fp16 instruction entries.
	(print_insn_coprocessor): Support fp16 instructions.

2016-02-24  Renlin Li  <renlin.li@arm.com>

	* arm-dis.c (print_insn_coprocessor): Fix mask for vsel, vmaxnm,
	vminnm, vrint(mpna).

2016-02-24  Renlin Li  <renlin.li@arm.com>

	* arm-dis.c (print_insn_coprocessor): Check co-processor number for
	cpd/cpd2, mcr/mcr2, mrc/mrc2, ldc/ldc2, stc/stc2.

2016-02-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (print_insn): Parenthesize expression to prevent
	truncated addresses.
	(OP_J): Likewise.

2016-02-10  Claudiu Zissulescu  <claziss@synopsys.com>
	    Janek van Oirschot  <jvanoirs@synopsys.com>

	* arc-opc.c (arc_relax_opcodes, arc_num_relax_opcodes): New
	variable.

2016-02-04  Nick Clifton  <nickc@redhat.com>

	PR target/19561
	* msp430-dis.c (print_insn_msp430): Add a special case for
	decoding an RRC instruction with the ZC bit set in the extension
	word.

2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>

	* cgen-ibld.in (insert_normal): Rework calculation of shift.
	* epiphany-ibld.c: Regenerate.
	* fr30-ibld.c: Regenerate.
	* frv-ibld.c: Regenerate.
	* ip2k-ibld.c: Regenerate.
	* iq2000-ibld.c: Regenerate.
	* lm32-ibld.c: Regenerate.
	* m32c-ibld.c: Regenerate.
	* m32r-ibld.c: Regenerate.
	* mep-ibld.c: Regenerate.
	* mt-ibld.c: Regenerate.
	* or1k-ibld.c: Regenerate.
	* xc16x-ibld.c: Regenerate.
	* xstormy16-ibld.c: Regenerate.

2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>

	* epiphany-dis.c: Regenerated from latest cpu files.

2016-02-01  Michael McConville  <mmcco@mykolab.com>

	* cgen-dis.c (count_decodable_bits): Use unsigned value for mask
	test bit.

2016-01-25  Renlin Li  <renlin.li@arm.com>

	* arm-dis.c (mapping_symbol_for_insn): New function.
	(find_ifthen_state): Call mapping_symbol_for_insn().

2016-01-20  Matthew Wahab  <matthew.wahab@arm.com>

	* aarch64-opc.c (operand_general_constraint_met_p): Check validity
	of MSR UAO immediate operand.

2016-01-18  Maciej W. Rozycki  <macro@imgtec.com>

	* mips-dis.c (print_insn_micromips): Remove 48-bit microMIPS
	instruction support.

2016-01-17  Alan Modra  <amodra@gmail.com>

	* configure: Regenerate.

2016-01-14  Nick Clifton  <nickc@redhat.com>

	* rl78-decode.opc (rl78_decode_opcode): Add 's' operand to movw
	instructions that can support stack pointer operations.
	* rl78-decode.c: Regenerate.
	* rl78-dis.c: Fix display of stack pointer in MOVW based
	instructions.

2016-01-14  Matthew Wahab  <matthew.wahab@arm.com>

	* aarch64-opc.c (aarch64_sys_reg_supported_p): Merge conditionals
	testing for RAS support.  Add checks for erxfr_el1, erxctlr_el1,
	erxtatus_el1 and erxaddr_el1.

2016-01-12  Matthew Wahab  <matthew.wahab@arm.com>

	* arm-dis.c (arm_opcodes): Add "esb".
	(thumb_opcodes): Likewise.

2016-01-11  Peter Bergner <bergner@vnet.ibm.com>

	* ppc-opc.c <xscmpnedp>: Delete.
	<xvcmpnedp>: Likewise.
	<xvcmpnedp.>: Likewise.
	<xvcmpnesp>: Likewise.
	<xvcmpnesp.>: Likewise.

2016-01-08  Andreas Schwab  <schwab@linux-m68k.org>

	PR gas/13050
	* m68k-opc.c (moveb, movew): For ISA_B/C only allow #,d(An) in
	addition to ISA_A.

2016-01-01  Alan Modra  <amodra@gmail.com>

	Update year range in copyright notice of all files.

For older changes see ChangeLog-2015
\f
Copyright (C) 2016 Free Software Foundation, Inc.

Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved.

Local Variables:
mode: change-log
left-margin: 8
fill-column: 74
version-control: never
End:
Commit	Line	Data
39d911fc TP	1	2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
	2
	3	* arm-dis.c (get_sym_code_type): Use ARM_GET_SYM_BRANCH_TYPE to get
	4	branch type of a symbol.
	5	(print_insn): Likewise.
	6
16a1fa25 TP	7	2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
	8
	9	* arm-dis.c (coprocessor_opcodes): Add entries for VFP ARMv8-M
	10	Mainline Security Extensions instructions.
	11	(thumb_opcodes): Add entries for narrow ARMv8-M Security
	12	Extensions instructions.
	13	(thumb32_opcodes): Add entries for wide ARMv8-M Security Extensions
	14	instructions.
	15	(psr_name): Add new MSP_NS and PSP_NS ARMv8-M Security Extensions
	16	special registers.
	17
d751b79e JM	18	2016-05-09 Jose E. Marchesi <jose.marchesi@oracle.com>
	19
	20	* sparc-opc.c (sparc_opcodes): Fix mnemonic of faligndatai.
	21
945e0f82 CZ	22	2016-05-03 Claudiu Zissulescu <claziss@synopsys.com>
	23
	24	* arc-ext.c (dump_ARC_extmap): Handle SYNATX_NOP and SYNTAX_1OP.
	25	(arcExtMap_genOpcode): Likewise.
	26	* arc-opc.c (arg_32bit_rc): Define new variable.
	27	(arg_32bit_u6): Likewise.
	28	(arg_32bit_limm): Likewise.
	29
20f55f38 SN	30	2016-05-03 Szabolcs Nagy <szabolcs.nagy@arm.com>
	31
	32	* aarch64-gen.c (VERIFIER): Define.
	33	* aarch64-opc.c (VERIFIER): Define.
	34	(verify_ldpsw): Use static linkage.
	35	* aarch64-opc.h (verify_ldpsw): Remove.
	36	* aarch64-tbl.h: Use VERIFIER for verifiers.
	37
4bd13cde NC	38	2016-04-28 Nick Clifton <nickc@redhat.com>
	39
	40	PR target/19722
	41	* aarch64-dis.c (aarch64_opcode_decode): Run verifier if present.
	42	* aarch64-opc.c (verify_ldpsw): New function.
	43	* aarch64-opc.h (verify_ldpsw): New prototype.
	44	* aarch64-tbl.h: Add initialiser for verifier field.
	45	(LDPSW): Set verifier to verify_ldpsw.
	46
c0f92bf9 L	47	2016-04-23 H.J. Lu <hongjiu.lu@intel.com>
	48
	49	PR binutils/19983
	50	PR binutils/19984
	51	* i386-dis.c (print_insn): Return -1 if size of bfd_vma is
	52	smaller than address size.
	53
e6c7cdec TS	54	2016-04-20 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
	55
	56	* alpha-dis.c: Regenerate.
	57	* crx-dis.c: Likewise.
	58	* disassemble.c: Likewise.
	59	* epiphany-opc.c: Likewise.
	60	* fr30-opc.c: Likewise.
	61	* frv-opc.c: Likewise.
	62	* ip2k-opc.c: Likewise.
	63	* iq2000-opc.c: Likewise.
	64	* lm32-opc.c: Likewise.
	65	* lm32-opinst.c: Likewise.
	66	* m32c-opc.c: Likewise.
	67	* m32r-opc.c: Likewise.
	68	* m32r-opinst.c: Likewise.
	69	* mep-opc.c: Likewise.
	70	* mt-opc.c: Likewise.
	71	* or1k-opc.c: Likewise.
	72	* or1k-opinst.c: Likewise.
	73	* tic80-opc.c: Likewise.
	74	* xc16x-opc.c: Likewise.
	75	* xstormy16-opc.c: Likewise.
	76
537aefaf AB	77	2016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
	78
	79	* arc-nps400-tbl.h: Add addb, subb, adcb, sbcb, andb, xorb, orb,
	80	fxorb, wxorb, shlb, shrb, notb, cntbb, div, mod, divm, qcmp,
	81	calcsd, and calcxd instructions.
	82	* arc-opc.c (insert_nps_bitop_size): Delete.
	83	(extract_nps_bitop_size): Delete.
	84	(MAKE_SRC_POS_INSERT_EXTRACT_FUNCS): Define, and use.
	85	(extract_nps_qcmp_m3): Define.
	86	(extract_nps_qcmp_m2): Define.
	87	(extract_nps_qcmp_m1): Define.
	88	(arc_flag_operands): Add F_NPS_SX, F_NPS_AR, F_NPS_AL.
	89	(arc_flag_classes): Add C_NPS_SX, C_NPS_AR_AL
	90	(arc_operands): Add NPS_SRC2_POS, NPS_SRC1_POS, NPS_ADDB_SIZE,
	91	NPS_ANDB_SIZE, NPS_FXORB_SIZ, NPS_WXORB_SIZ, NPS_R_XLDST,
	92	NPS_DIV_UIMM4, NPS_QCMP_SIZE, NPS_QCMP_M1, NPS_QCMP_M2, and
	93	NPS_QCMP_M3.
	94
c8f785f2 AB	95	2016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
	96
	97	* arc-nps400-tbl.h: Add dctcp, dcip, dcet, and dcacl instructions.
	98
6fd8e7c2 L	99	2016-04-15 H.J. Lu <hongjiu.lu@intel.com>
	100
	101	* Makefile.in: Regenerated with automake 1.11.6.
	102	* aclocal.m4: Likewise.
	103
4b0c052e AB	104	2016-04-14 Andrew Burgess <andrew.burgess@embecosm.com>
	105
	106	* arc-nps400-tbl.h: Add xldb, xldw, xld, xstb, xstw, and xst
	107	instructions.
	108	* arc-opc.c (insert_nps_cmem_uimm16): New function.
	109	(extract_nps_cmem_uimm16): New function.
	110	(arc_operands): Add NPS_XLDST_UIMM16 operand.
	111
cb040366 AB	112	2016-04-14 Andrew Burgess <andrew.burgess@embecosm.com>
	113
	114	* arc-dis.c (arc_insn_length): New function.
	115	(print_insn_arc): Use arc_insn_length, change insnLen to unsigned.
	116	(find_format): Change insnLen parameter to unsigned.
	117
accc0180 NC	118	2016-04-13 Nick Clifton <nickc@redhat.com>
	119
	120	PR target/19937
	121	* v850-opc.c (v850_opcodes): Correct masks for long versions of
	122	the LD.B and LD.BU instructions.
	123
f36e33da CZ	124	2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
	125
	126	* arc-dis.c (find_format): Check for extension flags.
	127	(print_flags): New function.
	128	(print_insn_arc): Update for .extCondCode, .extCoreRegister and
	129	.extAuxRegister.
	130	* arc-ext.c (arcExtMap_coreRegName): Use
	131	LAST_EXTENSION_CORE_REGISTER.
	132	(arcExtMap_coreReadWrite): Likewise.
	133	(dump_ARC_extmap): Update printing.
	134	* arc-opc.c (arc_flag_classes): Add F_CLASS_EXTEND flag.
	135	(arc_aux_regs): Add cpu field.
	136	* arc-regs.h: Add cpu field, lower case name aux registers.
	137
1c2e355e CZ	138	2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
	139
	140	* arc-tbl.h: Add rtsc, sleep with no arguments.
	141
b99747ae CZ	142	2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
	143
	144	* arc-opc.c (flags_none, flags_f, flags_cc, flags_ccf):
	145	Initialize.
	146	(arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
	147	(arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
	148	(arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
	149	(arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
	150	(arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
	151	(arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
	152	(arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
	153	(arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
	154	(arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
	155	(arc_opcode arc_opcodes): Null terminate the array.
	156	(arc_num_opcodes): Remove.
	157	* arc-ext.h (INSERT_XOP): Define.
	158	(extInstruction_t): Likewise.
	159	(arcExtMap_instName): Delete.
	160	(arcExtMap_insn): New function.
	161	(arcExtMap_genOpcode): Likewise.
	162	* arc-ext.c (ExtInstruction): Remove.
	163	(create_map): Zero initialize instruction fields.
	164	(arcExtMap_instName): Remove.
	165	(arcExtMap_insn): New function.
	166	(dump_ARC_extmap): More info while debuging.
	167	(arcExtMap_genOpcode): New function.
	168	* arc-dis.c (find_format): New function.
	169	(print_insn_arc): Use find_format.
	170	(arc_get_disassembler): Enable dump_ARC_extmap only when
	171	debugging.
	172
92708cec MR	173	2016-04-11 Maciej W. Rozycki <macro@imgtec.com>
	174
	175	* mips-dis.c (print_mips16_insn_arg): Mask unused extended
	176	instruction bits out.
	177
a42a4f84 AB	178	2016-04-07 Andrew Burgess <andrew.burgess@embecosm.com>
	179
	180	* arc-nps400-tbl.h: Add schd, sync, and hwschd instructions.
	181	* arc-opc.c (arc_flag_operands): Add new flags.
	182	(arc_flag_classes): Add new classes.
	183
1328504b AB	184	2016-04-07 Andrew Burgess <andrew.burgess@embecosm.com>
	185
	186	* arc-opc.c (arc_opcodes): Extend comment to discus table layout.
	187
820f03ff AB	188	2016-04-05 Andrew Burgess <andrew.burgess@embecosm.com>
	189
	190	* arc-nps400-tbl.h: Add movbi, decode1, fbset, fbclear, encode0,
	191	encode1, rflt, crc16, and crc32 instructions.
	192	* arc-opc.c (arc_flag_operands): Add F_NPS_R.
	193	(arc_flag_classes): Add C_NPS_R.
	194	(insert_nps_bitop_size_2b): New function.
	195	(extract_nps_bitop_size_2b): Likewise.
	196	(insert_nps_bitop_uimm8): Likewise.
	197	(extract_nps_bitop_uimm8): Likewise.
	198	(arc_operands): Add new operand entries.
	199
8ddf6b2a CZ	200	2016-04-05 Claudiu Zissulescu <claziss@synopsys.com>
8ddf6b2a CZ	201
b99747ae CZ	202	* arc-regs.h: Add a new subclass field. Add double assist
	203	accumulator register values.
	204	* arc-tbl.h: Use DPA subclass to mark the double assist
	205	instructions. Use DPX/SPX subclas to mark the FPX instructions.
	206	* arc-opc.c (RSP): Define instead of SP.
	207	(arc_aux_regs): Add the subclass field.
8ddf6b2a	208
589a7d88 JW	209	2016-04-05 Jiong Wang <jiong.wang@arm.com>
	210
	211	* arm-dis.c: Support FP16 vmul, vmla, vmls (by scalar).
	212
0a191de9	213	2016-03-31 Andrew Burgess <andrew.burgess@embecosm.com>
2cce10e7 AB	214
	215	* arc-opc.c (arc_operands): Fix operand flags for NPS_R_DST, and
	216	NPS_R_SRC1.
	217
0a106562 AB	218	2016-03-30 Andrew Burgess <andrew.burgess@embecosm.com>
	219
	220	* arc-nps400-tbl.h: Add a header comment, and fix some whitespace
	221	issues. No functional changes.
	222
bd05ac5f CZ	223	2016-03-30 Claudiu Zissulescu <claziss@synopsys.com>
bd05ac5f CZ	224
b99747ae CZ	225	* arc-regs.h (IC_RAM_ADDRESS, IC_TAG, IC_WP, IC_DATA, CONTROL0)
	226	(AX2, AY2, MX2, MY2, AY0, AY1, DC_RAM_ADDR, DC_TAG, CONTROL1)
	227	(RTT): Remove duplicate.
	228	(LCDINSTR, LCDDATA, LCDSTAT, CC_, PCT_COUNT, PCT_SNAP*)
	229	(PCT_CONFIG*): Remove.
	230	(D1L, D1H, D2H, D2L): Define.
bd05ac5f	231
9885948f CZ	232	2016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
9885948f CZ	233
b99747ae	234	* arc-ext-tbl.h (dsp_fp_i2flt): Fix typo.
9885948f	235
f2dd8838 CZ	236	2016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
f2dd8838 CZ	237
b99747ae CZ	238	* arc-tbl.h (invld07): Remove.
	239	* arc-ext-tbl.h: New file.
	240	* arc-dis.c (FIELDA, FIELDB, FIELDC): Remove.
	241	* arc-opc.c (arc_opcodes): Add ext-tbl include.
f2dd8838	242
0d2f91fe JK	243	2016-03-24 Jan Kratochvil <jan.kratochvil@redhat.com>
	244
	245	Fix -Wstack-usage warnings.
	246	* aarch64-dis.c (print_operands): Substitute size.
	247	* aarch64-opc.c (print_register_offset_address): Substitute tblen.
	248
a6b71f42 JM	249	2016-03-22 Jose E. Marchesi <jose.marchesi@oracle.com>
	250
	251	* sparc-opc.c (sparc_opcodes): Reorder entries for `rd' in order
	252	to get a proper diagnostic when an invalid ASR register is used.
	253
9780e045 NC	254	2016-03-22 Nick Clifton <nickc@redhat.com>
	255
	256	* configure: Regenerate.
	257
e23e8ebe AB	258	2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
	259
	260	* arc-nps400-tbl.h: New file.
	261	* arc-opc.c: Add top level comment.
	262	(insert_nps_3bit_dst): New function.
	263	(extract_nps_3bit_dst): New function.
	264	(insert_nps_3bit_src2): New function.
	265	(extract_nps_3bit_src2): New function.
	266	(insert_nps_bitop_size): New function.
	267	(extract_nps_bitop_size): New function.
	268	(arc_flag_operands): Add nps400 entries.
	269	(arc_flag_classes): Add nps400 entries.
	270	(arc_operands): Add nps400 entries.
	271	(arc_opcodes): Add nps400 include.
	272
1ae8ab47 AB	273	2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
	274
	275	* arc-opc.c (arc_flag_classes): Convert all flag classes to use
	276	the new class enum values.
	277
8699fc3e AB	278	2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
	279
	280	* arc-dis.c (print_insn_arc): Handle nps400.
	281
24740d83 AB	282	2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
	283
	284	* arc-opc.c (BASE): Delete.
	285
8678914f NC	286	2016-03-18 Nick Clifton <nickc@redhat.com>
	287
	288	PR target/19721
	289	* aarch64-tbl.h (aarch64_opcode_table): Fix type of second operand
	290	of MOV insn that aliases an ORR insn.
	291
cc933301 JW	292	2016-03-16 Jiong Wang <jiong.wang@arm.com>
	293
	294	* arm-dis.c (neon_opcodes): Support new FP16 instructions.
	295
f86f5863 TS	296	2016-03-07 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
	297
	298	* mcore-opc.h: Add const qualifiers.
	299	* microblaze-opc.h (struct op_code_struct): Likewise.
	300	* sh-opc.h: Likewise.
	301	* tic4x-dis.c (tic4x_print_indirect): Likewise.
	302	(tic4x_print_op): Likewise.
	303
62de1c63 AM	304	2016-03-02 Alan Modra <amodra@gmail.com>
62de1c63 AM	305
d11698cd	306	* or1k-desc.h: Regenerate.
62de1c63	307	* fr30-ibld.c: Regenerate.
c697cf0b	308	* rl78-decode.c: Regenerate.
62de1c63	309
020efce5 NC	310	2016-03-01 Nick Clifton <nickc@redhat.com>
	311
	312	PR target/19747
	313	* rl78-dis.c (print_insn_rl78_common): Fix typo.
	314
b0c11777 RL	315	2016-02-24 Renlin Li <renlin.li@arm.com>
	316
	317	* arm-dis.c (coprocessor_opcodes): Add fp16 instruction entries.
	318	(print_insn_coprocessor): Support fp16 instructions.
	319
3e309328 RL	320	2016-02-24 Renlin Li <renlin.li@arm.com>
	321
	322	* arm-dis.c (print_insn_coprocessor): Fix mask for vsel, vmaxnm,
	323	vminnm, vrint(mpna).
	324
8afc7bea RL	325	2016-02-24 Renlin Li <renlin.li@arm.com>
	326
	327	* arm-dis.c (print_insn_coprocessor): Check co-processor number for
	328	cpd/cpd2, mcr/mcr2, mrc/mrc2, ldc/ldc2, stc/stc2.
	329
4fd7268a L	330	2016-02-15 H.J. Lu <hongjiu.lu@intel.com>
	331
	332	* i386-dis.c (print_insn): Parenthesize expression to prevent
	333	truncated addresses.
	334	(OP_J): Likewise.
	335
4670103e CZ	336	2016-02-10 Claudiu Zissulescu <claziss@synopsys.com>
	337	Janek van Oirschot <jvanoirs@synopsys.com>
	338
b99747ae CZ	339	* arc-opc.c (arc_relax_opcodes, arc_num_relax_opcodes): New
b99747ae CZ	340	variable.
4670103e	341
c1d9289f NC	342	2016-02-04 Nick Clifton <nickc@redhat.com>
	343
	344	PR target/19561
	345	* msp430-dis.c (print_insn_msp430): Add a special case for
	346	decoding an RRC instruction with the ZC bit set in the extension
	347	word.
	348
a143b004 AB	349	2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
	350
	351	* cgen-ibld.in (insert_normal): Rework calculation of shift.
	352	* epiphany-ibld.c: Regenerate.
	353	* fr30-ibld.c: Regenerate.
	354	* frv-ibld.c: Regenerate.
	355	* ip2k-ibld.c: Regenerate.
	356	* iq2000-ibld.c: Regenerate.
	357	* lm32-ibld.c: Regenerate.
	358	* m32c-ibld.c: Regenerate.
	359	* m32r-ibld.c: Regenerate.
	360	* mep-ibld.c: Regenerate.
	361	* mt-ibld.c: Regenerate.
	362	* or1k-ibld.c: Regenerate.
	363	* xc16x-ibld.c: Regenerate.
	364	* xstormy16-ibld.c: Regenerate.
	365
b89807c6 AB	366	2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
	367
	368	* epiphany-dis.c: Regenerated from latest cpu files.
	369
d8c823c8 MM	370	2016-02-01 Michael McConville <mmcco@mykolab.com>
	371
	372	* cgen-dis.c (count_decodable_bits): Use unsigned value for mask
	373	test bit.
	374
5bc5ae88 RL	375	2016-01-25 Renlin Li <renlin.li@arm.com>
	376
	377	* arm-dis.c (mapping_symbol_for_insn): New function.
	378	(find_ifthen_state): Call mapping_symbol_for_insn().
	379
0bff6e2d MW	380	2016-01-20 Matthew Wahab <matthew.wahab@arm.com>
	381
	382	* aarch64-opc.c (operand_general_constraint_met_p): Check validity
	383	of MSR UAO immediate operand.
	384
100b4f2e MR	385	2016-01-18 Maciej W. Rozycki <macro@imgtec.com>
	386
	387	* mips-dis.c (print_insn_micromips): Remove 48-bit microMIPS
	388	instruction support.
	389
5c14705f AM	390	2016-01-17 Alan Modra <amodra@gmail.com>
	391
	392	* configure: Regenerate.
	393
4d82fe66 NC	394	2016-01-14 Nick Clifton <nickc@redhat.com>
	395
	396	* rl78-decode.opc (rl78_decode_opcode): Add 's' operand to movw
	397	instructions that can support stack pointer operations.
	398	* rl78-decode.c: Regenerate.
	399	* rl78-dis.c: Fix display of stack pointer in MOVW based
	400	instructions.
	401
651657fa MW	402	2016-01-14 Matthew Wahab <matthew.wahab@arm.com>
	403
	404	* aarch64-opc.c (aarch64_sys_reg_supported_p): Merge conditionals
	405	testing for RAS support. Add checks for erxfr_el1, erxctlr_el1,
	406	erxtatus_el1 and erxaddr_el1.
	407
105bde57 MW	408	2016-01-12 Matthew Wahab <matthew.wahab@arm.com>
	409
	410	* arm-dis.c (arm_opcodes): Add "esb".
	411	(thumb_opcodes): Likewise.
	412
afa8d405 PB	413	2016-01-11 Peter Bergner <bergner@vnet.ibm.com>
	414
	415	* ppc-opc.c <xscmpnedp>: Delete.
	416	<xvcmpnedp>: Likewise.
	417	<xvcmpnedp.>: Likewise.
	418	<xvcmpnesp>: Likewise.
	419	<xvcmpnesp.>: Likewise.
	420
83c3256e AS	421	2016-01-08 Andreas Schwab <schwab@linux-m68k.org>
	422
	423	PR gas/13050
	424	* m68k-opc.c (moveb, movew): For ISA_B/C only allow #,d(An) in
	425	addition to ISA_A.
	426
6f2750fe AM	427	2016-01-01 Alan Modra <amodra@gmail.com>
	428
	429	Update year range in copyright notice of all files.
	430
3499769a AM	431	For older changes see ChangeLog-2015
	432	\f
	433	Copyright (C) 2016 Free Software Foundation, Inc.
	434
	435	Copying and distribution of this file, with or without modification,
	436	are permitted in any medium without royalty provided the copyright
	437	notice and this notice are preserved.
	438
	439	Local Variables:
	440	mode: change-log
	441	left-margin: 8
	442	fill-column: 74
	443	version-control: never
	444	End: