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Special case NULL when using printf's %s format
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
b4a3689a
NC		 12018-03-13 Nick Clifton <nickc@redhat.com>
2
3 * po/pt_BR.po: Updated Brazilian Portuguese translation.
4
d3d50934
L		 52018-03-08 H.J. Lu <hongjiu.lu@intel.com>
6
7 * i386-opc.tbl: Add Optimize to clr.
8 * i386-tbl.h: Regenerated.
9
bd5dea88
L		 102018-03-08 H.J. Lu <hongjiu.lu@intel.com>
11
12 * i386-gen.c (opcode_modifiers): Remove OldGcc.
13 * i386-opc.h (OldGcc): Removed.
14 (i386_opcode_modifier): Remove oldgcc.
15 * i386-opc.tbl: Remove fsubp, fsubrp, fdivp and fdivrp
16 instructions for old (<= 2.8.1) versions of gcc.
17 * i386-tbl.h: Regenerated.
18
e771e7c9
JB		 192018-03-08 Jan Beulich <jbeulich@suse.com>
20
21 * i386-opc.h (EVEXDYN): New.
22 * i386-opc.tbl: Fold various AVX512VL templates.
23 * i386-tlb.h: Re-generate.
24
ed438a93
JB		 252018-03-08 Jan Beulich <jbeulich@suse.com>
26
27 * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
28 vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
29 vpexpandd, vpexpandq): Fold AFX512VF templates.
30 * i386-tlb.h: Re-generate.
31
454172a9
JB		 322018-03-08 Jan Beulich <jbeulich@suse.com>
33
34 * i386-opc.tbl (vgf2p8affineinvqb, vgf2p8affineqb, vgf2p8mulb):
35 Fold 128- and 256-bit VEX-encoded templates.
36 * i386-tlb.h: Re-generate.
37
36824150
JB		 382018-03-08 Jan Beulich <jbeulich@suse.com>
39
40 * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
41 vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
42 vpexpandd, vpexpandq): Fold AVX512F templates.
43 * i386-tlb.h: Re-generate.
44
e7f5c0a9
JB		 452018-03-08 Jan Beulich <jbeulich@suse.com>
46
47 * i386-opc.tbl (llwpcb, slwpcb, lwpval, lwpins): Fold 32- and
48 64-bit templates. Drop Disp<N>.
49 * i386-tlb.h: Re-generate.
50
25a4277f
JB		 512018-03-08 Jan Beulich <jbeulich@suse.com>
52
53 * i386-opc.tbl (vfmadd*, vfmsub*, vfnmadd*, vfnmsub*): Fold 128-
54 and 256-bit templates.
55 * i386-tlb.h: Re-generate.
56
d2224064
JB		 572018-03-08 Jan Beulich <jbeulich@suse.com>
58
59 * i386-opc.tbl (cmpxchg8b): Add NoRex64.
60 * i386-tlb.h: Re-generate.
61
1b193f0b
JB		 622018-03-08 Jan Beulich <jbeulich@suse.com>
63
64 * i386-opc.tbl (cmpxchg16b, fisttp, fisttpll, bndmov, mwaitx):
65 Drop NoAVX.
66 * i386-tlb.h: Re-generate.
67
f2f6a710
JB		 682018-03-08 Jan Beulich <jbeulich@suse.com>
69
70 * i386-opc.tbl (ldmxcsr, stmxcsr): Add NoAVX.
71 * i386-tlb.h: Re-generate.
72
38e314eb
JB		 732018-03-08 Jan Beulich <jbeulich@suse.com>
74
75 * i386-gen.c (opcode_modifiers): Delete FloatD.
76 * i386-opc.h (FloatD): Delete.
77 (struct i386_opcode_modifier): Delete floatd.
78 * i386-opc.tbl (fadd, fsub, fsubr, fmul, fdiv, fdivr): Replace
79 FloatD by D.
80 * i386-tlb.h: Re-generate.
81
d53e6b98
JB		 822018-03-08 Jan Beulich <jbeulich@suse.com>
83
84 * i386-dis.c (float_reg): Adjust DC and DE fsub*/fdiv* patterns.
85
2907c2f5
JB		 862018-03-08 Jan Beulich <jbeulich@suse.com>
87
88 * i386-opc.tbl (vmovd): Disallow Qword memory operands.
89 * i386-tlb.h: Re-generate.
90
73053c1f
JB		 912018-03-08 Jan Beulich <jbeulich@suse.com>
92
93 * i386-opc.tbl (vcvtpd2ps): Fold AVX 128- and 256-bit memory
94 forms.
95 * i386-tlb.h: Re-generate.
96
52fe4420
AM		 972018-03-07 Alan Modra <amodra@gmail.com>
98
99 * disassemble.c (disassembler): Use bfd_arch_powerpc entry for
100 bfd_arch_rs6000.
101 * disassemble.h (print_insn_rs6000): Delete.
102 * ppc-dis.c (powerpc_init_dialect): Handle rs6000.
103 (disassemble_init_powerpc): Call powerpc_init_dialect for rs6000.
104 (print_insn_rs6000): Delete.
105
a6743a54
AM		 1062018-03-03 Alan Modra <amodra@gmail.com>
107
108 * sysdep.h (opcodes_error_handler): Define.
109 (_bfd_error_handler): Declare.
110 * Makefile.am: Remove stray #.
111 * opc2c.c (main): Remove bogus -l arg handling. Print "DO NOT
112 EDIT" comment.
113 * aarch64-dis.c, * arc-dis.c, * arm-dis.c, * avr-dis.c,
114 * d30v-dis.c, * h8300-dis.c, * mmix-dis.c, * ppc-dis.c,
115 * riscv-dis.c, * s390-dis.c, * sparc-dis.c, * v850-dis.c: Use
116 opcodes_error_handler to print errors. Standardize error messages.
117 * msp430-decode.opc, * nios2-dis.c, * rl78-decode.opc: Likewise,
118 and include opintl.h.
119 * nds32-asm.c: Likewise, and include sysdep.h and opintl.h.
120 * i386-gen.c: Standardize error messages.
121 * msp430-decode.c, * rl78-decode.c, rx-decode.c: Regenerate.
122 * Makefile.in: Regenerate.
123 * epiphany-asm.c, * epiphany-desc.c, * epiphany-dis.c,
124 * epiphany-ibld.c, * fr30-asm.c, * fr30-desc.c, * fr30-dis.c,
125 * fr30-ibld.c, * frv-asm.c, * frv-desc.c, * frv-dis.c, * frv-ibld.c,
126 * frv-opc.c, * ip2k-asm.c, * ip2k-desc.c, * ip2k-dis.c, * ip2k-ibld.c,
127 * iq2000-asm.c, * iq2000-desc.c, * iq2000-dis.c, * iq2000-ibld.c,
128 * lm32-asm.c, * lm32-desc.c, * lm32-dis.c, * lm32-ibld.c,
129 * m32c-asm.c, * m32c-desc.c, * m32c-dis.c, * m32c-ibld.c,
130 * m32r-asm.c, * m32r-desc.c, * m32r-dis.c, * m32r-ibld.c,
131 * mep-asm.c, * mep-desc.c, * mep-dis.c, * mep-ibld.c, * mt-asm.c,
132 * mt-desc.c, * mt-dis.c, * mt-ibld.c, * or1k-asm.c, * or1k-desc.c,
133 * or1k-dis.c, * or1k-ibld.c, * xc16x-asm.c, * xc16x-desc.c,
134 * xc16x-dis.c, * xc16x-ibld.c, * xstormy16-asm.c, * xstormy16-desc.c,
135 * xstormy16-dis.c, * xstormy16-ibld.c: Regenerate.
136
8305403a
L		 1372018-03-01 H.J. Lu <hongjiu.lu@intel.com>
138
139 * * i386-opc.tbl: Add "Optimize" to AVX256 and AVX512
140 vpsub[bwdq] instructions.
141 * i386-tbl.h: Regenerated.
142
e184813f
AM		 1432018-03-01 Alan Modra <amodra@gmail.com>
144
145 * configure.ac (ALL_LINGUAS): Sort.
146 * configure: Regenerate.
147
5b616bef
TP		 1482018-02-27 Thomas Preud'homme <thomas.preudhomme@arm.com>
149
150 * arm-dis.c (print_insn_coprocessor): Replace uses of ARM_FEATURE_COPY
151 macro by assignements.
152
b6f8c7c4
L		 1532018-02-27 H.J. Lu <hongjiu.lu@intel.com>
154
155 PR gas/22871
156 * i386-gen.c (opcode_modifiers): Add Optimize.
157 * i386-opc.h (Optimize): New enum.
158 (i386_opcode_modifier): Add optimize.
159 * i386-opc.tbl: Add "Optimize" to "mov $imm, reg",
160 "sub reg, reg/mem", "test $imm, acc", "test $imm, reg/mem",
161 "and $imm, acc", "and $imm, reg/mem", "xor reg, reg/mem",
162 "movq $imm, reg" and AVX256 and AVX512 versions of vandnps,
163 vandnpd, vpandn, vpandnd, vpandnq, vxorps, vxorpd, vpxor,
164 vpxord and vpxorq.
165 * i386-tbl.h: Regenerated.
166
e95b887f
AM		 1672018-02-26 Alan Modra <amodra@gmail.com>
168
169 * crx-dis.c (getregliststring): Allocate a large enough buffer
170 to silence false positive gcc8 warning.
171
0bccfb29
JW		 1722018-02-22 Shea Levy <shea@shealevy.com>
173
174 * disassemble.c (ARCH_riscv): Define if ARCH_all.
175
6b6b6807
L		 1762018-02-22 H.J. Lu <hongjiu.lu@intel.com>
177
178 * i386-opc.tbl: Add {rex},
179 * i386-tbl.h: Regenerated.
180
75f31665
MR		 1812018-02-20 Maciej W. Rozycki <macro@mips.com>
182
183 * mips16-opc.c (decode_mips16_operand) <'M'>: Remove case.
184 (mips16_opcodes): Replace `M' with `m' for "restore".
185
e207bc53
TP		 1862018-02-19 Thomas Preud'homme <thomas.preudhomme@arm.com>
187
188 * arm-dis.c (thumb_opcodes): Fix BXNS mask.
189
87993319
MR		 1902018-02-13 Maciej W. Rozycki <macro@mips.com>
191
192 * wasm32-dis.c (print_insn_wasm32): Rename `index' local
193 variable to `function_index'.
194
68d20676
NC		 1952018-02-13 Nick Clifton <nickc@redhat.com>
196
197 PR 22823
198 * metag-dis.c (print_fmmov): Double buffer size to avoid warning
199 about truncation of printing.
200
d2159fdc
HW		 2012018-02-12 Henry Wong <henry@stuffedcow.net>
202
203 * mips-opc.c (mips_builtin_opcodes): Correct "sigrie" encoding.
204
f174ef9f
NC		 2052018-02-05 Nick Clifton <nickc@redhat.com>
206
207 * po/pt_BR.po: Updated Brazilian Portuguese translation.
208
be3a8dca
IT		 2092018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
210
211 * i386-dis.c (enum): Add pconfig.
212 * i386-gen.c (cpu_flag_init): Add CPU_PCONFIG_FLAGS.
213 (cpu_flags): Add CpuPCONFIG.
214 * i386-opc.h (enum): Add CpuPCONFIG.
215 (i386_cpu_flags): Add cpupconfig.
216 * i386-opc.tbl: Add PCONFIG instruction.
217 * i386-init.h: Regenerate.
218 * i386-tbl.h: Likewise.
219
3233d7d0
IT		 2202018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
221
222 * i386-dis.c (enum): Add PREFIX_0F09.
223 * i386-gen.c (cpu_flag_init): Add CPU_WBNOINVD_FLAGS.
224 (cpu_flags): Add CpuWBNOINVD.
225 * i386-opc.h (enum): Add CpuWBNOINVD.
226 (i386_cpu_flags): Add cpuwbnoinvd.
227 * i386-opc.tbl: Add WBNOINVD instruction.
228 * i386-init.h: Regenerate.
229 * i386-tbl.h: Likewise.
230
e925c834
JW		 2312018-01-17 Jim Wilson <jimw@sifive.com>
232
233 * riscv-opc.c (riscv_opcodes) <addi>: Use z instead of 0.
234
d777820b
IT		 2352018-01-17 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
236
237 * i386-gen.c (cpu_flag_init): Delete CPU_CET_FLAGS, CpuCET.
238 Add CPU_IBT_FLAGS, CPU_SHSTK_FLAGS, CPY_ANY_IBT_FLAGS,
239 CPU_ANY_SHSTK_FLAGS, CpuIBT, CpuSHSTK.
240 (cpu_flags): Add CpuIBT, CpuSHSTK.
241 * i386-opc.h (enum): Add CpuIBT, CpuSHSTK.
242 (i386_cpu_flags): Add cpuibt, cpushstk.
243 * i386-opc.tbl: Change CpuCET to CpuSHSTK and CpuIBT.
244 * i386-init.h: Regenerate.
245 * i386-tbl.h: Likewise.
246
f6efed01
NC		 2472018-01-16 Nick Clifton <nickc@redhat.com>
248
249 * po/pt_BR.po: Updated Brazilian Portugese translation.
250 * po/de.po: Updated German translation.
251
2721d702
JW		 2522018-01-15 Jim Wilson <jimw@sifive.com>
253
254 * riscv-opc.c (match_c_nop): New.
255 (riscv_opcodes) <addi>: Handle an addi that compresses to c.nop.
256
616dcb87
NC		 2572018-01-15 Nick Clifton <nickc@redhat.com>
258
259 * po/uk.po: Updated Ukranian translation.
260
3957a496
NC		 2612018-01-13 Nick Clifton <nickc@redhat.com>
262
263 * po/opcodes.pot: Regenerated.
264
769c7ea5
NC		 2652018-01-13 Nick Clifton <nickc@redhat.com>
266
267 * configure: Regenerate.
268
faf766e3
NC		 2692018-01-13 Nick Clifton <nickc@redhat.com>
270
271 2.30 branch created.
272
888a89da
IT		 2732018-01-11 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
274
275 * i386-opc.tbl: Remove VL variants for 4FMAPS and 4VNNIW insns.
276 * i386-tbl.h: Regenerate.
277
cbda583a
JB		 2782018-01-10 Jan Beulich <jbeulich@suse.com>
279
280 * i386-opc.tbl (v4fmaddss, v4fnmaddss): Adjust Disp8MemShift.
281 * i386-tbl.h: Re-generate.
282
c9e92278
JB		 2832018-01-10 Jan Beulich <jbeulich@suse.com>
284
285 * i386-opc.tbl (vpcmpeqb, vpcmpleb, vpcmpltb, vpcmpneqb,
286 vpcmpnleb, vpcmpnltb, vpcmpequb, vpcmpleub, vpcmpltub,
287 vpcmpnequb, vpcmpnleub, vpcmpnltub, vpcmpeqw, vpcmplew,
288 vpcmpltw, vpcmpneqw, vpcmpnlew, vpcmpnltw, vpcmpequw, vpcmpleuw,
289 vpcmpltuw, vpcmpnequw, vpcmpnleuw, vpcmpnltuw): Adjust
290 Disp8MemShift of AVX512VL forms.
291 * i386-tbl.h: Re-generate.
292
35fd2b2b
JW		 2932018-01-09 Jim Wilson <jimw@sifive.com>
294
295 * riscv-dis.c (maybe_print_address): If base_reg is zero,
296 then the hi_addr value is zero.
297
91d8b670
JG		 2982018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
299
300 * arm-dis.c (arm_opcodes): Add csdb.
301 (thumb32_opcodes): Add csdb.
302
be2e7d95
JG		 3032018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
304
305 * aarch64-tbl.h (aarch64_opcode_table): Add "csdb".
306 * aarch64-asm-2.c: Regenerate.
307 * aarch64-dis-2.c: Regenerate.
308 * aarch64-opc-2.c: Regenerate.
309
704a705d
L		 3102018-01-08 H.J. Lu <hongjiu.lu@intel.com>
311
312 PR gas/22681
313 * i386-opc.tbl: Properly encode vmovd with Qword memeory operand.
314 Remove AVX512 vmovd with 64-bit operands.
315 * i386-tbl.h: Regenerated.
316
35eeb78f
JW		 3172018-01-05 Jim Wilson <jimw@sifive.com>
318
319 * riscv-dis.c (print_insn_args) <'s'>: Call maybe_print_address for a
320 jalr.
321
219d1afa
AM		 3222018-01-03 Alan Modra <amodra@gmail.com>
323
324 Update year range in copyright notice of all files.
325
1508bbf5
JB		 3262018-01-02 Jan Beulich <jbeulich@suse.com>
327
328 * i386-gen.c (operand_type_init): Restore OPERAND_TYPE_REGYMM
329 and OPERAND_TYPE_REGZMM entries.
330
1e563868 331For older changes see ChangeLog-2017
3499769a 332\f
1e563868 333Copyright (C) 2018 Free Software Foundation, Inc.
3499769a
AM		 334
335Copying and distribution of this file, with or without modification,
336are permitted in any medium without royalty provided the copyright
337notice and this notice are preserved.
338
339Local Variables:
340mode: change-log
341left-margin: 8
342fill-column: 74
343version-control: never
344End:
GDB Binutils - Deliverables
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