2012-07-05 Sean Keys <skeys@ipdatasys.com>
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
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12012-07-30 Nick Clifton <nickc@redhat.com>
2
3 * po/opcodes.pot: Updated template.
4 * po/es.po: Updated Spanish translation.
5 * po/fi.po: Updated Finnish translation.
6
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72012-07-27 Mike Frysinger <vapier@gentoo.org>
8
9 * configure.in (BFD_VERSION): Run bfd/configure --version and
10 parse the output of that.
11 * configure: Regenerate.
12
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132012-07-25 James Lemke <jwlemke@codesourcery.com>
14
15 * ppc-opc.c (powerpc_opcodes): Add/remove PPCVLE for some 32-bit insns.
16
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172012-07-24 Stephan McCamant <smcc@cs.berkeley.edu>
18 Dr David Alan Gilbert <dave@treblig.org>
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19
20 PR binutils/13135
21 * arm-dis.c: Add necessary casts for printing integer values.
22 Use %s when printing string values.
23 * hppa-dis.c: Likewise.
24 * m68k-dis.c: Likewise.
25 * microblaze-dis.c: Likewise.
26 * mips-dis.c: Likewise.
27 * sparc-dis.c: Likewise.
28
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292012-07-19 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
30
31 PR binutils/14355
32 * i386-dis.c (VEX_LEN_0FXOP_08_CC): New.
33 (VEX_LEN_0FXOP_08_CD): Likewise.
34 (VEX_LEN_0FXOP_08_CE): Likewise.
35 (VEX_LEN_0FXOP_08_CF): Likewise.
36 (VEX_LEN_0FXOP_08_EC): Likewise.
37 (VEX_LEN_0FXOP_08_ED): Likewise.
38 (VEX_LEN_0FXOP_08_EE): Likewise.
39 (VEX_LEN_0FXOP_08_EF): Likewise.
40 (xop_table): Fix entries for vpcomb, vpcomw, vpcomd, vpcomq,
41 vpcomub, vpcomuw, vpcomud, vpcomuq.
42 (vex_len_table): Add entries for VEX_LEN_0FXOP_08_CC,
43 VEX_LEN_0FXOP_08_CD, VEX_LEN_0FXOP_08_CE, VEX_LEN_0FXOP_08_CF,
44 VEX_LEN_0FXOP_08_EC, VEX_LEN_0FXOP_08_ED, VEX_LEN_0FXOP_08_EE,
45 VEX_LEN_0FXOP_08_EF.
46
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472012-07-16 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
48
49 * i386-dis.c (PREFIX_0F38F6): New.
50 (prefix_table): Add adcx, adox instructions.
51 (three_byte_table): Use PREFIX_0F38F6.
52 (mod_table): Add rdseed instruction.
53 * i386-gen.c (cpu_flag_init): Add CpuADX, CpuRDSEED, CpuPRFCHW.
54 (cpu_flags): Likewise.
55 * i386-opc.h: Add CpuADX, CpuRDSEED, CpuPRFCHW.
56 (i386_cpu_flags): Add fields cpurdseed, cpuadx, cpuprfchw.
57 * i386-opc.tbl: Add instrcutions adcx, adox, rdseed. Extend
58 prefetchw.
59 * i386-tbl.h: Regenerate.
60 * i386-init.h: Likewise.
61
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622012-07-05 Thomas Schwinge <thomas@codesourcery.com>
63
f4263ca2 64 * mips-dis.c: Remove gratuitous newline.
8b99bf0b 65
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662012-07-02 Roland McGrath <mcgrathr@google.com>
67
68 * i386-opc.tbl: Add RepPrefixOk to nop.
69 * i386-tbl.h: Regenerate.
70
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712012-06-28 Nick Clifton <nickc@redhat.com>
72
73 * po/vi.po: Updated Vietnamese translation.
74
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752012-06-22 Roland McGrath <mcgrathr@google.com>
76
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77 * i386-opc.tbl: Add RepPrefixOk to ret.
78 * i386-tbl.h: Regenerate.
79
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80 * i386-opc.h (RepPrefixOk): New enum constant.
81 (i386_opcode_modifier): New bitfield 'repprefixok'.
82 * i386-gen.c (opcode_modifiers): Add RepPrefixOk.
83 * i386-opc.tbl: Add RepPrefixOk to bsf, bsr, and to all
84 instructions that have IsString.
85 * i386-tbl.h: Regenerate.
86
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872012-06-11 Andreas Schwab <schwab@linux-m68k.org>
88
89 * ppc-opc.c (lvsl, lvebx, isellt, icbt, ldepx, lwepx, lvsr, lvehx)
90 (iselgt, lvewx, iseleq, isel, dcbst, dcbstep, dcbfl, dcbf, lbepx)
91 (lvx, dcbfep, dcbtstls, stvebx, dcbtstlse, stdepx, stwepx, dcbtls)
92 (stvehx, dcbtlse, stvewx, stbepx, icblc, stvx, dcbtstt, dcbtst)
93 (dcbtst, dcbtstep, dcbtt, dcbt, dcbt, lhepx, eciwx, dcbtep)
94 (dcread, lxvdsx, lvxl, dcblc, sthepx, ecowx, dcbi, dcread, icbtls)
95 (stvxl, lxsdx, lfdepx, stxsdx, stfdepx, dcba, dcbal, lxvw4x)
96 (tlbivax, lfdpx, lxvd2x, tlbsrx., stxvw4x, tlbsx, tlbsx., stfdpx)
97 (stfqx, stxvd2x, icbi, icbiep, icread, dcbzep): Change RA to RA0.
98
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992012-05-19 Alan Modra <amodra@gmail.com>
100
101 * ppc-dis.c: Don't include elf32-ppc.h, do include elf/ppc.h.
102 (get_powerpc_dialect): Detect VLE sections from ELF sh_flags.
103
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1042012-05-18 Alan Modra <amodra@gmail.com>
105
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106 * ia64-opc.c: Remove #include "ansidecl.h".
107 * z8kgen.c: Include sysdep.h first.
108
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109 * arc-dis.c: Include sysdep.h first, remove some redundant includes.
110 * bfin-dis.c: Likewise.
111 * i860-dis.c: Likewise.
112 * ia64-dis.c: Likewise.
113 * ia64-gen.c: Likewise.
114 * m68hc11-dis.c: Likewise.
115 * mmix-dis.c: Likewise.
116 * msp430-dis.c: Likewise.
117 * or32-dis.c: Likewise.
118 * rl78-dis.c: Likewise.
119 * rx-dis.c: Likewise.
120 * tic4x-dis.c: Likewise.
121 * tilegx-opc.c: Likewise.
122 * tilepro-opc.c: Likewise.
123 * rx-decode.c: Regenerate.
124
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1252012-05-17 James Lemke <jwlemke@codesourcery.com>
126
127 * ppc-opc.c (powerpc_macros): Add entries for e_extlwi to e_clrlslwi.
128
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1292012-05-17 James Lemke <jwlemke@codesourcery.com>
130
131 * ppc-opc.c (extract_sprg): Use ALLOW8_SPRG to include VLE.
132
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1332012-05-17 Daniel Richard G. <skunk@iskunk.org>
134 Nick Clifton <nickc@redhat.com>
135
136 PR 14072
137 * configure.in: Add check that sysdep.h has been included before
138 any system header files.
139 * configure: Regenerate.
140 * config.in: Regenerate.
141 * sysdep.h: Generate an error if included before config.h.
142 * alpha-opc.c: Include sysdep.h before any other header file.
143 * alpha-dis.c: Likewise.
144 * avr-dis.c: Likewise.
145 * cgen-opc.c: Likewise.
146 * cr16-dis.c: Likewise.
147 * cris-dis.c: Likewise.
148 * crx-dis.c: Likewise.
149 * d10v-dis.c: Likewise.
150 * d10v-opc.c: Likewise.
151 * d30v-dis.c: Likewise.
152 * d30v-opc.c: Likewise.
153 * h8500-dis.c: Likewise.
154 * i370-dis.c: Likewise.
155 * i370-opc.c: Likewise.
156 * m10200-dis.c: Likewise.
157 * m10300-dis.c: Likewise.
158 * micromips-opc.c: Likewise.
159 * mips-opc.c: Likewise.
160 * mips61-opc.c: Likewise.
161 * moxie-dis.c: Likewise.
162 * or32-opc.c: Likewise.
163 * pj-dis.c: Likewise.
164 * ppc-dis.c: Likewise.
165 * ppc-opc.c: Likewise.
166 * s390-dis.c: Likewise.
167 * sh-dis.c: Likewise.
168 * sh64-dis.c: Likewise.
169 * sparc-dis.c: Likewise.
170 * sparc-opc.c: Likewise.
171 * spu-dis.c: Likewise.
172 * tic30-dis.c: Likewise.
173 * tic54x-dis.c: Likewise.
174 * tic80-dis.c: Likewise.
175 * tic80-opc.c: Likewise.
176 * tilegx-dis.c: Likewise.
177 * tilepro-dis.c: Likewise.
178 * v850-dis.c: Likewise.
179 * v850-opc.c: Likewise.
180 * vax-dis.c: Likewise.
181 * w65-dis.c: Likewise.
182 * xgate-dis.c: Likewise.
183 * xtensa-dis.c: Likewise.
184 * rl78-decode.opc: Likewise.
185 * rl78-decode.c: Regenerate.
186 * rx-decode.opc: Likewise.
187 * rx-decode.c: Regenerate.
188
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1892012-05-17 Alan Modra <amodra@gmail.com>
190
191 * ppc_dis.c: Don't include elf/ppc.h.
192
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1932012-05-16 Meador Inge <meadori@codesourcery.com>
194
195 * arm-dis.c (arm_opcodes): Don't disassemble STMFD/LDMIA sp!, {reg}
196 to PUSH/POP {reg}.
197
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1982012-05-15 James Murray <jsm@jsm-net.demon.co.uk>
199 Stephane Carrez <stcarrez@nerim.fr>
200
201 * configure.in: Add S12X and XGATE co-processor support to m68hc11
202 target.
203 * disassemble.c: Likewise.
204 * configure: Regenerate.
205 * m68hc11-dis.c: Make objdump output more consistent, use hex
206 instead of decimal and use 0x prefix for hex.
207 * m68hc11-opc.c: Add S12X and XGATE opcodes.
208
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2092012-05-14 James Lemke <jwlemke@codesourcery.com>
210
211 * ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle.
212 (PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines.
213 (vle_opcd_indices): New array.
214 (lookup_vle): New function.
215 (disassemble_init_powerpc): Revise for second (VLE) opcode table.
216 (print_insn_powerpc): Likewise.
217 * ppc-opc.c: Likewise.
218
2192012-05-14 Catherine Moore <clm@codesourcery.com>
220 Maciej W. Rozycki <macro@codesourcery.com>
221 Rhonda Wittels <rhonda@codesourcery.com>
222 Nathan Froyd <froydnj@codesourcery.com>
223
224 * ppc-opc.c (insert_arx, extract_arx): New functions.
225 (insert_ary, extract_ary): New functions.
226 (insert_li20, extract_li20): New functions.
227 (insert_rx, extract_rx): New functions.
228 (insert_ry, extract_ry): New functions.
229 (insert_sci8, extract_sci8): New functions.
230 (insert_sci8n, extract_sci8n): New functions.
231 (insert_sd4h, extract_sd4h): New functions.
232 (insert_sd4w, extract_sd4w): New functions.
233 (insert_vlesi, extract_vlesi): New functions.
234 (insert_vlensi, extract_vlensi): New functions.
235 (insert_vleui, extract_vleui): New functions.
236 (insert_vleil, extract_vleil): New functions.
237 (BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT.
238 (BI16, BI32, BO32, B8): New.
239 (B15, B24, CRD32, CRS): New.
240 (CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG.
241 (DB, IMM20, RD, Rx, ARX, RY, RZ): New.
242 (ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New.
243 (SH6_MASK): Use PPC_OPSHIFT_INV.
244 (SI8, UI5, OIMM5, UI7, BO16): New.
245 (VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New.
246 (XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV.
247 (ALLOW8_SPRG): New.
248 (insert_sprg, extract_sprg): Check ALLOW8_SPRG.
249 (OPVUP, OPVUP_MASK OPVUP): New
250 (BD8, BD8_MASK, BD8IO, BD8IO_MASK): New.
251 (EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New.
252 (BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New.
253 (BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New.
254 (IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New.
255 (IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New.
256 (SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New.
257 (SE_IM5, SE_IM5_MASK): New.
258 (SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New.
259 (EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New.
260 (BO32DNZ, BO32DZ): New.
261 (NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE.
262 (PPCVLE): New.
263 (powerpc_opcodes): Add new VLE instructions. Update existing
264 instruction to include PPCVLE if supported.
265 * ppc-dis.c (ppc_opts): Add vle entry.
266 (get_powerpc_dialect): New function.
267 (powerpc_init_dialect): VLE support.
268 (print_insn_big_powerpc): Call get_powerpc_dialect.
269 (print_insn_little_powerpc): Likewise.
270 (operand_value_powerpc): Handle negative shift counts.
271 (print_insn_powerpc): Handle 2-byte instruction lengths.
272
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2732012-05-11 Daniel Richard G. <skunk@iskunk.org>
274
275 PR binutils/14028
276 * configure.in: Invoke ACX_HEADER_STRING.
277 * configure: Regenerate.
278 * config.in: Regenerate.
279 * sysdep.h: If STRINGS_WITH_STRING is defined then include both
280 string.h and strings.h.
281
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2822012-05-11 Nick Clifton <nickc@redhat.com>
283
284 PR binutils/14006
285 * arm-dis.c (print_insn): Fix detection of instruction mode in
286 files containing multiple executable sections.
287
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2882012-05-03 Sean Keys <skeys@ipdatasys.com>
289
290 * Makefile.in, configure: regenerate
291 * disassemble.c (disassembler): Recognize ARCH_XGATE.
292 * xgate-dis.c (read_memory, print_insn, print_insn_xgate):
293 New functions.
294 * configure.in: Recognize xgate.
295 * xgate-dis.c, xgate-opc.c: New files for support of xgate
296 * Makefile.am (CFILES, ALL_MACHINES): New files for disassembly
297 and opcode generation for xgate.
298
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2992012-04-30 DJ Delorie <dj@redhat.com>
300
301 * rx-decode.opc (MOV): Do not sign-extend immediates which are
302 already the maximum bit size.
303 * rx-decode.c: Regenerate.
304
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3052012-04-27 David S. Miller <davem@davemloft.net>
306
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307 * sparc-dis.c (v9a_asr_reg_names): Add 'cfr'.
308 * sparc-opc.c (sparc_opcodes): Add rd/wr cases for %cfr.
309
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310 * sparc-opc.c (sparc_opcodes): Add 'wr X, %pause' and 'pause'.
311 * sparc-dis.c (v9a_asr_reg_names): Add 'pause'.
312
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313 * sparc-opc.c (CBCOND): New define.
314 (CBCOND_XCC): Likewise.
315 (cbcond): New helper macro.
316 (sparc_opcodes): Add compare-and-branch instructions.
317
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318 * sparc-dis.c (print_insn_sparc): Handle ')'.
319 * sparc-opc.c (sparc_opcodes): Add crypto instructions.
320
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321 * sparc-opc.c (sparc_opcodes): Rework table to put HWCAP values
322 into new struct sparc_opcode 'hwcaps' field instead of 'flags'.
323
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3242012-04-12 David S. Miller <davem@davemloft.net>
325
326 * sparc-dis.c (X_DISP10): Define.
327 (print_insn_sparc): Handle '='.
328
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3292012-04-01 Mike Frysinger <vapier@gentoo.org>
330
331 * bfin-dis.c (fmtconst): Replace decimal handling with a single
332 sprintf call and the '*' field width.
333
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3342012-03-23 Maxim Kuvyrkov <maxim@codesourcery.com>
335
336 * mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.
337
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3382012-03-16 Alan Modra <amodra@gmail.com>
339
340 * ppc-dis.c (PPC_OPC_SEGS, PPC_OP_TO_SEG): Delete.
341 (powerpc_opcd_indices): Bump array size.
342 (disassemble_init_powerpc): Set powerpc_opcd_indices entries
343 corresponding to unused opcodes to following entry.
344 (lookup_powerpc): New function, extracted and optimised from..
345 (print_insn_powerpc): ..here.
346
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3472012-03-15 Alan Modra <amodra@gmail.com>
348 James Lemke <jwlemke@codesourcery.com>
349
350 * disassemble.c (disassemble_init_for_target): Handle ppc init.
351 * ppc-dis.c (private): New var.
352 (powerpc_init_dialect): Don't return calloc failure, instead use
353 private.
354 (PPC_OPCD_SEGS, PPC_OP_TO_SEG): Define.
355 (powerpc_opcd_indices): New array.
356 (disassemble_init_powerpc): New function.
357 (print_insn_big_powerpc): Don't init dialect here.
358 (print_insn_little_powerpc): Likewise.
359 (print_insn_powerpc): Start search using powerpc_opcd_indices.
360
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3612012-03-10 Edmar Wienskoski <edmar@freescale.com>
362
363 * ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
364 * ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
365 (PPCVEC2, PPCTMR, E6500): New short names.
366 (powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
367 mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
368 lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
369 lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
370 lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
371 optional operands on sync instruction for E6500 target.
372
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3732012-03-08 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
374
375 * s390-opc.txt: Set instruction type of pku to SS_L2RDRD.
376
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3772012-02-27 Alan Modra <amodra@gmail.com>
378
379 * mt-dis.c: Regenerate.
380
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3812012-02-27 Alan Modra <amodra@gmail.com>
382
383 * v850-opc.c (extract_v8): Rearrange to make it obvious this
384 is the inverse of corresponding insert function.
385 (extract_d22, extract_u9, extract_r4): Likewise.
386 (extract_d9): Correct sign extension.
387 (extract_d16_15): Don't assume "long" is 32 bits, and don't
388 rely on implementation defined behaviour for shift right of
389 signed types.
390 (extract_d16_16, extract_d17_16, extract_i9): Likewise.
391 (extract_d23): Likewise, and correct mask.
392
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3932012-02-27 Alan Modra <amodra@gmail.com>
394
395 * crx-dis.c (print_arg): Mask constant to 32 bits.
396 * crx-opc.c (cst4_map): Use int array.
397
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3982012-02-27 Alan Modra <amodra@gmail.com>
399
400 * arc-dis.c (BITS): Don't use shifts to mask off bits.
401 (FIELDD): Sign extend with xor,sub.
402
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4032012-02-25 Walter Lee <walt@tilera.com>
404
405 * tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
406 * tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
407 TILEPRO_OPC_LW_TLS_SN.
408
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4092012-02-21 H.J. Lu <hongjiu.lu@intel.com>
410
411 * i386-opc.h (HLEPrefixNone): New.
412 (HLEPrefixLock): Likewise.
413 (HLEPrefixAny): Likewise.
414 (HLEPrefixRelease): Likewise.
415
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4162012-02-08 H.J. Lu <hongjiu.lu@intel.com>
417
418 * i386-dis.c (HLE_Fixup1): New.
419 (HLE_Fixup2): Likewise.
420 (HLE_Fixup3): Likewise.
421 (Ebh1): Likewise.
422 (Evh1): Likewise.
423 (Ebh2): Likewise.
424 (Evh2): Likewise.
425 (Ebh3): Likewise.
426 (Evh3): Likewise.
427 (MOD_C6_REG_7): Likewise.
428 (MOD_C7_REG_7): Likewise.
429 (RM_C6_REG_7): Likewise.
430 (RM_C7_REG_7): Likewise.
431 (XACQUIRE_PREFIX): Likewise.
432 (XRELEASE_PREFIX): Likewise.
433 (dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
434 cmpxchg, dec, inc, neg, not, or, sbb, sub, xor and xadd. Use
435 Ebh2/Evh2 on xchg. Use Ebh3/Evh3 on mov.
436 (reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
437 not, or, sbb, sub and xor. Use Ebh3/Evh3 on mov. Use
438 MOD_C6_REG_7 and MOD_C7_REG_7.
439 (mod_table): Add MOD_C6_REG_7 and MOD_C7_REG_7.
440 (rm_table): Add RM_C6_REG_7 and RM_C7_REG_7. Add xend and
441 xtest.
442 (prefix_name): Handle XACQUIRE_PREFIX and XRELEASE_PREFIX.
443 (CMPXCHG8B_Fixup): Handle HLE prefix on cmpxchg8b.
444
445 * i386-gen.c (cpu_flag_init): Add CPU_HLE_FLAGS and
446 CPU_RTM_FLAGS.
447 (cpu_flags): Add CpuHLE and CpuRTM.
448 (opcode_modifiers): Add HLEPrefixOk.
449
450 * i386-opc.h (CpuHLE): New.
451 (CpuRTM): Likewise.
452 (HLEPrefixOk): Likewise.
453 (i386_cpu_flags): Add cpuhle and cpurtm.
454 (i386_opcode_modifier): Add hleprefixok.
455
456 * i386-opc.tbl: Add HLEPrefixOk=3 to mov. Add HLEPrefixOk to
457 add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
458 sbb, sub, xor and xadd. Add HLEPrefixOk=2 to xchg with memory
459 operand. Add xacquire, xrelease, xabort, xbegin, xend and
460 xtest.
461 * i386-init.h: Regenerated.
462 * i386-tbl.h: Likewise.
463
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4642012-01-24 DJ Delorie <dj@redhat.com>
465
466 * rl78-decode.opc (rl78_decode_opcode): Add NOT1.
467 * rl78-decode.c: Regenerate.
468
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4692012-01-17 James Murray <jsm@jsm-net.demon.co.uk>
470
471 PR binutils/10173
472 * cr16-dis.c (print_arg): Test symtab_size not num_symbols.
473
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4742012-01-17 Andreas Schwab <schwab@linux-m68k.org>
475
476 * m68k-opc.c (m68k_opcodes): Fix entries for pmove with BADx/BACx
477 register and move them after pmove with PSR/PCSR register.
478
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4792012-01-13 H.J. Lu <hongjiu.lu@intel.com>
480
481 * i386-dis.c (mod_table): Add vmfunc.
482
483 * i386-gen.c (cpu_flag_init): Add CPU_VMFUNC_FLAGS.
484 (cpu_flags): CpuVMFUNC.
485
486 * i386-opc.h (CpuVMFUNC): New.
487 (i386_cpu_flags): Add cpuvmfunc.
488
489 * i386-opc.tbl: Add vmfunc.
490 * i386-init.h: Regenerated.
491 * i386-tbl.h: Likewise.
5011093d 492
23e1d329 493For older changes see ChangeLog-2011
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494\f
495Local Variables:
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496mode: change-log
497left-margin: 8
498fill-column: 74
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499version-control: never
500End:
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