[deliverable/binutils-gdb.git] / opcodes / ChangeLog

2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-dis.c (find_format): Check for extension flags.
	(print_flags): New function.
	(print_insn_arc): Update for .extCondCode, .extCoreRegister and
	.extAuxRegister.
	* arc-ext.c (arcExtMap_coreRegName): Use
	LAST_EXTENSION_CORE_REGISTER.
	(arcExtMap_coreReadWrite): Likewise.
	(dump_ARC_extmap): Update printing.
	* arc-opc.c (arc_flag_classes): Add F_CLASS_EXTEND flag.
	(arc_aux_regs): Add cpu field.
	* arc-regs.h: Add cpu field, lower case name aux registers.

2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-tbl.h: Add rtsc, sleep with no arguments.

2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-opc.c (flags_none, flags_f, flags_cc, flags_ccf):
	Initialize.
	(arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
	(arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
	(arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
	(arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
	(arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
	(arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
	(arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
	(arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
	(arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
	(arc_opcode arc_opcodes): Null terminate the array.
	(arc_num_opcodes): Remove.
	* arc-ext.h (INSERT_XOP): Define.
	(extInstruction_t): Likewise.
	(arcExtMap_instName): Delete.
	(arcExtMap_insn): New function.
	(arcExtMap_genOpcode): Likewise.
	* arc-ext.c (ExtInstruction): Remove.
	(create_map): Zero initialize instruction fields.
	(arcExtMap_instName): Remove.
	(arcExtMap_insn): New function.
	(dump_ARC_extmap): More info while debuging.
	(arcExtMap_genOpcode): New function.
	* arc-dis.c (find_format): New function.
	(print_insn_arc): Use find_format.
	(arc_get_disassembler): Enable dump_ARC_extmap only when
	debugging.

2016-04-11  Maciej W. Rozycki  <macro@imgtec.com>

	* mips-dis.c (print_mips16_insn_arg): Mask unused extended
	instruction bits out.

2016-04-07  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add schd, sync, and hwschd instructions.
	* arc-opc.c (arc_flag_operands): Add new flags.
	(arc_flag_classes): Add new classes.

2016-04-07  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-opc.c (arc_opcodes): Extend comment to discus table layout.

2016-04-05  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add movbi, decode1, fbset, fbclear, encode0,
	encode1, rflt, crc16, and crc32 instructions.
	* arc-opc.c (arc_flag_operands): Add F_NPS_R.
	(arc_flag_classes): Add C_NPS_R.
	(insert_nps_bitop_size_2b): New function.
	(extract_nps_bitop_size_2b): Likewise.
	(insert_nps_bitop_uimm8): Likewise.
	(extract_nps_bitop_uimm8): Likewise.
	(arc_operands): Add new operand entries.

2016-04-05  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-regs.h: Add a new subclass field.  Add double assist
	accumulator register values.
	* arc-tbl.h: Use DPA subclass to mark the double assist
	instructions.  Use DPX/SPX subclas to mark the FPX instructions.
	* arc-opc.c (RSP): Define instead of SP.
	(arc_aux_regs): Add the subclass field.

2016-04-05  Jiong Wang  <jiong.wang@arm.com>

	* arm-dis.c: Support FP16 vmul, vmla, vmls (by scalar).

2016-03-31  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-opc.c (arc_operands): Fix operand flags for NPS_R_DST, and
	NPS_R_SRC1.

2016-03-30  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add a header comment, and fix some whitespace
	issues.  No functional changes.

2016-03-30  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-regs.h (IC_RAM_ADDRESS, IC_TAG, IC_WP, IC_DATA, CONTROL0)
	(AX2, AY2, MX2, MY2, AY0, AY1, DC_RAM_ADDR, DC_TAG, CONTROL1)
	(RTT): Remove duplicate.
	(LCDINSTR, LCDDATA, LCDSTAT, CC_*, PCT_COUNT*, PCT_SNAP*)
	(PCT_CONFIG*): Remove.
	(D1L, D1H, D2H, D2L): Define.

2016-03-29  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-ext-tbl.h (dsp_fp_i2flt): Fix typo.

2016-03-29  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-tbl.h (invld07): Remove.
	* arc-ext-tbl.h: New file.
	* arc-dis.c (FIELDA, FIELDB, FIELDC): Remove.
	* arc-opc.c (arc_opcodes): Add ext-tbl include.

2016-03-24  Jan Kratochvil  <jan.kratochvil@redhat.com>

	Fix -Wstack-usage warnings.
	* aarch64-dis.c (print_operands): Substitute size.
	* aarch64-opc.c (print_register_offset_address): Substitute tblen.

2016-03-22  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* sparc-opc.c (sparc_opcodes): Reorder entries for `rd' in order
	to get a proper diagnostic when an invalid ASR register is used.

2016-03-22  Nick Clifton  <nickc@redhat.com>

	* configure: Regenerate.

2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: New file.
	* arc-opc.c: Add top level comment.
	(insert_nps_3bit_dst): New function.
	(extract_nps_3bit_dst): New function.
	(insert_nps_3bit_src2): New function.
	(extract_nps_3bit_src2): New function.
	(insert_nps_bitop_size): New function.
	(extract_nps_bitop_size): New function.
	(arc_flag_operands): Add nps400 entries.
	(arc_flag_classes): Add nps400 entries.
	(arc_operands): Add nps400 entries.
	(arc_opcodes): Add nps400 include.

2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-opc.c (arc_flag_classes): Convert all flag classes to use
	the new class enum values.

2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-dis.c (print_insn_arc): Handle nps400.

2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-opc.c (BASE): Delete.

2016-03-18  Nick Clifton  <nickc@redhat.com>

	PR target/19721
	* aarch64-tbl.h (aarch64_opcode_table): Fix type of second operand
	of MOV insn that aliases an ORR insn.

2016-03-16  Jiong Wang  <jiong.wang@arm.com>

	* arm-dis.c (neon_opcodes): Support new FP16 instructions.

2016-03-07  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>

	* mcore-opc.h: Add const qualifiers.
	* microblaze-opc.h (struct op_code_struct): Likewise.
	* sh-opc.h: Likewise.
	* tic4x-dis.c (tic4x_print_indirect): Likewise.
	(tic4x_print_op): Likewise.

2016-03-02  Alan Modra  <amodra@gmail.com>

	* or1k-desc.h: Regenerate.
	* fr30-ibld.c: Regenerate.
	* rl78-decode.c: Regenerate.

2016-03-01  Nick Clifton  <nickc@redhat.com>

	PR target/19747
	* rl78-dis.c (print_insn_rl78_common): Fix typo.

2016-02-24  Renlin Li  <renlin.li@arm.com>

	* arm-dis.c (coprocessor_opcodes): Add fp16 instruction entries.
	(print_insn_coprocessor): Support fp16 instructions.

2016-02-24  Renlin Li  <renlin.li@arm.com>

	* arm-dis.c (print_insn_coprocessor): Fix mask for vsel, vmaxnm,
	vminnm, vrint(mpna).

2016-02-24  Renlin Li  <renlin.li@arm.com>

	* arm-dis.c (print_insn_coprocessor): Check co-processor number for
	cpd/cpd2, mcr/mcr2, mrc/mrc2, ldc/ldc2, stc/stc2.

2016-02-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (print_insn): Parenthesize expression to prevent
	truncated addresses.
	(OP_J): Likewise.

2016-02-10  Claudiu Zissulescu  <claziss@synopsys.com>
	    Janek van Oirschot  <jvanoirs@synopsys.com>

	* arc-opc.c (arc_relax_opcodes, arc_num_relax_opcodes): New
	variable.

2016-02-04  Nick Clifton  <nickc@redhat.com>

	PR target/19561
	* msp430-dis.c (print_insn_msp430): Add a special case for
	decoding an RRC instruction with the ZC bit set in the extension
	word.

2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>

	* cgen-ibld.in (insert_normal): Rework calculation of shift.
	* epiphany-ibld.c: Regenerate.
	* fr30-ibld.c: Regenerate.
	* frv-ibld.c: Regenerate.
	* ip2k-ibld.c: Regenerate.
	* iq2000-ibld.c: Regenerate.
	* lm32-ibld.c: Regenerate.
	* m32c-ibld.c: Regenerate.
	* m32r-ibld.c: Regenerate.
	* mep-ibld.c: Regenerate.
	* mt-ibld.c: Regenerate.
	* or1k-ibld.c: Regenerate.
	* xc16x-ibld.c: Regenerate.
	* xstormy16-ibld.c: Regenerate.

2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>

	* epiphany-dis.c: Regenerated from latest cpu files.

2016-02-01  Michael McConville  <mmcco@mykolab.com>

	* cgen-dis.c (count_decodable_bits): Use unsigned value for mask
	test bit.

2016-01-25  Renlin Li  <renlin.li@arm.com>

	* arm-dis.c (mapping_symbol_for_insn): New function.
	(find_ifthen_state): Call mapping_symbol_for_insn().

2016-01-20  Matthew Wahab  <matthew.wahab@arm.com>

	* aarch64-opc.c (operand_general_constraint_met_p): Check validity
	of MSR UAO immediate operand.

2016-01-18  Maciej W. Rozycki  <macro@imgtec.com>

	* mips-dis.c (print_insn_micromips): Remove 48-bit microMIPS
	instruction support.

2016-01-17  Alan Modra  <amodra@gmail.com>

	* configure: Regenerate.

2016-01-14  Nick Clifton  <nickc@redhat.com>

	* rl78-decode.opc (rl78_decode_opcode): Add 's' operand to movw
	instructions that can support stack pointer operations.
	* rl78-decode.c: Regenerate.
	* rl78-dis.c: Fix display of stack pointer in MOVW based
	instructions.

2016-01-14  Matthew Wahab  <matthew.wahab@arm.com>

	* aarch64-opc.c (aarch64_sys_reg_supported_p): Merge conditionals
	testing for RAS support.  Add checks for erxfr_el1, erxctlr_el1,
	erxtatus_el1 and erxaddr_el1.

2016-01-12  Matthew Wahab  <matthew.wahab@arm.com>

	* arm-dis.c (arm_opcodes): Add "esb".
	(thumb_opcodes): Likewise.

2016-01-11  Peter Bergner <bergner@vnet.ibm.com>

	* ppc-opc.c <xscmpnedp>: Delete.
	<xvcmpnedp>: Likewise.
	<xvcmpnedp.>: Likewise.
	<xvcmpnesp>: Likewise.
	<xvcmpnesp.>: Likewise.

2016-01-08  Andreas Schwab  <schwab@linux-m68k.org>

	PR gas/13050
	* m68k-opc.c (moveb, movew): For ISA_B/C only allow #,d(An) in
	addition to ISA_A.

2016-01-01  Alan Modra  <amodra@gmail.com>

	Update year range in copyright notice of all files.

For older changes see ChangeLog-2015
\f
Copyright (C) 2016 Free Software Foundation, Inc.

Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved.

Local Variables:
mode: change-log
left-margin: 8
fill-column: 74
version-control: never
End:
Commit	Line	Data
f36e33da CZ	1	2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
	2
	3	* arc-dis.c (find_format): Check for extension flags.
	4	(print_flags): New function.
	5	(print_insn_arc): Update for .extCondCode, .extCoreRegister and
	6	.extAuxRegister.
	7	* arc-ext.c (arcExtMap_coreRegName): Use
	8	LAST_EXTENSION_CORE_REGISTER.
	9	(arcExtMap_coreReadWrite): Likewise.
	10	(dump_ARC_extmap): Update printing.
	11	* arc-opc.c (arc_flag_classes): Add F_CLASS_EXTEND flag.
	12	(arc_aux_regs): Add cpu field.
	13	* arc-regs.h: Add cpu field, lower case name aux registers.
	14
1c2e355e CZ	15	2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
	16
	17	* arc-tbl.h: Add rtsc, sleep with no arguments.
	18
b99747ae CZ	19	2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
	20
	21	* arc-opc.c (flags_none, flags_f, flags_cc, flags_ccf):
	22	Initialize.
	23	(arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
	24	(arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
	25	(arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
	26	(arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
	27	(arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
	28	(arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
	29	(arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
	30	(arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
	31	(arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
	32	(arc_opcode arc_opcodes): Null terminate the array.
	33	(arc_num_opcodes): Remove.
	34	* arc-ext.h (INSERT_XOP): Define.
	35	(extInstruction_t): Likewise.
	36	(arcExtMap_instName): Delete.
	37	(arcExtMap_insn): New function.
	38	(arcExtMap_genOpcode): Likewise.
	39	* arc-ext.c (ExtInstruction): Remove.
	40	(create_map): Zero initialize instruction fields.
	41	(arcExtMap_instName): Remove.
	42	(arcExtMap_insn): New function.
	43	(dump_ARC_extmap): More info while debuging.
	44	(arcExtMap_genOpcode): New function.
	45	* arc-dis.c (find_format): New function.
	46	(print_insn_arc): Use find_format.
	47	(arc_get_disassembler): Enable dump_ARC_extmap only when
	48	debugging.
	49
92708cec MR	50	2016-04-11 Maciej W. Rozycki <macro@imgtec.com>
	51
	52	* mips-dis.c (print_mips16_insn_arg): Mask unused extended
	53	instruction bits out.
	54
a42a4f84 AB	55	2016-04-07 Andrew Burgess <andrew.burgess@embecosm.com>
	56
	57	* arc-nps400-tbl.h: Add schd, sync, and hwschd instructions.
	58	* arc-opc.c (arc_flag_operands): Add new flags.
	59	(arc_flag_classes): Add new classes.
	60
1328504b AB	61	2016-04-07 Andrew Burgess <andrew.burgess@embecosm.com>
	62
	63	* arc-opc.c (arc_opcodes): Extend comment to discus table layout.
	64
820f03ff AB	65	2016-04-05 Andrew Burgess <andrew.burgess@embecosm.com>
	66
	67	* arc-nps400-tbl.h: Add movbi, decode1, fbset, fbclear, encode0,
	68	encode1, rflt, crc16, and crc32 instructions.
	69	* arc-opc.c (arc_flag_operands): Add F_NPS_R.
	70	(arc_flag_classes): Add C_NPS_R.
	71	(insert_nps_bitop_size_2b): New function.
	72	(extract_nps_bitop_size_2b): Likewise.
	73	(insert_nps_bitop_uimm8): Likewise.
	74	(extract_nps_bitop_uimm8): Likewise.
	75	(arc_operands): Add new operand entries.
	76
8ddf6b2a CZ	77	2016-04-05 Claudiu Zissulescu <claziss@synopsys.com>
8ddf6b2a CZ	78
b99747ae CZ	79	* arc-regs.h: Add a new subclass field. Add double assist
	80	accumulator register values.
	81	* arc-tbl.h: Use DPA subclass to mark the double assist
	82	instructions. Use DPX/SPX subclas to mark the FPX instructions.
	83	* arc-opc.c (RSP): Define instead of SP.
	84	(arc_aux_regs): Add the subclass field.
8ddf6b2a	85
589a7d88 JW	86	2016-04-05 Jiong Wang <jiong.wang@arm.com>
	87
	88	* arm-dis.c: Support FP16 vmul, vmla, vmls (by scalar).
	89
0a191de9	90	2016-03-31 Andrew Burgess <andrew.burgess@embecosm.com>
2cce10e7 AB	91
	92	* arc-opc.c (arc_operands): Fix operand flags for NPS_R_DST, and
	93	NPS_R_SRC1.
	94
0a106562 AB	95	2016-03-30 Andrew Burgess <andrew.burgess@embecosm.com>
	96
	97	* arc-nps400-tbl.h: Add a header comment, and fix some whitespace
	98	issues. No functional changes.
	99
bd05ac5f CZ	100	2016-03-30 Claudiu Zissulescu <claziss@synopsys.com>
bd05ac5f CZ	101
b99747ae CZ	102	* arc-regs.h (IC_RAM_ADDRESS, IC_TAG, IC_WP, IC_DATA, CONTROL0)
	103	(AX2, AY2, MX2, MY2, AY0, AY1, DC_RAM_ADDR, DC_TAG, CONTROL1)
	104	(RTT): Remove duplicate.
	105	(LCDINSTR, LCDDATA, LCDSTAT, CC_, PCT_COUNT, PCT_SNAP*)
	106	(PCT_CONFIG*): Remove.
	107	(D1L, D1H, D2H, D2L): Define.
bd05ac5f	108
9885948f CZ	109	2016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
9885948f CZ	110
b99747ae	111	* arc-ext-tbl.h (dsp_fp_i2flt): Fix typo.
9885948f	112
f2dd8838 CZ	113	2016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
f2dd8838 CZ	114
b99747ae CZ	115	* arc-tbl.h (invld07): Remove.
	116	* arc-ext-tbl.h: New file.
	117	* arc-dis.c (FIELDA, FIELDB, FIELDC): Remove.
	118	* arc-opc.c (arc_opcodes): Add ext-tbl include.
f2dd8838	119
0d2f91fe JK	120	2016-03-24 Jan Kratochvil <jan.kratochvil@redhat.com>
	121
	122	Fix -Wstack-usage warnings.
	123	* aarch64-dis.c (print_operands): Substitute size.
	124	* aarch64-opc.c (print_register_offset_address): Substitute tblen.
	125
a6b71f42 JM	126	2016-03-22 Jose E. Marchesi <jose.marchesi@oracle.com>
	127
	128	* sparc-opc.c (sparc_opcodes): Reorder entries for `rd' in order
	129	to get a proper diagnostic when an invalid ASR register is used.
	130
9780e045 NC	131	2016-03-22 Nick Clifton <nickc@redhat.com>
	132
	133	* configure: Regenerate.
	134
e23e8ebe AB	135	2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
	136
	137	* arc-nps400-tbl.h: New file.
	138	* arc-opc.c: Add top level comment.
	139	(insert_nps_3bit_dst): New function.
	140	(extract_nps_3bit_dst): New function.
	141	(insert_nps_3bit_src2): New function.
	142	(extract_nps_3bit_src2): New function.
	143	(insert_nps_bitop_size): New function.
	144	(extract_nps_bitop_size): New function.
	145	(arc_flag_operands): Add nps400 entries.
	146	(arc_flag_classes): Add nps400 entries.
	147	(arc_operands): Add nps400 entries.
	148	(arc_opcodes): Add nps400 include.
	149
1ae8ab47 AB	150	2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
	151
	152	* arc-opc.c (arc_flag_classes): Convert all flag classes to use
	153	the new class enum values.
	154
8699fc3e AB	155	2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
	156
	157	* arc-dis.c (print_insn_arc): Handle nps400.
	158
24740d83 AB	159	2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
	160
	161	* arc-opc.c (BASE): Delete.
	162
8678914f NC	163	2016-03-18 Nick Clifton <nickc@redhat.com>
	164
	165	PR target/19721
	166	* aarch64-tbl.h (aarch64_opcode_table): Fix type of second operand
	167	of MOV insn that aliases an ORR insn.
	168
cc933301 JW	169	2016-03-16 Jiong Wang <jiong.wang@arm.com>
	170
	171	* arm-dis.c (neon_opcodes): Support new FP16 instructions.
	172
f86f5863 TS	173	2016-03-07 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
	174
	175	* mcore-opc.h: Add const qualifiers.
	176	* microblaze-opc.h (struct op_code_struct): Likewise.
	177	* sh-opc.h: Likewise.
	178	* tic4x-dis.c (tic4x_print_indirect): Likewise.
	179	(tic4x_print_op): Likewise.
	180
62de1c63 AM	181	2016-03-02 Alan Modra <amodra@gmail.com>
62de1c63 AM	182
d11698cd	183	* or1k-desc.h: Regenerate.
62de1c63	184	* fr30-ibld.c: Regenerate.
c697cf0b	185	* rl78-decode.c: Regenerate.
62de1c63	186
020efce5 NC	187	2016-03-01 Nick Clifton <nickc@redhat.com>
	188
	189	PR target/19747
	190	* rl78-dis.c (print_insn_rl78_common): Fix typo.
	191
b0c11777 RL	192	2016-02-24 Renlin Li <renlin.li@arm.com>
	193
	194	* arm-dis.c (coprocessor_opcodes): Add fp16 instruction entries.
	195	(print_insn_coprocessor): Support fp16 instructions.
	196
3e309328 RL	197	2016-02-24 Renlin Li <renlin.li@arm.com>
	198
	199	* arm-dis.c (print_insn_coprocessor): Fix mask for vsel, vmaxnm,
	200	vminnm, vrint(mpna).
	201
8afc7bea RL	202	2016-02-24 Renlin Li <renlin.li@arm.com>
	203
	204	* arm-dis.c (print_insn_coprocessor): Check co-processor number for
	205	cpd/cpd2, mcr/mcr2, mrc/mrc2, ldc/ldc2, stc/stc2.
	206
4fd7268a L	207	2016-02-15 H.J. Lu <hongjiu.lu@intel.com>
	208
	209	* i386-dis.c (print_insn): Parenthesize expression to prevent
	210	truncated addresses.
	211	(OP_J): Likewise.
	212
4670103e CZ	213	2016-02-10 Claudiu Zissulescu <claziss@synopsys.com>
	214	Janek van Oirschot <jvanoirs@synopsys.com>
	215
b99747ae CZ	216	* arc-opc.c (arc_relax_opcodes, arc_num_relax_opcodes): New
b99747ae CZ	217	variable.
4670103e	218
c1d9289f NC	219	2016-02-04 Nick Clifton <nickc@redhat.com>
	220
	221	PR target/19561
	222	* msp430-dis.c (print_insn_msp430): Add a special case for
	223	decoding an RRC instruction with the ZC bit set in the extension
	224	word.
	225
a143b004 AB	226	2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
	227
	228	* cgen-ibld.in (insert_normal): Rework calculation of shift.
	229	* epiphany-ibld.c: Regenerate.
	230	* fr30-ibld.c: Regenerate.
	231	* frv-ibld.c: Regenerate.
	232	* ip2k-ibld.c: Regenerate.
	233	* iq2000-ibld.c: Regenerate.
	234	* lm32-ibld.c: Regenerate.
	235	* m32c-ibld.c: Regenerate.
	236	* m32r-ibld.c: Regenerate.
	237	* mep-ibld.c: Regenerate.
	238	* mt-ibld.c: Regenerate.
	239	* or1k-ibld.c: Regenerate.
	240	* xc16x-ibld.c: Regenerate.
	241	* xstormy16-ibld.c: Regenerate.
	242
b89807c6 AB	243	2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
	244
	245	* epiphany-dis.c: Regenerated from latest cpu files.
	246
d8c823c8 MM	247	2016-02-01 Michael McConville <mmcco@mykolab.com>
	248
	249	* cgen-dis.c (count_decodable_bits): Use unsigned value for mask
	250	test bit.
	251
5bc5ae88 RL	252	2016-01-25 Renlin Li <renlin.li@arm.com>
	253
	254	* arm-dis.c (mapping_symbol_for_insn): New function.
	255	(find_ifthen_state): Call mapping_symbol_for_insn().
	256
0bff6e2d MW	257	2016-01-20 Matthew Wahab <matthew.wahab@arm.com>
	258
	259	* aarch64-opc.c (operand_general_constraint_met_p): Check validity
	260	of MSR UAO immediate operand.
	261
100b4f2e MR	262	2016-01-18 Maciej W. Rozycki <macro@imgtec.com>
	263
	264	* mips-dis.c (print_insn_micromips): Remove 48-bit microMIPS
	265	instruction support.
	266
5c14705f AM	267	2016-01-17 Alan Modra <amodra@gmail.com>
	268
	269	* configure: Regenerate.
	270
4d82fe66 NC	271	2016-01-14 Nick Clifton <nickc@redhat.com>
	272
	273	* rl78-decode.opc (rl78_decode_opcode): Add 's' operand to movw
	274	instructions that can support stack pointer operations.
	275	* rl78-decode.c: Regenerate.
	276	* rl78-dis.c: Fix display of stack pointer in MOVW based
	277	instructions.
	278
651657fa MW	279	2016-01-14 Matthew Wahab <matthew.wahab@arm.com>
	280
	281	* aarch64-opc.c (aarch64_sys_reg_supported_p): Merge conditionals
	282	testing for RAS support. Add checks for erxfr_el1, erxctlr_el1,
	283	erxtatus_el1 and erxaddr_el1.
	284
105bde57 MW	285	2016-01-12 Matthew Wahab <matthew.wahab@arm.com>
	286
	287	* arm-dis.c (arm_opcodes): Add "esb".
	288	(thumb_opcodes): Likewise.
	289
afa8d405 PB	290	2016-01-11 Peter Bergner <bergner@vnet.ibm.com>
	291
	292	* ppc-opc.c <xscmpnedp>: Delete.
	293	<xvcmpnedp>: Likewise.
	294	<xvcmpnedp.>: Likewise.
	295	<xvcmpnesp>: Likewise.
	296	<xvcmpnesp.>: Likewise.
	297
83c3256e AS	298	2016-01-08 Andreas Schwab <schwab@linux-m68k.org>
	299
	300	PR gas/13050
	301	* m68k-opc.c (moveb, movew): For ISA_B/C only allow #,d(An) in
	302	addition to ISA_A.
	303
6f2750fe AM	304	2016-01-01 Alan Modra <amodra@gmail.com>
	305
	306	Update year range in copyright notice of all files.
	307
3499769a AM	308	For older changes see ChangeLog-2015
	309	\f
	310	Copyright (C) 2016 Free Software Foundation, Inc.
	311
	312	Copying and distribution of this file, with or without modification,
	313	are permitted in any medium without royalty provided the copyright
	314	notice and this notice are preserved.
	315
	316	Local Variables:
	317	mode: change-log
	318	left-margin: 8
	319	fill-column: 74
	320	version-control: never
	321	End: