[deliverable/binutils-gdb.git] / opcodes / ChangeLog

2019-04-24  John Darrington  <john@darrington.wattle.id.au>

        * s12z-opc.h: Add extern "C" bracketing to help
	users who wish to use this interface in c++ code.

2019-04-24  John Darrington  <john@darrington.wattle.id.au>

	* s12z-opc.c (bm_decode): Handle bit map operations with the
	"reserved0" mode.

2019-04-15  Thomas Preud'homme  <thomas.preudhomme@arm.com>

	* arm-dis.c (coprocessor_opcodes): Document new %J and %K format
	specifier.  Add entries for VLDR and VSTR of system registers.
	(print_insn_coprocessor): Forbid coprocessor numbers 8, 14 and 15 in
	coprocessor instructions on Armv8.1-M Mainline targets.  Add handling
	of %J and %K format specifier.

2019-04-15  Thomas Preud'homme  <thomas.preudhomme@arm.com>

	* arm-dis.c (coprocessor_opcodes): Document new %C format control code.
	Add new entries for VSCCLRM instruction.
	(print_insn_coprocessor): Handle new %C format control code.

2019-04-15  Thomas Preud'homme  <thomas.preudhomme@arm.com>

	* arm-dis.c (enum isa): New enum.
	(struct sopcode32): New structure.
	(coprocessor_opcodes): change type of entries to struct sopcode32 and
	set isa field of all current entries to ANY.
	(print_insn_coprocessor): Change type of insn to struct sopcode32.
	Only match an entry if its isa field allows the current mode.

2019-04-15  Thomas Preud'homme  <thomas.preudhomme@arm.com>

	* arm-dis.c (thumb_opcodes): Document %n control code.  Add entry for
	CLRM.
	(print_insn_thumb32): Add logic to print %n CLRM register list.

2019-04-15  Sudakshina Das  <sudi.das@arm.com>

	* arm-dis.c (print_insn_thumb32): Updated to accept new %P
	and %Q patterns.

2019-04-15  Sudakshina Das  <sudi.das@arm.com>

	* arm-dis.c (thumb32_opcodes): New instruction bfcsel.
	(print_insn_thumb32): Edit the switch case for %Z.

2019-04-15  Sudakshina Das  <sudi.das@arm.com>

	* arm-dis.c (print_insn_thumb32): Updated to accept new %Z pattern.

2019-04-15  Sudakshina Das  <sudi.das@arm.com>

	* arm-dis.c (thumb32_opcodes): New instruction bfl.

2019-04-15  Sudakshina Das  <sudi.das@arm.com>

	* arm-dis.c (print_insn_thumb32): Updated to accept new %Y pattern.

2019-04-15  Sudakshina Das  <sudi.das@arm.com>

	* arm-dis.c (print_insn_thumb32): Add '%<bitfield>S' to print an
	Arm register with r13 and r15 unpredictable.
	(thumb32_opcodes): New instructions for bfx and bflx.

2019-04-15  Sudakshina Das  <sudi.das@arm.com>

	* arm-dis.c (thumb32_opcodes): New instructions for bf.

2019-04-15  Sudakshina Das  <sudi.das@arm.com>

	* arm-dis.c (print_insn_thumb32): Updated to accept new %W pattern.

2019-04-15  Sudakshina Das  <sudi.das@arm.com>

	* arm-dis.c (print_insn_thumb32): Updated to accept new %G pattern.

2019-04-15  Thomas Preud'homme  <thomas.preudhomme@arm.com>

	* arm-dis.c (select_arm_features): Add logic for Armv8.1-M Mainline.

2019-04-12  John Darrington <john@darrington.wattle.id.au>

	s12z-dis.c, s12z-opc.c, s12z-opc.h: Replace "operator" with
	"optr". ("operator" is a reserved word in c++).

2019-04-11  Sudakshina Das  <sudi.das@arm.com>

	* aarch64-opc.c (aarch64_print_operand): Add case for
	AARCH64_OPND_Rt_SP.
	(verify_constraints): Likewise.
	* aarch64-tbl.h (QL_LDST_AT): Update to add SP qualifier.
	(struct aarch64_opcode): Update stg, stzg, st2g, stz2g instructions
	to accept Rt|SP as first operand.
	(AARCH64_OPERANDS): Add new Rt_SP.
	* aarch64-asm-2.c: Regenerated.
	* aarch64-dis-2.c: Regenerated.
	* aarch64-opc-2.c: Regenerated.

2019-04-11  Sudakshina Das  <sudi.das@arm.com>

	* aarch64-asm-2.c: Regenerated.
	* aarch64-dis-2.c: Likewise.
	* aarch64-opc-2.c: Likewise.
	* aarch64-tbl.h (aarch64_opcode): Add new ldgm and stgm.

2019-04-09  Robert Suchanek  <robert.suchanek@mips.com>

	* mips-opc.c (mips_builtin_opcodes): Add RDHWR rt rd sel.

2019-04-08  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.tbl: Consolidate AVX512 BF16 entries.
	* i386-init.h: Regenerated.

2019-04-07  Alan Modra  <amodra@gmail.com>

	* ppc-dis.c (print_insn_powerpc): Use a tiny state machine
	op_separator to control printing of spaces, comma and parens
	rather than need_comma, need_paren and spaces vars.

2019-04-07  Alan Modra  <amodra@gmail.com>

	PR 24421
	* arm-dis.c (print_insn_coprocessor): Correct bracket placement.
	(print_insn_neon, print_insn_arm): Likewise.

2019-04-05  Xuepeng Guo  <xuepeng.guo@intel.com>

	* i386-dis-evex.h (evex_table): Updated to support BF16
	instructions.
	* i386-dis.c (enum): Add EVEX_W_0F3852_P_1, EVEX_W_0F3872_P_1
	and EVEX_W_0F3872_P_3.
	* i386-gen.c (cpu_flag_init): Add CPU_AVX512_BF16_FLAGS.
	(cpu_flags): Add bitfield for CpuAVX512_BF16.
	* i386-opc.h (enum): Add CpuAVX512_BF16.
	(i386_cpu_flags): Add bitfield for cpuavx512_bf16.
	* i386-opc.tbl: Add AVX512 BF16 instructions.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

2019-04-05  Alan Modra  <amodra@gmail.com>

	* ppc-opc.c (XLBH_MASK): Subtract off BH field from BB_MASK.
	(powerpc_opcodes): Reorder bcctr and bclr extended mnemonics
	to favour printing of "-" branch hint when using the "y" bit.
	Allow BH field on bc{ctr,lr,tar}{,l}{-,+}.

2019-04-05  Alan Modra  <amodra@gmail.com>

	* ppc-dis.c (print_insn_powerpc): Delay printing spaces after
	opcode until first operand is output.

2019-04-04  Peter Bergner  <bergner@linux.ibm.com>

	PR gas/24349
	* ppc-opc.c (valid_bo_pre_v2): Add comments.
	(valid_bo_post_v2): Add support for 'at' branch hints.
	(insert_bo): Only error on branch on ctr.
	(get_bo_hint_mask): New function.
	(insert_boe): Add new 'branch_taken' formal argument.  Add support
	for inserting 'at' branch hints.
	(extract_boe): Add new 'branch_taken' formal argument.  Add support
	for extracting 'at' branch hints.
	(insert_bom, extract_bom, insert_bop, extract_bop): New functions.
	(BOE): Delete operand.
	(BOM, BOP): New operands.
	(RM): Update value.
	(XLYLK, XLYLK_MASK, XLYBB_MASK): Delete.
	(powerpc_opcodes) <bc-, bcl-, bca-, bcla-, bclr-, bclrl-, bcctr-,
	bcctrl-, bctar-, bctarl->: Replace BOE with BOM.
	(powerpc_opcodes) <bc+, bcl+, bca+, bcla+, bclr+, bclrl+, bcctr+,
	bcctrl+, bctar+, bctarl+>: Replace BOE with BOP.
	<bdnztar, bdnztarl, bdztar, bdztarl, btar, btarl, bdnztar-, bdnztarl-,
	bdnztar+, bdnztarl+, bdztar-, bdztarl-, bdztar+, bdztarl+, bgetar,
	bnltar, bgetarl, bnltarl, bletar, bngtar, bletarl, bngtarl, bnetar,
	bnetarl, bnstar, bnutar, bnstarl, bnutarl, bgetar-, bnltar-, bgetarl-,
	bnltarl-, bletar-, bngtar-, bletarl-, bngtarl-, bnetar-, bnetarl-,
	bnstar-, bnutar-, bnstarl-, bnutarl-, bgetar+, bnltar+, bgetarl+,
	bnltarl+, bletar+, bngtar+, bletarl+, bngtarl+, bnetar+, bnetarl+,
	bnstar+, bnutar+, bnstarl+, bnutarl+, blttar, blttarl, bgttar, bgttarl,
	beqtar, beqtarl, bsotar, buntar, bsotarl, buntarl, blttar-, blttarl-,
	bgttar-, bgttarl-, beqtar-, beqtarl-, bsotar-, buntar-, bsotarl-,
	buntarl-, blttar+, blttarl+, bgttar+, bgttarl+, beqtar+, beqtarl+,
	bsotar+, buntar+, bsotarl+, buntarl+, bdnzftar, bdnzftarl, bdzftar,
	bdzftarl, bftar, bftarl, bftar-, bftarl-, bftar+, bftarl+, bdnzttar,
	bdnzttarl, bdzttar, bdzttarl, bttar, bttarl, bttar-, bttarl-, bttar+,
	bttarl+>: New extended mnemonics.

2019-03-28  Alan Modra  <amodra@gmail.com>

	PR 24390
	* ppc-opc.c (BTF): Define.
	(powerpc_opcodes): Use for mtfsb*.
	* ppc-dis.c (print_insn_powerpc): Print fields with both
	PPC_OPERAND_CR_REG and PPC_OPERAND_CR_BIT as a plain number.

2019-03-25  Tamar Christina  <tamar.christina@arm.com>

	* arm-dis.c (struct arm_private_data): Remove has_mapping_symbols.
	(mapping_symbol_for_insn): Implement new algorithm.
	(print_insn): Remove duplicate code.

2019-03-25  Tamar Christina  <tamar.christina@arm.com>

	* aarch64-dis.c (print_insn_aarch64):
	Implement override.

2019-03-25  Tamar Christina  <tamar.christina@arm.com>

	* aarch64-dis.c (print_insn_aarch64): Update the mapping symbol search
	order.

2019-03-25  Tamar Christina  <tamar.christina@arm.com>

	* aarch64-dis.c (last_stop_offset): New.
	(print_insn_aarch64): Use stop_offset.

2019-03-19  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/24359
	* i386-gen.c (cpu_flag_init): Add CPU_ANY_AVX512F_FLAGS to
	CPU_ANY_AVX2_FLAGS.
	* i386-init.h: Regenerated.

2019-03-18  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/24348
	* i386-opc.tbl: Add Optimize to vmovdqa32, vmovdqa64, vmovdqu8,
	vmovdqu16, vmovdqu32 and vmovdqu64.
	* i386-tbl.h: Regenerated.

2019-03-12  Andreas Krebbel  <krebbel@linux.ibm.com>

	* s390-opc.txt: Rename selhhhr to selfhr.  Remove optional operand
	from vstrszb, vstrszh, and vstrszf.

2019-03-12  Andreas Krebbel  <krebbel@linux.ibm.com>

	* s390-opc.txt: Add instruction descriptions.

2019-02-08  Jim Wilson  <jimw@sifive.com>

	* riscv-opc.c (riscv_opcodes) <beq>: Use Cz to compress 3 operand form.
	<bne>: Likewise.

2019-02-07  Tamar Christina  <tamar.christina@arm.com>

	* arm-dis.c (arm_opcodes): Redefine hlt to armv1.

2019-02-07  Tamar Christina  <tamar.christina@arm.com>

	PR binutils/23212
	* aarch64-opc.h (enum aarch64_field_kind): Add FLD_sz.
	* aarch64-opc.c (verify_elem_sd): New.
	(fields): Add FLD_sz entr.
	* aarch64-tbl.h (_SIMD_INSN): New.
	(aarch64_opcode_table): Add elem_sd verifier to fmla, fmls, fmul and
	fmulx scalar and vector by element isns.

2019-02-07  Nick Clifton  <nickc@redhat.com>

	* po/sv.po: Updated Swedish translation.

2019-01-31  Andreas Krebbel  <krebbel@linux.ibm.com>

	* s390-mkopc.c (main): Accept arch13 as cpu string.
	* s390-opc.c: Add new instruction formats and instruction opcode
	masks.
	* s390-opc.txt: Add new arch13 instructions.

2019-01-25  Sudakshina Das  <sudi.das@arm.com>

	* aarch64-tbl.h (QL_LDST_AT): Update macro.
	(aarch64_opcode): Change encoding for stg, stzg
	st2g and st2zg.
	* aarch64-asm-2.c: Regenerated.
	* aarch64-dis-2.c: Regenerated.
	* aarch64-opc-2.c: Regenerated.

2019-01-25  Sudakshina Das  <sudi.das@arm.com>

	* aarch64-asm-2.c: Regenerated.
	* aarch64-dis-2.c: Likewise.
	* aarch64-opc-2.c: Likewise.
	* aarch64-tbl.h (aarch64_opcode): Add new stzgm.

2019-01-25  Sudakshina Das  <sudi.das@arm.com>
	    Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>

	* aarch64-asm.c (aarch64_ins_addr_simple_2): Remove.
	* aarch64-asm.h (ins_addr_simple_2): Likeiwse.
	* aarch64-dis.c (aarch64_ext_addr_simple_2): Likewise.
	* aarch64-dis.h (ext_addr_simple_2): Likewise.
	* aarch64-opc.c (operand_general_constraint_met_p): Remove
	case for ldstgv_indexed.
	(aarch64_print_operand): Remove case for AARCH64_OPND_ADDR_SIMPLE_2.
	* aarch64-tbl.h (struct aarch64_opcode): Remove ldgv and stgv.
	(AARCH64_OPERANDS): Remove ADDR_SIMPLE_2.
	* aarch64-asm-2.c: Regenerated.
	* aarch64-dis-2.c: Regenerated.
	* aarch64-opc-2.c: Regenerated.

2019-01-23  Nick Clifton  <nickc@redhat.com>

	* po/pt_BR.po: Updated Brazilian Portuguese translation.

2019-01-21  Nick Clifton  <nickc@redhat.com>

	* po/de.po: Updated German translation.
	* po/uk.po: Updated Ukranian translation.

2019-01-20  Chenghua Xu  <paul.hua.gm@gmail.com>
	* mips-dis.c (mips_arch_choices): Fix typo in
	gs464, gs464e and gs264e descriptors.

2019-01-19  Nick Clifton  <nickc@redhat.com>

	* configure: Regenerate.
	* po/opcodes.pot: Regenerate.

2018-06-24  Nick Clifton  <nickc@redhat.com>

	2.32 branch created.

2019-01-09  John Darrington <john@darrington.wattle.id.au>

	* s12z-dis.c (print_insn_s12z):  Do not dereference an operand
	if it is null.
	-dis.c (opr_emit_disassembly): Do not omit an index if it is
	zero.

2019-01-09  Andrew Paprocki  <andrew@ishiboo.com>

	* configure: Regenerate.

2019-01-07  Alan Modra  <amodra@gmail.com>

	* configure: Regenerate.
	* po/POTFILES.in: Regenerate.

2019-01-03  John Darrington <john@darrington.wattle.id.au>

	* s12z-opc.c: New file.
	* s12z-opc.h: New file.
	* s12z-dis.c: Removed all code not directly related to display
	of instructions.  Used the interface provided by the new files
	instead.
	* Makefile.am (TARGET_LIBOPCODES_CFILES) Add s12z-opc.c.
	* Makefile.in: Regenerate.
	* configure.ac (bfd_s12z_arch): Correct the dependencies.
	* configure: Regenerate.

2019-01-01  Alan Modra  <amodra@gmail.com>

	Update year range in copyright notice of all files.

For older changes see ChangeLog-2018
\f
Copyright (C) 2019 Free Software Foundation, Inc.

Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved.

Local Variables:
mode: change-log
left-margin: 8
fill-column: 74
version-control: never
End:
Commit	Line	Data
d10be0cb JD	1	2019-04-24 John Darrington <john@darrington.wattle.id.au>
	2
	3	* s12z-opc.h: Add extern "C" bracketing to help
	4	users who wish to use this interface in c++ code.
	5
a679f24e JD	6	2019-04-24 John Darrington <john@darrington.wattle.id.au>
	7
	8	* s12z-opc.c (bm_decode): Handle bit map operations with the
	9	"reserved0" mode.
	10
32c36c3c AV	11	2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
	12
	13	* arm-dis.c (coprocessor_opcodes): Document new %J and %K format
	14	specifier. Add entries for VLDR and VSTR of system registers.
	15	(print_insn_coprocessor): Forbid coprocessor numbers 8, 14 and 15 in
	16	coprocessor instructions on Armv8.1-M Mainline targets. Add handling
	17	of %J and %K format specifier.
	18
efd6b359 AV	19	2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
	20
	21	* arm-dis.c (coprocessor_opcodes): Document new %C format control code.
	22	Add new entries for VSCCLRM instruction.
	23	(print_insn_coprocessor): Handle new %C format control code.
	24
6b0dd094 AV	25	2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
	26
	27	* arm-dis.c (enum isa): New enum.
	28	(struct sopcode32): New structure.
	29	(coprocessor_opcodes): change type of entries to struct sopcode32 and
	30	set isa field of all current entries to ANY.
	31	(print_insn_coprocessor): Change type of insn to struct sopcode32.
	32	Only match an entry if its isa field allows the current mode.
	33
4b5a202f AV	34	2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
	35
	36	* arm-dis.c (thumb_opcodes): Document %n control code. Add entry for
	37	CLRM.
	38	(print_insn_thumb32): Add logic to print %n CLRM register list.
	39
60f993ce AV	40	2019-04-15 Sudakshina Das <sudi.das@arm.com>
	41
	42	* arm-dis.c (print_insn_thumb32): Updated to accept new %P
	43	and %Q patterns.
	44
f6b2b12d AV	45	2019-04-15 Sudakshina Das <sudi.das@arm.com>
	46
	47	* arm-dis.c (thumb32_opcodes): New instruction bfcsel.
	48	(print_insn_thumb32): Edit the switch case for %Z.
	49
1889da70 AV	50	2019-04-15 Sudakshina Das <sudi.das@arm.com>
	51
	52	* arm-dis.c (print_insn_thumb32): Updated to accept new %Z pattern.
	53
65d1bc05 AV	54	2019-04-15 Sudakshina Das <sudi.das@arm.com>
	55
	56	* arm-dis.c (thumb32_opcodes): New instruction bfl.
	57
1caf72a5 AV	58	2019-04-15 Sudakshina Das <sudi.das@arm.com>
	59
	60	* arm-dis.c (print_insn_thumb32): Updated to accept new %Y pattern.
	61
f1c7f421 AV	62	2019-04-15 Sudakshina Das <sudi.das@arm.com>
	63
	64	* arm-dis.c (print_insn_thumb32): Add '%<bitfield>S' to print an
	65	Arm register with r13 and r15 unpredictable.
	66	(thumb32_opcodes): New instructions for bfx and bflx.
	67
4389b29a AV	68	2019-04-15 Sudakshina Das <sudi.das@arm.com>
	69
	70	* arm-dis.c (thumb32_opcodes): New instructions for bf.
	71
e5d6e09e AV	72	2019-04-15 Sudakshina Das <sudi.das@arm.com>
	73
	74	* arm-dis.c (print_insn_thumb32): Updated to accept new %W pattern.
	75
e12437dc AV	76	2019-04-15 Sudakshina Das <sudi.das@arm.com>
	77
	78	* arm-dis.c (print_insn_thumb32): Updated to accept new %G pattern.
	79
031254f2 AV	80	2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
	81
	82	* arm-dis.c (select_arm_features): Add logic for Armv8.1-M Mainline.
	83
e5a557ac JD	84	2019-04-12 John Darrington <john@darrington.wattle.id.au>
	85
	86	s12z-dis.c, s12z-opc.c, s12z-opc.h: Replace "operator" with
	87	"optr". ("operator" is a reserved word in c++).
	88
bd7ceb8d SD	89	2019-04-11 Sudakshina Das <sudi.das@arm.com>
	90
	91	* aarch64-opc.c (aarch64_print_operand): Add case for
	92	AARCH64_OPND_Rt_SP.
	93	(verify_constraints): Likewise.
	94	* aarch64-tbl.h (QL_LDST_AT): Update to add SP qualifier.
	95	(struct aarch64_opcode): Update stg, stzg, st2g, stz2g instructions
	96	to accept Rt\|SP as first operand.
	97	(AARCH64_OPERANDS): Add new Rt_SP.
	98	* aarch64-asm-2.c: Regenerated.
	99	* aarch64-dis-2.c: Regenerated.
	100	* aarch64-opc-2.c: Regenerated.
	101
e54010f1 SD	102	2019-04-11 Sudakshina Das <sudi.das@arm.com>
	103
	104	* aarch64-asm-2.c: Regenerated.
	105	* aarch64-dis-2.c: Likewise.
	106	* aarch64-opc-2.c: Likewise.
	107	* aarch64-tbl.h (aarch64_opcode): Add new ldgm and stgm.
	108
7e96e219 RS	109	2019-04-09 Robert Suchanek <robert.suchanek@mips.com>
	110
	111	* mips-opc.c (mips_builtin_opcodes): Add RDHWR rt rd sel.
	112
6f2791d5 L	113	2019-04-08 H.J. Lu <hongjiu.lu@intel.com>
	114
	115	* i386-opc.tbl: Consolidate AVX512 BF16 entries.
	116	* i386-init.h: Regenerated.
	117
e392bad3 AM	118	2019-04-07 Alan Modra <amodra@gmail.com>
	119
	120	* ppc-dis.c (print_insn_powerpc): Use a tiny state machine
	121	op_separator to control printing of spaces, comma and parens
	122	rather than need_comma, need_paren and spaces vars.
	123
dffaa15c AM	124	2019-04-07 Alan Modra <amodra@gmail.com>
	125
	126	PR 24421
	127	* arm-dis.c (print_insn_coprocessor): Correct bracket placement.
	128	(print_insn_neon, print_insn_arm): Likewise.
	129
d6aab7a1 XG	130	2019-04-05 Xuepeng Guo <xuepeng.guo@intel.com>
	131
	132	* i386-dis-evex.h (evex_table): Updated to support BF16
	133	instructions.
	134	* i386-dis.c (enum): Add EVEX_W_0F3852_P_1, EVEX_W_0F3872_P_1
	135	and EVEX_W_0F3872_P_3.
	136	* i386-gen.c (cpu_flag_init): Add CPU_AVX512_BF16_FLAGS.
	137	(cpu_flags): Add bitfield for CpuAVX512_BF16.
	138	* i386-opc.h (enum): Add CpuAVX512_BF16.
	139	(i386_cpu_flags): Add bitfield for cpuavx512_bf16.
	140	* i386-opc.tbl: Add AVX512 BF16 instructions.
	141	* i386-init.h: Regenerated.
	142	* i386-tbl.h: Likewise.
	143
66e85460 AM	144	2019-04-05 Alan Modra <amodra@gmail.com>
	145
	146	* ppc-opc.c (XLBH_MASK): Subtract off BH field from BB_MASK.
	147	(powerpc_opcodes): Reorder bcctr and bclr extended mnemonics
	148	to favour printing of "-" branch hint when using the "y" bit.
	149	Allow BH field on bc{ctr,lr,tar}{,l}{-,+}.
	150
c2b1c275 AM	151	2019-04-05 Alan Modra <amodra@gmail.com>
	152
	153	* ppc-dis.c (print_insn_powerpc): Delay printing spaces after
	154	opcode until first operand is output.
	155
aae9718e PB	156	2019-04-04 Peter Bergner <bergner@linux.ibm.com>
	157
	158	PR gas/24349
	159	* ppc-opc.c (valid_bo_pre_v2): Add comments.
	160	(valid_bo_post_v2): Add support for 'at' branch hints.
	161	(insert_bo): Only error on branch on ctr.
	162	(get_bo_hint_mask): New function.
	163	(insert_boe): Add new 'branch_taken' formal argument. Add support
	164	for inserting 'at' branch hints.
	165	(extract_boe): Add new 'branch_taken' formal argument. Add support
	166	for extracting 'at' branch hints.
	167	(insert_bom, extract_bom, insert_bop, extract_bop): New functions.
	168	(BOE): Delete operand.
	169	(BOM, BOP): New operands.
	170	(RM): Update value.
	171	(XLYLK, XLYLK_MASK, XLYBB_MASK): Delete.
	172	(powerpc_opcodes) <bc-, bcl-, bca-, bcla-, bclr-, bclrl-, bcctr-,
	173	bcctrl-, bctar-, bctarl->: Replace BOE with BOM.
	174	(powerpc_opcodes) <bc+, bcl+, bca+, bcla+, bclr+, bclrl+, bcctr+,
	175	bcctrl+, bctar+, bctarl+>: Replace BOE with BOP.
	176	<bdnztar, bdnztarl, bdztar, bdztarl, btar, btarl, bdnztar-, bdnztarl-,
	177	bdnztar+, bdnztarl+, bdztar-, bdztarl-, bdztar+, bdztarl+, bgetar,
	178	bnltar, bgetarl, bnltarl, bletar, bngtar, bletarl, bngtarl, bnetar,
	179	bnetarl, bnstar, bnutar, bnstarl, bnutarl, bgetar-, bnltar-, bgetarl-,
	180	bnltarl-, bletar-, bngtar-, bletarl-, bngtarl-, bnetar-, bnetarl-,
	181	bnstar-, bnutar-, bnstarl-, bnutarl-, bgetar+, bnltar+, bgetarl+,
	182	bnltarl+, bletar+, bngtar+, bletarl+, bngtarl+, bnetar+, bnetarl+,
	183	bnstar+, bnutar+, bnstarl+, bnutarl+, blttar, blttarl, bgttar, bgttarl,
	184	beqtar, beqtarl, bsotar, buntar, bsotarl, buntarl, blttar-, blttarl-,
	185	bgttar-, bgttarl-, beqtar-, beqtarl-, bsotar-, buntar-, bsotarl-,
	186	buntarl-, blttar+, blttarl+, bgttar+, bgttarl+, beqtar+, beqtarl+,
	187	bsotar+, buntar+, bsotarl+, buntarl+, bdnzftar, bdnzftarl, bdzftar,
	188	bdzftarl, bftar, bftarl, bftar-, bftarl-, bftar+, bftarl+, bdnzttar,
	189	bdnzttarl, bdzttar, bdzttarl, bttar, bttarl, bttar-, bttarl-, bttar+,
	190	bttarl+>: New extended mnemonics.
	191
96a86c01 AM	192	2019-03-28 Alan Modra <amodra@gmail.com>
	193
	194	PR 24390
	195	* ppc-opc.c (BTF): Define.
	196	(powerpc_opcodes): Use for mtfsb*.
	197	* ppc-dis.c (print_insn_powerpc): Print fields with both
	198	PPC_OPERAND_CR_REG and PPC_OPERAND_CR_BIT as a plain number.
	199
796d6298 TC	200	2019-03-25 Tamar Christina <tamar.christina@arm.com>
	201
	202	* arm-dis.c (struct arm_private_data): Remove has_mapping_symbols.
	203	(mapping_symbol_for_insn): Implement new algorithm.
	204	(print_insn): Remove duplicate code.
	205
60df3720 TC	206	2019-03-25 Tamar Christina <tamar.christina@arm.com>
	207
	208	* aarch64-dis.c (print_insn_aarch64):
	209	Implement override.
	210
51457761 TC	211	2019-03-25 Tamar Christina <tamar.christina@arm.com>
	212
	213	* aarch64-dis.c (print_insn_aarch64): Update the mapping symbol search
	214	order.
	215
53b2f36b TC	216	2019-03-25 Tamar Christina <tamar.christina@arm.com>
	217
	218	* aarch64-dis.c (last_stop_offset): New.
	219	(print_insn_aarch64): Use stop_offset.
	220
89199bb5 L	221	2019-03-19 H.J. Lu <hongjiu.lu@intel.com>
	222
	223	PR gas/24359
	224	* i386-gen.c (cpu_flag_init): Add CPU_ANY_AVX512F_FLAGS to
	225	CPU_ANY_AVX2_FLAGS.
	226	* i386-init.h: Regenerated.
	227
97ed31ae L	228	2019-03-18 H.J. Lu <hongjiu.lu@intel.com>
	229
	230	PR gas/24348
	231	* i386-opc.tbl: Add Optimize to vmovdqa32, vmovdqa64, vmovdqu8,
	232	vmovdqu16, vmovdqu32 and vmovdqu64.
	233	* i386-tbl.h: Regenerated.
	234
0919bfe9 AK	235	2019-03-12 Andreas Krebbel <krebbel@linux.ibm.com>
	236
	237	* s390-opc.txt: Rename selhhhr to selfhr. Remove optional operand
	238	from vstrszb, vstrszh, and vstrszf.
	239
	240	2019-03-12 Andreas Krebbel <krebbel@linux.ibm.com>
	241
	242	* s390-opc.txt: Add instruction descriptions.
	243
21820ebe JW	244	2019-02-08 Jim Wilson <jimw@sifive.com>
	245
	246	* riscv-opc.c (riscv_opcodes) <beq>: Use Cz to compress 3 operand form.
	247	<bne>: Likewise.
	248
f7dd2fb2 TC	249	2019-02-07 Tamar Christina <tamar.christina@arm.com>
	250
	251	* arm-dis.c (arm_opcodes): Redefine hlt to armv1.
	252
6456d318 TC	253	2019-02-07 Tamar Christina <tamar.christina@arm.com>
	254
	255	PR binutils/23212
	256	* aarch64-opc.h (enum aarch64_field_kind): Add FLD_sz.
	257	* aarch64-opc.c (verify_elem_sd): New.
	258	(fields): Add FLD_sz entr.
	259	* aarch64-tbl.h (_SIMD_INSN): New.
	260	(aarch64_opcode_table): Add elem_sd verifier to fmla, fmls, fmul and
	261	fmulx scalar and vector by element isns.
	262
4a83b610 NC	263	2019-02-07 Nick Clifton <nickc@redhat.com>
	264
	265	* po/sv.po: Updated Swedish translation.
	266
fc60b8c8 AK	267	2019-01-31 Andreas Krebbel <krebbel@linux.ibm.com>
	268
	269	* s390-mkopc.c (main): Accept arch13 as cpu string.
	270	* s390-opc.c: Add new instruction formats and instruction opcode
	271	masks.
	272	* s390-opc.txt: Add new arch13 instructions.
	273
e10620d3 TC	274	2019-01-25 Sudakshina Das <sudi.das@arm.com>
	275
	276	* aarch64-tbl.h (QL_LDST_AT): Update macro.
	277	(aarch64_opcode): Change encoding for stg, stzg
	278	st2g and st2zg.
	279	* aarch64-asm-2.c: Regenerated.
	280	* aarch64-dis-2.c: Regenerated.
	281	* aarch64-opc-2.c: Regenerated.
	282
20a4ca55 SD	283	2019-01-25 Sudakshina Das <sudi.das@arm.com>
	284
	285	* aarch64-asm-2.c: Regenerated.
	286	* aarch64-dis-2.c: Likewise.
	287	* aarch64-opc-2.c: Likewise.
	288	* aarch64-tbl.h (aarch64_opcode): Add new stzgm.
	289
550fd7bf SD	290	2019-01-25 Sudakshina Das <sudi.das@arm.com>
	291	Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
	292
	293	* aarch64-asm.c (aarch64_ins_addr_simple_2): Remove.
	294	* aarch64-asm.h (ins_addr_simple_2): Likeiwse.
	295	* aarch64-dis.c (aarch64_ext_addr_simple_2): Likewise.
	296	* aarch64-dis.h (ext_addr_simple_2): Likewise.
	297	* aarch64-opc.c (operand_general_constraint_met_p): Remove
	298	case for ldstgv_indexed.
	299	(aarch64_print_operand): Remove case for AARCH64_OPND_ADDR_SIMPLE_2.
	300	* aarch64-tbl.h (struct aarch64_opcode): Remove ldgv and stgv.
	301	(AARCH64_OPERANDS): Remove ADDR_SIMPLE_2.
	302	* aarch64-asm-2.c: Regenerated.
	303	* aarch64-dis-2.c: Regenerated.
	304	* aarch64-opc-2.c: Regenerated.
	305
d9938630 NC	306	2019-01-23 Nick Clifton <nickc@redhat.com>
	307
	308	* po/pt_BR.po: Updated Brazilian Portuguese translation.
	309
375cd423 NC	310	2019-01-21 Nick Clifton <nickc@redhat.com>
	311
	312	* po/de.po: Updated German translation.
	313	* po/uk.po: Updated Ukranian translation.
	314
57299f48 CX	315	2019-01-20 Chenghua Xu <paul.hua.gm@gmail.com>
	316	* mips-dis.c (mips_arch_choices): Fix typo in
	317	gs464, gs464e and gs264e descriptors.
	318
f48dfe41 NC	319	2019-01-19 Nick Clifton <nickc@redhat.com>
	320
	321	* configure: Regenerate.
	322	* po/opcodes.pot: Regenerate.
	323
f974f26c NC	324	2018-06-24 Nick Clifton <nickc@redhat.com>
	325
	326	2.32 branch created.
	327
39f286cd JD	328	2019-01-09 John Darrington <john@darrington.wattle.id.au>
39f286cd JD	329
448b8ca8 JD	330	* s12z-dis.c (print_insn_s12z): Do not dereference an operand
	331	if it is null.
	332	-dis.c (opr_emit_disassembly): Do not omit an index if it is
39f286cd JD	333	zero.
39f286cd JD	334
3107326d AP	335	2019-01-09 Andrew Paprocki <andrew@ishiboo.com>
	336
	337	* configure: Regenerate.
	338
7e9ca91e AM	339	2019-01-07 Alan Modra <amodra@gmail.com>
	340
	341	* configure: Regenerate.
	342	* po/POTFILES.in: Regenerate.
	343
ef1ad42b JD	344	2019-01-03 John Darrington <john@darrington.wattle.id.au>
	345
	346	* s12z-opc.c: New file.
	347	* s12z-opc.h: New file.
	348	* s12z-dis.c: Removed all code not directly related to display
	349	of instructions. Used the interface provided by the new files
	350	instead.
	351	* Makefile.am (TARGET_LIBOPCODES_CFILES) Add s12z-opc.c.
7e9ca91e	352	* Makefile.in: Regenerate.
ef1ad42b	353	* configure.ac (bfd_s12z_arch): Correct the dependencies.
7e9ca91e	354	* configure: Regenerate.
ef1ad42b	355
82704155 AM	356	2019-01-01 Alan Modra <amodra@gmail.com>
	357
	358	Update year range in copyright notice of all files.
	359
d5c04e1b	360	For older changes see ChangeLog-2018
3499769a	361	\f
d5c04e1b	362	Copyright (C) 2019 Free Software Foundation, Inc.
3499769a AM	363
	364	Copying and distribution of this file, with or without modification,
	365	are permitted in any medium without royalty provided the copyright
	366	notice and this notice are preserved.
	367
	368	Local Variables:
	369	mode: change-log
	370	left-margin: 8
	371	fill-column: 74
	372	version-control: never
	373	End: