[deliverable/binutils-gdb.git] / opcodes / ChangeLog

2006-04-28  Thiemo Seufer  <ths@mips.com>
            David Ung  <davidu@mips.com>
	    Nigel Stevens  <nigel@mips.com>

	* mips-dis.c (mips_cp0sel_names_mips3264r2): Add MT register
	names.

2006-04-28  Thiemo Seufer  <ths@mips.com>
            Nigel Stevens  <nigel@mips.com>
            David Ung  <davidu@mips.com>

	* mips-dis.c (print_insn_args): Add mips_opcode argument.
	(print_insn_mips):  Adjust print_insn_args call.

2006-04-28  Thiemo Seufer  <ths@mips.com>
            Nigel Stevens  <nigel@mips.com>

	* mips-dis.c (print_insn_args): Print $fcc only for FP
	instructions, use $cc elsewise.

2006-04-28  Thiemo Seufer  <ths@mips.com>
            Nigel Stevens  <nigel@mips.com>

	* opcodes/mips-dis.c (mips16_to_32_reg_map, mips16_reg_names):
	Map MIPS16 registers to O32 names.
	(print_mips16_insn_arg): Use mips16_reg_names.

2006-04-26  Julian Brown  <julian@codesourcery.com>

	* arm-dis.c (print_insn_neon): Disassemble floating-point constant
	VMOV.

2006-04-26  Nathan Sidwell  <nathan@codesourcery.com>
	    Julian Brown  <julian@codesourcery.com>

	* opcodes/arm-dis.c (coprocessor_opcodes): Add %A, %B, %k, convert
	%<code>[zy] into %[zy]<code>.  Expand meaning of %<bitfield>['`?].
	Add unified load/store instruction names.
	(neon_opcode_table): New.
	(arm_opcodes): Expand meaning of %<bitfield>['`?].
	(arm_decode_bitfield): New.
	(print_insn_coprocessor): Add pc argument. Add %A & %B specifiers.
	Use arm_decode_bitfield and adjust numeric specifiers. Adjust %z & %y.
	(print_insn_neon): New.
	(print_insn_arm): Adjust print_insn_coprocessor call. Call
	print_insn_neon. Use arm_decode_bitfield and adjust numeric specifiers.
	(print_insn_thumb32): Likewise.

2006-04-19  Alan Modra  <amodra@bigpond.net.au>

	* Makefile.am: Run "make dep-am".
	* Makefile.in: Regenerate.

2006-04-19  Alan Modra  <amodra@bigpond.net.au>

	* avr-dis.c (avr_operand): Warning fix.

	* configure: Regenerate.

2006-04-16  Daniel Jacobowitz  <dan@codesourcery.com>

	* po/POTFILES.in: Regenerated.

2006-04-12   Hochstein  <hochstein@algo.informatik.tu-darmstadt.de>

	PR binutils/2454
	* avr-dis.c (avr_operand): Arrange for a comment to appear before
	the symolic form of an address, so that the output of objdump -d
	can be reassembled.

2006-04-10  DJ Delorie  <dj@redhat.com>

	* m32c-asm.c: Regenerate.

2006-04-06  Carlos O'Donell  <carlos@codesourcery.com>

	* Makefile.am: Add install-html target.
	* Makefile.in: Regenerate.

2006-04-06  Nick Clifton  <nickc@redhat.com>

	* po/vi/po: Updated Vietnamese translation.

2006-03-31  Paul Koning  <ni1d@arrl.net>

	* pdp11-opc.c (pdp11_opcodes): Fix opcode for SEC instruction.

2006-03-16  Bernd Schmidt  <bernd.schmidt@analog.com>

	* bfin-dis.c (decode_dsp32shiftimm_0): Simplify and correct the
	logic to identify halfword shifts.

2006-03-16  Paul Brook  <paul@codesourcery.com>

	* arm-dis.c (arm_opcodes): Rename swi to svc.
	(thumb_opcodes): Ditto.

2006-03-13  DJ Delorie  <dj@redhat.com>

	* m32c-asm.c: Regenerate.
	* m32c-desc.c: Likewise.
	* m32c-desc.h: Likewise.
	* m32c-dis.c: Likewise.
	* m32c-ibld.c: Likewise.
	* m32c-opc.c: Likewise.
	* m32c-opc.h: Likewise.

2006-03-10  DJ Delorie  <dj@redhat.com>

	* m32c-desc.c: Regenerate with mul.l, mulu.l.
	* m32c-opc.c: Likewise.
	* m32c-opc.h: Likewise.


2006-03-09  Nick Clifton  <nickc@redhat.com>

	* po/sv.po: Updated Swedish translation.

2006-03-07  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/2428
	* i386-dis.c (REP_Fixup): New function.
	(AL): Remove duplicate.
	(Xbr): New.
	(Xvr): Likewise.
	(Ybr): Likewise.
	(Yvr): Likewise.
	(indirDXr): Likewise.
	(ALr): Likewise.
	(eAXr): Likewise.
	(dis386): Updated entries of ins, outs, movs, lods and stos.

2006-03-05  Nick Clifton  <nickc@redhat.com>

	* cgen-ibld.in (insert_normal): Cope with attempts to insert a
	signed 32-bit value into an unsigned 32-bit field when the host is
	a 64-bit machine.
	* fr30-ibld.c: Regenerate.
	* frv-ibld.c: Regenerate.
	* ip2k-ibld.c: Regenerate.
	* iq2000-asm.c: Regenerate.
	* iq2000-ibld.c: Regenerate.
	* m32c-ibld.c: Regenerate.
	* m32r-ibld.c: Regenerate.
	* openrisc-ibld.c: Regenerate.
	* xc16x-ibld.c: Regenerate.
	* xstormy16-ibld.c: Regenerate.

2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)

	* xc16x-asm.c: Regenerate.
	* xc16x-dis.c: Regenerate.

2006-02-27  Carlos O'Donell  <carlos@codesourcery.com>

	* po/Make-in: Add html target.

2006-02-27  H.J. Lu <hongjiu.lu@intel.com>

	* i386-dis.c (IS_3BYTE_OPCODE): New for 3-byte opcodes used by
	Intel Merom New Instructions.
	(THREE_BYTE_0): Likewise.
	(THREE_BYTE_1): Likewise.
	(three_byte_table): Likewise.
	(dis386_twobyte): Use THREE_BYTE_0 for entry 0x38. Use
	THREE_BYTE_1 for entry 0x3a.
	(twobyte_has_modrm): Updated.
	(twobyte_uses_SSE_prefix): Likewise.
	(print_insn): Handle 3-byte opcodes used by Intel Merom New
	Instructions.

2006-02-24  David S. Miller  <davem@sunset.davemloft.net>

	* sparc-dis.c (v9_priv_reg_names): Add "gl" entry.
	(v9_hpriv_reg_names): New table.
	(print_insn_sparc): Allow values up to 16 for '?' and '!'.
	New cases '$' and '%' for read/write hyperprivileged register.
	* sparc-opc.c (sparc_opcodes): Add new entries for UA2005
	window handling and rdhpr/wrhpr instructions.
	
2006-02-24  DJ Delorie  <dj@redhat.com>

	* m32c-desc.c: Regenerate with linker relaxation attributes.
	* m32c-desc.h: Likewise.
	* m32c-dis.c: Likewise.
	* m32c-opc.c: Likewise.

2006-02-24  Paul Brook  <paul@codesourcery.com>

	* arm-dis.c (arm_opcodes): Add V7 instructions.
	(thumb32_opcodes): Ditto.  Handle V7M MSR/MRS variants.
	(print_arm_address): New function.
	(print_insn_arm): Use it.  Add 'P' and 'U' cases.
	(psr_name): New function.
	(print_insn_thumb32): Add 'U', 'C' and 'D' cases.

2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>

	* ia64-opc-i.c (bXc): New.
	(mXc): Likewise.
	(OpX2TaTbYaXcC): Likewise.
	(TF). Likewise.
	(TFCM). Likewise.
	(ia64_opcodes_i): Add instructions for tf.

	* ia64-opc.h (IMMU5b): New.

	* ia64-asmtab.c: Regenerated.

2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>

	* ia64-gen.c: Update copyright years.
	* ia64-opc-b.c: Likewise.

2006-02-22  H.J. Lu  <hongjiu.lu@intel.com>

	* ia64-gen.c (lookup_regindex): Handle ".vm".
	(print_dependency_table): Handle '\"'.

	* ia64-ic.tbl: Updated from SDM 2.2.
	* ia64-raw.tbl: Likewise.
	* ia64-waw.tbl: Likewise.
	* ia64-asmtab.c: Regenerated.

	* ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.

2006-02-17  Shrirang Khisti  <shrirangk@kpitcummins.com>
            Anil Paranjape   <anilp1@kpitcummins.com>
            Shilin Shakti    <shilins@kpitcummins.com>

	* xc16x-desc.h: New file
	* xc16x-desc.c: New file
	* xc16x-opc.h: New file	
	* xc16x-opc.c: New file
	* xc16x-ibld.c: New file
	* xc16x-asm.c: New file
	* xc16x-dis.c: New file
	* Makefile.am: Entries for xc16x 
	* Makefile.in: Regenerate 
	* cofigure.in: Add xc16x target information.
	* configure: Regenerate.
	* disassemble.c: Add xc16x target information.

2006-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (dis386_twobyte): Use "movZ" for debug register
	moves.

2006-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c ('Z'): Add a new macro.
	(dis386_twobyte): Use "movZ" for control register moves.

2006-02-10  Nick Clifton  <nickc@redhat.com>

	* iq2000-asm.c: Regenerate.

2006-02-07  Nathan Sidwell  <nathan@codesourcery.com>

	* m68k-dis.c (print_insn_m68k): Use bfd_m68k_mach_to_features.

2006-01-26  David Ung  <davidu@mips.com>

	* mips-opc.c: Add I33 masks to these MIPS32R2 instructions: prefx,
	ceil.l.d, ceil.l.s, cvt.d.l, cvt.l.d, cvt.l.s, cvt.s.l, floor.l.d,
	floor.l.s, ldxc1, lwxc1, madd.d, madd.s, msub.d, msub.s, nmadd.d,
	nmadd.s, nmsub.d, nmsub.s, recip.d, recip.s, round.l.d, rsqrt.d,
	rsqrt.s, sdxc1, swxc1, trunc.l.d, trunc.l.s.

2006-01-18  Arnold Metselaar  <arnoldm@sourceware.org>

	* z80-dis.c (struct buffer, prt_d, prt_d_n, arit_d, ld_r_d,
	ld_d_r, pref_xd_cb): Use signed char to hold data to be
	disassembled.	
	* z80-dis.c (TXTSIZ): Increase buffer size to 24, this fixes
	buffer overflows when disassembling instructions like
	ld (ix+123),0x23
	* z80-dis.c (opc_ind, pref_xd_cb): Suppress '+' in an indexed
	operand, if the offset is negative.

2006-01-17  Arnold Metselaar  <arnoldm@sourceware.org>

	* z80-dis.c (struct buffer, prt_d, prt_d_n, pref_xd_cb): Use
	unsigned char to hold data to be disassembled.

2006-01-17  Andreas Schwab  <schwab@suse.de>

	PR binutils/1486
	* disassemble.c (disassemble_init_for_target): Set
	disassembler_needs_relocs for bfd_arch_arm.

2006-01-16  Paul Brook  <paul@codesourcery.com>

	* m68k-opc.c (m68k_opcodes): Fix opcodes for ColdFire f?abss,
	f?add?, and f?sub? instructions.

2006-01-16  Nick Clifton  <nickc@redhat.com>

	* po/zh_CN.po: New Chinese (simplified) translation.
	* configure.in (ALL_LINGUAS): Add "zh_CH".
	* configure: Regenerate.

2006-01-05  Paul Brook  <paul@codesourcery.com>

	* m68k-opc.c (m68k_opcodes): Add missing ColdFire fdsqrtd entry.

2006-01-06  DJ Delorie  <dj@redhat.com>

	* m32c-desc.c: Regenerate.
	* m32c-opc.c: Regenerate.
	* m32c-opc.h: Regenerate.

2006-01-03  DJ Delorie  <dj@redhat.com>

	* cgen-ibld.in (extract_normal): Avoid memory range errors.
	* m32c-ibld.c: Regenerated.

For older changes see ChangeLog-2005
\f
Local Variables:
mode: change-log
left-margin: 8
fill-column: 74
version-control: never
End:
Commit	Line	Data
59c455b3 TS	1	2006-04-28 Thiemo Seufer <ths@mips.com>
	2	David Ung <davidu@mips.com>
	3	Nigel Stevens <nigel@mips.com>
	4
	5	* mips-dis.c (mips_cp0sel_names_mips3264r2): Add MT register
	6	names.
	7
cc0ca239 TS	8	2006-04-28 Thiemo Seufer <ths@mips.com>
	9	Nigel Stevens <nigel@mips.com>
	10	David Ung <davidu@mips.com>
	11
	12	* mips-dis.c (print_insn_args): Add mips_opcode argument.
	13	(print_insn_mips): Adjust print_insn_args call.
	14
0d09bfe6 TS	15	2006-04-28 Thiemo Seufer <ths@mips.com>
	16	Nigel Stevens <nigel@mips.com>
	17
	18	* mips-dis.c (print_insn_args): Print $fcc only for FP
	19	instructions, use $cc elsewise.
	20
654c225a TS	21	2006-04-28 Thiemo Seufer <ths@mips.com>
	22	Nigel Stevens <nigel@mips.com>
	23
	24	* opcodes/mips-dis.c (mips16_to_32_reg_map, mips16_reg_names):
	25	Map MIPS16 registers to O32 names.
	26	(print_mips16_insn_arg): Use mips16_reg_names.
	27
0dbde4cf JB	28	2006-04-26 Julian Brown <julian@codesourcery.com>
	29
	30	* arm-dis.c (print_insn_neon): Disassemble floating-point constant
	31	VMOV.
	32
16980d0b JB	33	2006-04-26 Nathan Sidwell <nathan@codesourcery.com>
	34	Julian Brown <julian@codesourcery.com>
	35
	36	* opcodes/arm-dis.c (coprocessor_opcodes): Add %A, %B, %k, convert
	37	%<code>[zy] into %[zy]<code>. Expand meaning of %<bitfield>['`?].
	38	Add unified load/store instruction names.
	39	(neon_opcode_table): New.
	40	(arm_opcodes): Expand meaning of %<bitfield>['`?].
	41	(arm_decode_bitfield): New.
	42	(print_insn_coprocessor): Add pc argument. Add %A & %B specifiers.
	43	Use arm_decode_bitfield and adjust numeric specifiers. Adjust %z & %y.
	44	(print_insn_neon): New.
	45	(print_insn_arm): Adjust print_insn_coprocessor call. Call
	46	print_insn_neon. Use arm_decode_bitfield and adjust numeric specifiers.
	47	(print_insn_thumb32): Likewise.
	48
ec3fcc56 AM	49	2006-04-19 Alan Modra <amodra@bigpond.net.au>
	50
	51	* Makefile.am: Run "make dep-am".
	52	* Makefile.in: Regenerate.
	53
241a6c40 AM	54	2006-04-19 Alan Modra <amodra@bigpond.net.au>
241a6c40 AM	55
7c6646cd AM	56	* avr-dis.c (avr_operand): Warning fix.
7c6646cd AM	57
241a6c40 AM	58	* configure: Regenerate.
241a6c40 AM	59
e7403566 DJ	60	2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
	61
	62	* po/POTFILES.in: Regenerated.
	63
52f16a0e NC	64	2006-04-12 Hochstein <hochstein@algo.informatik.tu-darmstadt.de>
	65
	66	PR binutils/2454
	67	* avr-dis.c (avr_operand): Arrange for a comment to appear before
	68	the symolic form of an address, so that the output of objdump -d
	69	can be reassembled.
	70
e78efa90 DD	71	2006-04-10 DJ Delorie <dj@redhat.com>
	72
	73	* m32c-asm.c: Regenerate.
	74
108a6f8e CD	75	2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
	76
	77	* Makefile.am: Add install-html target.
	78	* Makefile.in: Regenerate.
	79
a135cb2c NC	80	2006-04-06 Nick Clifton <nickc@redhat.com>
	81
	82	* po/vi/po: Updated Vietnamese translation.
	83
47426b41 AM	84	2006-03-31 Paul Koning <ni1d@arrl.net>
	85
	86	* pdp11-opc.c (pdp11_opcodes): Fix opcode for SEC instruction.
	87
331f1cbe BS	88	2006-03-16 Bernd Schmidt <bernd.schmidt@analog.com>
	89
	90	* bfin-dis.c (decode_dsp32shiftimm_0): Simplify and correct the
	91	logic to identify halfword shifts.
	92
c16d2bf0 PB	93	2006-03-16 Paul Brook <paul@codesourcery.com>
	94
	95	* arm-dis.c (arm_opcodes): Rename swi to svc.
	96	(thumb_opcodes): Ditto.
	97
5348b81e DD	98	2006-03-13 DJ Delorie <dj@redhat.com>
5348b81e DD	99
5398310a DD	100	* m32c-asm.c: Regenerate.
	101	* m32c-desc.c: Likewise.
	102	* m32c-desc.h: Likewise.
	103	* m32c-dis.c: Likewise.
	104	* m32c-ibld.c: Likewise.
5348b81e DD	105	* m32c-opc.c: Likewise.
	106	* m32c-opc.h: Likewise.
	107
253d272c DD	108	2006-03-10 DJ Delorie <dj@redhat.com>
	109
	110	* m32c-desc.c: Regenerate with mul.l, mulu.l.
	111	* m32c-opc.c: Likewise.
	112	* m32c-opc.h: Likewise.
	113
	114
f530741d NC	115	2006-03-09 Nick Clifton <nickc@redhat.com>
	116
	117	* po/sv.po: Updated Swedish translation.
	118
35c52694 L	119	2006-03-07 H.J. Lu <hongjiu.lu@intel.com>
	120
	121	PR binutils/2428
	122	* i386-dis.c (REP_Fixup): New function.
	123	(AL): Remove duplicate.
	124	(Xbr): New.
	125	(Xvr): Likewise.
	126	(Ybr): Likewise.
	127	(Yvr): Likewise.
	128	(indirDXr): Likewise.
	129	(ALr): Likewise.
	130	(eAXr): Likewise.
	131	(dis386): Updated entries of ins, outs, movs, lods and stos.
	132
ed963e2d NC	133	2006-03-05 Nick Clifton <nickc@redhat.com>
	134
	135	* cgen-ibld.in (insert_normal): Cope with attempts to insert a
	136	signed 32-bit value into an unsigned 32-bit field when the host is
	137	a 64-bit machine.
	138	* fr30-ibld.c: Regenerate.
	139	* frv-ibld.c: Regenerate.
	140	* ip2k-ibld.c: Regenerate.
	141	* iq2000-asm.c: Regenerate.
	142	* iq2000-ibld.c: Regenerate.
	143	* m32c-ibld.c: Regenerate.
	144	* m32r-ibld.c: Regenerate.
	145	* openrisc-ibld.c: Regenerate.
	146	* xc16x-ibld.c: Regenerate.
	147	* xstormy16-ibld.c: Regenerate.
	148
c7d41dc5 NC	149	2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
	150
	151	* xc16x-asm.c: Regenerate.
	152	* xc16x-dis.c: Regenerate.
c7d41dc5	153
f7d9e5c3 CD	154	2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
	155
	156	* po/Make-in: Add html target.
	157
331d2d0d L	158	2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
	159
	160	* i386-dis.c (IS_3BYTE_OPCODE): New for 3-byte opcodes used by
	161	Intel Merom New Instructions.
	162	(THREE_BYTE_0): Likewise.
	163	(THREE_BYTE_1): Likewise.
	164	(three_byte_table): Likewise.
	165	(dis386_twobyte): Use THREE_BYTE_0 for entry 0x38. Use
	166	THREE_BYTE_1 for entry 0x3a.
	167	(twobyte_has_modrm): Updated.
	168	(twobyte_uses_SSE_prefix): Likewise.
	169	(print_insn): Handle 3-byte opcodes used by Intel Merom New
	170	Instructions.
	171
ff3f9d5b DM	172	2006-02-24 David S. Miller <davem@sunset.davemloft.net>
	173
	174	* sparc-dis.c (v9_priv_reg_names): Add "gl" entry.
	175	(v9_hpriv_reg_names): New table.
	176	(print_insn_sparc): Allow values up to 16 for '?' and '!'.
	177	New cases '$' and '%' for read/write hyperprivileged register.
	178	* sparc-opc.c (sparc_opcodes): Add new entries for UA2005
	179	window handling and rdhpr/wrhpr instructions.
	180
6772dd07 DD	181	2006-02-24 DJ Delorie <dj@redhat.com>
	182
	183	* m32c-desc.c: Regenerate with linker relaxation attributes.
	184	* m32c-desc.h: Likewise.
	185	* m32c-dis.c: Likewise.
	186	* m32c-opc.c: Likewise.
	187
62b3e311 PB	188	2006-02-24 Paul Brook <paul@codesourcery.com>
	189
	190	* arm-dis.c (arm_opcodes): Add V7 instructions.
	191	(thumb32_opcodes): Ditto. Handle V7M MSR/MRS variants.
	192	(print_arm_address): New function.
	193	(print_insn_arm): Use it. Add 'P' and 'U' cases.
	194	(psr_name): New function.
	195	(print_insn_thumb32): Add 'U', 'C' and 'D' cases.
	196
59cf82fe L	197	2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
	198
	199	* ia64-opc-i.c (bXc): New.
	200	(mXc): Likewise.
	201	(OpX2TaTbYaXcC): Likewise.
	202	(TF). Likewise.
	203	(TFCM). Likewise.
	204	(ia64_opcodes_i): Add instructions for tf.
	205
	206	* ia64-opc.h (IMMU5b): New.
	207
	208	* ia64-asmtab.c: Regenerated.
	209
19a7219f L	210	2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
	211
	212	* ia64-gen.c: Update copyright years.
	213	* ia64-opc-b.c: Likewise.
	214
7f3dfb9c L	215	2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
	216
	217	* ia64-gen.c (lookup_regindex): Handle ".vm".
	218	(print_dependency_table): Handle '\"'.
	219
	220	* ia64-ic.tbl: Updated from SDM 2.2.
	221	* ia64-raw.tbl: Likewise.
	222	* ia64-waw.tbl: Likewise.
	223	* ia64-asmtab.c: Regenerated.
	224
	225	* ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.
	226
d70c5fc7 NC	227	2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
	228	Anil Paranjape <anilp1@kpitcummins.com>
	229	Shilin Shakti <shilins@kpitcummins.com>
	230
	231	* xc16x-desc.h: New file
	232	* xc16x-desc.c: New file
	233	* xc16x-opc.h: New file
	234	* xc16x-opc.c: New file
	235	* xc16x-ibld.c: New file
	236	* xc16x-asm.c: New file
	237	* xc16x-dis.c: New file
	238	* Makefile.am: Entries for xc16x
	239	* Makefile.in: Regenerate
	240	* cofigure.in: Add xc16x target information.
	241	* configure: Regenerate.
	242	* disassemble.c: Add xc16x target information.
	243
a1cfb73e L	244	2006-02-11 H.J. Lu <hongjiu.lu@intel.com>
	245
	246	* i386-dis.c (dis386_twobyte): Use "movZ" for debug register
	247	moves.
	248
6dd5059a L	249	2006-02-11 H.J. Lu <hongjiu.lu@intel.com>
	250
	251	* i386-dis.c ('Z'): Add a new macro.
	252	(dis386_twobyte): Use "movZ" for control register moves.
	253
8536c657 NC	254	2006-02-10 Nick Clifton <nickc@redhat.com>
	255
	256	* iq2000-asm.c: Regenerate.
	257
266abb8f NS	258	2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
	259
	260	* m68k-dis.c (print_insn_m68k): Use bfd_m68k_mach_to_features.
	261
f1a64f49 DU	262	2006-01-26 David Ung <davidu@mips.com>
	263
	264	* mips-opc.c: Add I33 masks to these MIPS32R2 instructions: prefx,
	265	ceil.l.d, ceil.l.s, cvt.d.l, cvt.l.d, cvt.l.s, cvt.s.l, floor.l.d,
	266	floor.l.s, ldxc1, lwxc1, madd.d, madd.s, msub.d, msub.s, nmadd.d,
	267	nmadd.s, nmsub.d, nmsub.s, recip.d, recip.s, round.l.d, rsqrt.d,
	268	rsqrt.s, sdxc1, swxc1, trunc.l.d, trunc.l.s.
	269
9e919b5f AM	270	2006-01-18 Arnold Metselaar <arnoldm@sourceware.org>
	271
	272	* z80-dis.c (struct buffer, prt_d, prt_d_n, arit_d, ld_r_d,
	273	ld_d_r, pref_xd_cb): Use signed char to hold data to be
	274	disassembled.
	275	* z80-dis.c (TXTSIZ): Increase buffer size to 24, this fixes
	276	buffer overflows when disassembling instructions like
	277	ld (ix+123),0x23
	278	* z80-dis.c (opc_ind, pref_xd_cb): Suppress '+' in an indexed
	279	operand, if the offset is negative.
	280
c9021189 AM	281	2006-01-17 Arnold Metselaar <arnoldm@sourceware.org>
	282
	283	* z80-dis.c (struct buffer, prt_d, prt_d_n, pref_xd_cb): Use
	284	unsigned char to hold data to be disassembled.
	285
d99b6465 AS	286	2006-01-17 Andreas Schwab <schwab@suse.de>
	287
	288	PR binutils/1486
	289	* disassemble.c (disassemble_init_for_target): Set
	290	disassembler_needs_relocs for bfd_arch_arm.
	291
c2fe9327 PB	292	2006-01-16 Paul Brook <paul@codesourcery.com>
c2fe9327 PB	293
e88d958a	294	* m68k-opc.c (m68k_opcodes): Fix opcodes for ColdFire f?abss,
c2fe9327 PB	295	f?add?, and f?sub? instructions.
c2fe9327 PB	296
32fba81d NC	297	2006-01-16 Nick Clifton <nickc@redhat.com>
	298
	299	* po/zh_CN.po: New Chinese (simplified) translation.
	300	* configure.in (ALL_LINGUAS): Add "zh_CH".
	301	* configure: Regenerate.
	302
1b3a26b5 PB	303	2006-01-05 Paul Brook <paul@codesourcery.com>
	304
	305	* m68k-opc.c (m68k_opcodes): Add missing ColdFire fdsqrtd entry.
	306
db313fa6 DD	307	2006-01-06 DJ Delorie <dj@redhat.com>
	308
	309	* m32c-desc.c: Regenerate.
	310	* m32c-opc.c: Regenerate.
	311	* m32c-opc.h: Regenerate.
	312
54d46aca DD	313	2006-01-03 DJ Delorie <dj@redhat.com>
	314
	315	* cgen-ibld.in (extract_normal): Avoid memory range errors.
	316	* m32c-ibld.c: Regenerated.
	317
e88d958a	318	For older changes see ChangeLog-2005
252b5132 RH	319	\f
252b5132 RH	320	Local Variables:
2f6d2f85 NC	321	mode: change-log
	322	left-margin: 8
	323	fill-column: 74
252b5132 RH	324	version-control: never
252b5132 RH	325	End: