2006-05-03 H.J. Lu <hongjiu.lu@intel.com>
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
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022fac6d
TS
12006-05-02 Thiemo Seufer <ths@mips.com>
2 Nigel Stephens <nigel@mips.com>
3 David Ung <davidu@mips.com>
4
5 * mips-dis.c (print_insn_args): Force mips16 to odd addresses.
6 (print_mips16_insn_arg): Force mips16 to odd addresses.
7
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82006-04-30 Thiemo Seufer <ths@mips.com>
9 David Ung <davidu@mips.com>
10
11 * mips-opc.c (mips_builtin_opcodes): Add udi instructions
12 "udi0" to "udi15".
13 * mips-dis.c (print_insn_args): Adds udi argument handling.
14
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JW
152006-04-28 James E Wilson <wilson@specifix.com>
16
17 * m68k-dis.c (match_insn_m68k): Restore fprintf_func before printing
18 error message.
19
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202006-04-28 Thiemo Seufer <ths@mips.com>
21 David Ung <davidu@mips.com>
bdb09db1 22 Nigel Stephens <nigel@mips.com>
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23
24 * mips-dis.c (mips_cp0sel_names_mips3264r2): Add MT register
25 names.
26
cc0ca239 272006-04-28 Thiemo Seufer <ths@mips.com>
bdb09db1 28 Nigel Stephens <nigel@mips.com>
cc0ca239
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29 David Ung <davidu@mips.com>
30
31 * mips-dis.c (print_insn_args): Add mips_opcode argument.
32 (print_insn_mips): Adjust print_insn_args call.
33
0d09bfe6 342006-04-28 Thiemo Seufer <ths@mips.com>
bdb09db1 35 Nigel Stephens <nigel@mips.com>
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36
37 * mips-dis.c (print_insn_args): Print $fcc only for FP
38 instructions, use $cc elsewise.
39
654c225a 402006-04-28 Thiemo Seufer <ths@mips.com>
bdb09db1 41 Nigel Stephens <nigel@mips.com>
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42
43 * opcodes/mips-dis.c (mips16_to_32_reg_map, mips16_reg_names):
44 Map MIPS16 registers to O32 names.
45 (print_mips16_insn_arg): Use mips16_reg_names.
46
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472006-04-26 Julian Brown <julian@codesourcery.com>
48
49 * arm-dis.c (print_insn_neon): Disassemble floating-point constant
50 VMOV.
51
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522006-04-26 Nathan Sidwell <nathan@codesourcery.com>
53 Julian Brown <julian@codesourcery.com>
54
55 * opcodes/arm-dis.c (coprocessor_opcodes): Add %A, %B, %k, convert
56 %<code>[zy] into %[zy]<code>. Expand meaning of %<bitfield>['`?].
57 Add unified load/store instruction names.
58 (neon_opcode_table): New.
59 (arm_opcodes): Expand meaning of %<bitfield>['`?].
60 (arm_decode_bitfield): New.
61 (print_insn_coprocessor): Add pc argument. Add %A & %B specifiers.
62 Use arm_decode_bitfield and adjust numeric specifiers. Adjust %z & %y.
63 (print_insn_neon): New.
64 (print_insn_arm): Adjust print_insn_coprocessor call. Call
65 print_insn_neon. Use arm_decode_bitfield and adjust numeric specifiers.
66 (print_insn_thumb32): Likewise.
67
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682006-04-19 Alan Modra <amodra@bigpond.net.au>
69
70 * Makefile.am: Run "make dep-am".
71 * Makefile.in: Regenerate.
72
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732006-04-19 Alan Modra <amodra@bigpond.net.au>
74
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75 * avr-dis.c (avr_operand): Warning fix.
76
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77 * configure: Regenerate.
78
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792006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
80
81 * po/POTFILES.in: Regenerated.
82
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832006-04-12 Hochstein <hochstein@algo.informatik.tu-darmstadt.de>
84
85 PR binutils/2454
86 * avr-dis.c (avr_operand): Arrange for a comment to appear before
87 the symolic form of an address, so that the output of objdump -d
88 can be reassembled.
89
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902006-04-10 DJ Delorie <dj@redhat.com>
91
92 * m32c-asm.c: Regenerate.
93
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942006-04-06 Carlos O'Donell <carlos@codesourcery.com>
95
96 * Makefile.am: Add install-html target.
97 * Makefile.in: Regenerate.
98
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992006-04-06 Nick Clifton <nickc@redhat.com>
100
101 * po/vi/po: Updated Vietnamese translation.
102
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1032006-03-31 Paul Koning <ni1d@arrl.net>
104
105 * pdp11-opc.c (pdp11_opcodes): Fix opcode for SEC instruction.
106
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1072006-03-16 Bernd Schmidt <bernd.schmidt@analog.com>
108
109 * bfin-dis.c (decode_dsp32shiftimm_0): Simplify and correct the
110 logic to identify halfword shifts.
111
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1122006-03-16 Paul Brook <paul@codesourcery.com>
113
114 * arm-dis.c (arm_opcodes): Rename swi to svc.
115 (thumb_opcodes): Ditto.
116
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1172006-03-13 DJ Delorie <dj@redhat.com>
118
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119 * m32c-asm.c: Regenerate.
120 * m32c-desc.c: Likewise.
121 * m32c-desc.h: Likewise.
122 * m32c-dis.c: Likewise.
123 * m32c-ibld.c: Likewise.
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DD
124 * m32c-opc.c: Likewise.
125 * m32c-opc.h: Likewise.
126
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1272006-03-10 DJ Delorie <dj@redhat.com>
128
129 * m32c-desc.c: Regenerate with mul.l, mulu.l.
130 * m32c-opc.c: Likewise.
131 * m32c-opc.h: Likewise.
132
133
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1342006-03-09 Nick Clifton <nickc@redhat.com>
135
136 * po/sv.po: Updated Swedish translation.
137
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1382006-03-07 H.J. Lu <hongjiu.lu@intel.com>
139
140 PR binutils/2428
141 * i386-dis.c (REP_Fixup): New function.
142 (AL): Remove duplicate.
143 (Xbr): New.
144 (Xvr): Likewise.
145 (Ybr): Likewise.
146 (Yvr): Likewise.
147 (indirDXr): Likewise.
148 (ALr): Likewise.
149 (eAXr): Likewise.
150 (dis386): Updated entries of ins, outs, movs, lods and stos.
151
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1522006-03-05 Nick Clifton <nickc@redhat.com>
153
154 * cgen-ibld.in (insert_normal): Cope with attempts to insert a
155 signed 32-bit value into an unsigned 32-bit field when the host is
156 a 64-bit machine.
157 * fr30-ibld.c: Regenerate.
158 * frv-ibld.c: Regenerate.
159 * ip2k-ibld.c: Regenerate.
160 * iq2000-asm.c: Regenerate.
161 * iq2000-ibld.c: Regenerate.
162 * m32c-ibld.c: Regenerate.
163 * m32r-ibld.c: Regenerate.
164 * openrisc-ibld.c: Regenerate.
165 * xc16x-ibld.c: Regenerate.
166 * xstormy16-ibld.c: Regenerate.
167
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1682006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
169
170 * xc16x-asm.c: Regenerate.
171 * xc16x-dis.c: Regenerate.
c7d41dc5 172
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1732006-02-27 Carlos O'Donell <carlos@codesourcery.com>
174
175 * po/Make-in: Add html target.
176
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1772006-02-27 H.J. Lu <hongjiu.lu@intel.com>
178
179 * i386-dis.c (IS_3BYTE_OPCODE): New for 3-byte opcodes used by
180 Intel Merom New Instructions.
181 (THREE_BYTE_0): Likewise.
182 (THREE_BYTE_1): Likewise.
183 (three_byte_table): Likewise.
184 (dis386_twobyte): Use THREE_BYTE_0 for entry 0x38. Use
185 THREE_BYTE_1 for entry 0x3a.
186 (twobyte_has_modrm): Updated.
187 (twobyte_uses_SSE_prefix): Likewise.
188 (print_insn): Handle 3-byte opcodes used by Intel Merom New
189 Instructions.
190
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1912006-02-24 David S. Miller <davem@sunset.davemloft.net>
192
193 * sparc-dis.c (v9_priv_reg_names): Add "gl" entry.
194 (v9_hpriv_reg_names): New table.
195 (print_insn_sparc): Allow values up to 16 for '?' and '!'.
196 New cases '$' and '%' for read/write hyperprivileged register.
197 * sparc-opc.c (sparc_opcodes): Add new entries for UA2005
198 window handling and rdhpr/wrhpr instructions.
199
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DD
2002006-02-24 DJ Delorie <dj@redhat.com>
201
202 * m32c-desc.c: Regenerate with linker relaxation attributes.
203 * m32c-desc.h: Likewise.
204 * m32c-dis.c: Likewise.
205 * m32c-opc.c: Likewise.
206
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2072006-02-24 Paul Brook <paul@codesourcery.com>
208
209 * arm-dis.c (arm_opcodes): Add V7 instructions.
210 (thumb32_opcodes): Ditto. Handle V7M MSR/MRS variants.
211 (print_arm_address): New function.
212 (print_insn_arm): Use it. Add 'P' and 'U' cases.
213 (psr_name): New function.
214 (print_insn_thumb32): Add 'U', 'C' and 'D' cases.
215
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2162006-02-23 H.J. Lu <hongjiu.lu@intel.com>
217
218 * ia64-opc-i.c (bXc): New.
219 (mXc): Likewise.
220 (OpX2TaTbYaXcC): Likewise.
221 (TF). Likewise.
222 (TFCM). Likewise.
223 (ia64_opcodes_i): Add instructions for tf.
224
225 * ia64-opc.h (IMMU5b): New.
226
227 * ia64-asmtab.c: Regenerated.
228
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2292006-02-23 H.J. Lu <hongjiu.lu@intel.com>
230
231 * ia64-gen.c: Update copyright years.
232 * ia64-opc-b.c: Likewise.
233
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2342006-02-22 H.J. Lu <hongjiu.lu@intel.com>
235
236 * ia64-gen.c (lookup_regindex): Handle ".vm".
237 (print_dependency_table): Handle '\"'.
238
239 * ia64-ic.tbl: Updated from SDM 2.2.
240 * ia64-raw.tbl: Likewise.
241 * ia64-waw.tbl: Likewise.
242 * ia64-asmtab.c: Regenerated.
243
244 * ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.
245
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2462006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
247 Anil Paranjape <anilp1@kpitcummins.com>
248 Shilin Shakti <shilins@kpitcummins.com>
249
250 * xc16x-desc.h: New file
251 * xc16x-desc.c: New file
252 * xc16x-opc.h: New file
253 * xc16x-opc.c: New file
254 * xc16x-ibld.c: New file
255 * xc16x-asm.c: New file
256 * xc16x-dis.c: New file
257 * Makefile.am: Entries for xc16x
258 * Makefile.in: Regenerate
259 * cofigure.in: Add xc16x target information.
260 * configure: Regenerate.
261 * disassemble.c: Add xc16x target information.
262
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2632006-02-11 H.J. Lu <hongjiu.lu@intel.com>
264
265 * i386-dis.c (dis386_twobyte): Use "movZ" for debug register
266 moves.
267
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2682006-02-11 H.J. Lu <hongjiu.lu@intel.com>
269
270 * i386-dis.c ('Z'): Add a new macro.
271 (dis386_twobyte): Use "movZ" for control register moves.
272
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2732006-02-10 Nick Clifton <nickc@redhat.com>
274
275 * iq2000-asm.c: Regenerate.
276
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2772006-02-07 Nathan Sidwell <nathan@codesourcery.com>
278
279 * m68k-dis.c (print_insn_m68k): Use bfd_m68k_mach_to_features.
280
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DU
2812006-01-26 David Ung <davidu@mips.com>
282
283 * mips-opc.c: Add I33 masks to these MIPS32R2 instructions: prefx,
284 ceil.l.d, ceil.l.s, cvt.d.l, cvt.l.d, cvt.l.s, cvt.s.l, floor.l.d,
285 floor.l.s, ldxc1, lwxc1, madd.d, madd.s, msub.d, msub.s, nmadd.d,
286 nmadd.s, nmsub.d, nmsub.s, recip.d, recip.s, round.l.d, rsqrt.d,
287 rsqrt.s, sdxc1, swxc1, trunc.l.d, trunc.l.s.
288
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2892006-01-18 Arnold Metselaar <arnoldm@sourceware.org>
290
291 * z80-dis.c (struct buffer, prt_d, prt_d_n, arit_d, ld_r_d,
292 ld_d_r, pref_xd_cb): Use signed char to hold data to be
293 disassembled.
294 * z80-dis.c (TXTSIZ): Increase buffer size to 24, this fixes
295 buffer overflows when disassembling instructions like
296 ld (ix+123),0x23
297 * z80-dis.c (opc_ind, pref_xd_cb): Suppress '+' in an indexed
298 operand, if the offset is negative.
299
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AM
3002006-01-17 Arnold Metselaar <arnoldm@sourceware.org>
301
302 * z80-dis.c (struct buffer, prt_d, prt_d_n, pref_xd_cb): Use
303 unsigned char to hold data to be disassembled.
304
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AS
3052006-01-17 Andreas Schwab <schwab@suse.de>
306
307 PR binutils/1486
308 * disassemble.c (disassemble_init_for_target): Set
309 disassembler_needs_relocs for bfd_arch_arm.
310
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PB
3112006-01-16 Paul Brook <paul@codesourcery.com>
312
e88d958a 313 * m68k-opc.c (m68k_opcodes): Fix opcodes for ColdFire f?abss,
c2fe9327
PB
314 f?add?, and f?sub? instructions.
315
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NC
3162006-01-16 Nick Clifton <nickc@redhat.com>
317
318 * po/zh_CN.po: New Chinese (simplified) translation.
319 * configure.in (ALL_LINGUAS): Add "zh_CH".
320 * configure: Regenerate.
321
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3222006-01-05 Paul Brook <paul@codesourcery.com>
323
324 * m68k-opc.c (m68k_opcodes): Add missing ColdFire fdsqrtd entry.
325
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3262006-01-06 DJ Delorie <dj@redhat.com>
327
328 * m32c-desc.c: Regenerate.
329 * m32c-opc.c: Regenerate.
330 * m32c-opc.h: Regenerate.
331
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DD
3322006-01-03 DJ Delorie <dj@redhat.com>
333
334 * cgen-ibld.in (extract_normal): Avoid memory range errors.
335 * m32c-ibld.c: Regenerated.
336
e88d958a 337For older changes see ChangeLog-2005
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338\f
339Local Variables:
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340mode: change-log
341left-margin: 8
342fill-column: 74
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343version-control: never
344End:
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