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[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
5f15756d
L		 12007-06-25 H.J. Lu <hongjiu.lu@intel.com>
2
3 * i386-opc.h (regKludge): Renamed to ...
4 (RegKludge): This.
5
6 * i386-opc.c (i386_optab): Replace regKludge with RegKludge.
7
09a2c6cf
L		 82007-06-23 H.J. Lu <hongjiu.lu@intel.com>
9
10 PR binutils/4667
11 * i386-dis.c (EX): Removed.
12 (EMd): New.
13 (EMq): Likewise.
14 (EXd): Likewise.
15 (EXq): Likewise.
16 (EXx): Likewise.
17 (PREGRP93...PREGRP97): Likewise.
18 (dis386_twobyte): Updated.
19 (prefix_user_table): Updated. Add PREGRP93...PREGRP97.
20 (OP_EX): Remove Intel syntax handling.
21
ddefa7f5
KH		 222007-06-18 Nathan Sidwell <nathan@codesourcery.com>
23
24 * m68k-opc.c (m68k_opcodes): Add wdebugl variants.
25
79887925
L		 262007-06-14 H.J. Lu <hongjiu.lu@intel.com>
27
28 * Makefile.am (ACLOCAL_AMFLAGS): Add -I ../config -I ../bfd.
29
30 * acinclude.m4: Removed.
31
32 * Makefile.in: Regenerated.
33 * doc/Makefile.in: Likewise.
34 * aclocal.m4: Likewise.
35 * configure: Likewise.
36
79d49516
PB		 372007-06-05 Paul Brook <paul@codesourcery.com>
38
39 * arm-dis.c (thumb32_opcodes): Display writeback ldrd/strd addresses.
40
37ad9514
SE		 412007-05-24 Steve Ellcey <sje@cup.hp.com>
42
43 * Makefile.in: Regnerate.
44 * configure: Regenerate.
45 * aclocal.m4: Regenerate.
46
65b650b4
AM		 472007-05-18 Alan Modra <amodra@bigpond.net.au>
48
49 * ppc-dis.c (print_insn_powerpc): Don't skip all operands
50 after setting skip_optional.
51
ea192fa3
PB		 522007-05-16 Peter Bergner <bergner@vnet.ibm.com>
53
54 * ppc-dis.c (operand_value_powerpc, skip_optional_operands): New.
55 (print_insn_powerpc): Use the new operand_value_powerpc and
56 skip_optional_operands functions to omit or print all optional
57 operands as a group.
58 * ppc-opc.c (BFF, W, XFL_L, XWRA_MASK): New.
59 (XFL_MASK): Delete L and W bits from the mask.
60 (mtfsfi, mtfsfi.): Replace use of BF with BFF. Relpace use of XRA_MASK
61 with XWRA_MASK. Use W.
62 (mtfsf, mtfsf.): Use XFL_L and W.
63
9beff690
L		 642007-05-14 H.J. Lu <hongjiu.lu@intel.com>
65
66 PR binutils/4502
67 * i386-dis.c (Suffix3DNow): Replace "pfmulhrw" with "pmulhrw".
68
4d67a4d3
L		 692007-05-10 H.J. Lu <hongjiu.lu@intel.com>
70
71 * i386-opc.h (ShortForm): Redefined.
72 (Jump): Likewise.
73 (JumpDword): Likewise.
74 (JumpByte): Likewise.
75 (JumpInterSegment): Likewise.
76 (FloatMF): Likewise.
77 (FloatR): Likewise.
78 (FloatD): Likewise.
79 (Size16): Likewise.
80 (Size32): Likewise.
81 (Size64): Likewise.
82 (IgnoreSize): Likewise.
83 (DefaultSize): Likewise.
84 (No_bSuf): Likewise.
85 (No_wSuf): Likewise.
86 (No_lSuf): Likewise.
87 (No_sSuf): Likewise.
88 (No_qSuf): Likewise.
89 (No_xSuf): Likewise.
90 (FWait): Likewise.
91 (IsString): Likewise.
92 (regKludge): Likewise.
93 (IsPrefix): Likewise.
94 (ImmExt): Likewise.
95 (NoRex64): Likewise.
96 (Rex64): Likewise.
97 (Ugh): Likewise.
98
8de28984
L		 992007-05-07 H.J. Lu <hongjiu.lu@intel.com>
100
101 * i386-dis.c (threebyte_0x38_uses_DATA_prefix): Correct entries
102 for some SSE4 instructions.
103 (threebyte_0x3a_uses_DATA_prefix): Likewise.
104
20592a94
L		 1052007-05-03 H.J. Lu <hongjiu.lu@intel.com>
106
107 * i386-dis.c (CRC32_Fixup): Don't print suffix in Intel mode.
108
109 * i386-opc.c (i386_optab): Remove IgnoreSize and correct operand
110 type for crc32.
111
9344ff29
L		 1122007-05-01 H.J. Lu <hongjiu.lu@intel.com>
113
114 * i386-dis.c (CRC32_Fixup): Properly handle Intel mode and
115 check data size prefix in 16bit mode.
116
117 * i386-opc.c (i386_optab): Default crc32 to non-8bit and
118 support Intel mode.
119
53289dcd 1202007-04-30 Mark Salter <msalter@redhat.com>
65b650b4 121
53289dcd
MS		 122 * frv-desc.c: Regenerate.
123 * frv-desc.h: Regenerate.
65b650b4 124
eb42fac1
AM		 1252007-04-30 Alan Modra <amodra@bigpond.net.au>
126
127 PR 4436
128 * ppc-opc.c (powerpc_operands): Correct bitm for second entry of MBE.
129
484c222e
L		 1302007-04-27 H.J. Lu <hongjiu.lu@intel.com>
131
132 * i386-dis.c (modrm): Put reg before rm.
133
5d669648
L		 1342007-04-26 H.J. Lu <hongjiu.lu@intel.com>
135
136 PR binutils/4430
137 * i386-dis.c (print_displacement): New.
138 (OP_E): Call print_displacement instead of print_operand_value
139 to output displacement when either base or index exist. Print
140 the explicit zero displacement in 16bit mode.
141
185b1163
L		 1422007-04-26 H.J. Lu <hongjiu.lu@intel.com>
143
144 PR binutils/4429
145 * i386-dis.c (print_insn): Also swap the order of op_riprel
146 when swapping op_index. Break when the RIP relative address
147 is printed.
148 (OP_E): Properly handle RIP relative addressing and print the
149 explicit zero displacement for Intel mode.
150
eddc20ad
AM		 1512007-04-27 Alan Modra <amodra@bigpond.net.au>
152
153 * Makefile.am: Run "make dep-am".
154 * Makefile.in: Regenerate.
155 * ns32k-dis.c: Include sysdep.h first.
156
dacc8b01
MS		 1572007-04-24 Andreas Krebbel <krebbel1@de.ibm.com>
158
159 * opcodes/s390-opc.c (MASK_SSF_RRDRD): Fourth nybble belongs to the
160 opcode.
eddc20ad
AM		 161 * opcodes/s390-opc.txt (pfpo, ectg, csst): Add new z9-ec instructions.
162
fbb92301
NC		 1632007-04-24 Nick Clifton <nickc@redhat.com>
164
165 * arm-dis.c (print_insn): Initialise type.
166
4c273957
AM		 1672007-04-24 Alan Modra <amodra@bigpond.net.au>
168
169 * cgen-types.h: Include bfd_stdint.h, not stdint.h.
170 * Makefile.am: Run "make dep-am".
171 * Makefile.in: Regenerate.
172
9a2e615a
NS		 1732007-04-23 Nathan Sidwell <nathan@codesourcery.com>
174
175 * m68k-opc.c: Mark mcfisa_c instructions.
176
37b37b2d
RE		 1772007-04-21 Richard Earnshaw <rearnsha@arm.com>
178
179 * arm-dis.c (arm_opcodes): Disassemble to unified syntax.
180 (thumb_opcodes): Add missing white space in adr.
65b650b4 181 (arm_decode_shift): New parameter, print_shift. Only decode the
37b37b2d
RE		 182 shift parameter if set. Adjust callers.
183 (print_insn_arm): Support for operand type q with no shift decode.
184
717bbdf1
AM		 1852007-04-21 Alan Modra <amodra@bigpond.net.au>
186
db557034
AM		 187 * i386-opc.c (i386_float_regtab, i386_float_regtab_size): Delete.
188 Move contents to..
189 (i386_regtab): ..here.
190 * i386-opc.h (i386_float_regtab, i386_float_regtab_size): Delete.
191
717bbdf1
AM		 192 * ppc-opc.c (powerpc_operands): Delete duplicate entries.
193 (BA_MASK, FXM_MASK, STRM_MASK, VA_MASK, VB_MASK, VC_MASK): Delete.
194 (VD_MASK, WS_MASK, MTMSRD_L, XRT_L): Delete.
195 (powerpc_opcodes): Replace uses of MTMSRD_L and XRT_L.
196
78336706
NS		 1972007-04-20 Nathan Sidwell <nathan@codesourcery.com>
198
199 * m68k-dis.c (print_insn_arg): Show c04 as rambar0 and c05 as
200 rambar1.
201
b84bf58a
AM		 2022007-04-20 Alan Modra <amodra@bigpond.net.au>
203
204 * ppc-dis.c (print_insn_powerpc): Adjust for struct powerpc_operand
205 change.
206 * ppc-opc.c (powerpc_operands): Replace bit count with bit mask
207 in all entries. Add PPC_OPERAND_SIGNED to DE entry. Remove
208 references to following deleted functions.
209 (insert_bd, extract_bd, insert_dq, extract_dq): Delete.
210 (insert_ds, extract_ds, insert_de, extract_de): Delete.
211 (insert_des, extract_des, insert_li, extract_li): Delete.
212 (insert_nb, insert_rsq, insert_rtq, insert_ev2, extract_ev2): Delete.
213 (insert_ev4, extract_ev4, insert_ev8, extract_ev8): Delete.
214 (num_powerpc_operands): New constant.
215 (XSPRG_MASK): Remove entire SPRG field.
216 (powerpc_opcodes <bcctre, bcctrel>): Use XLBB_MASK not XLYBB_MASK.
217
0bbdef92
AM		 2182007-04-20 Alan Modra <amodra@bigpond.net.au>
219
220 * ppc-opc.c (DCM, DGM, TE, RMC, R, SP, S): Correct shift.
221 (Z2_MASK): Define.
222 (powerpc_opcodes): Use Z2_MASK in all insns taking RMC operand.
223
86ad2a13
RE		 2242007-04-20 Richard Earnshaw <rearnsha@arm.com>
225
226 * arm-dis.c (print_insn): Only look for a mapping symbol in the section
227 being disassembled.
228
a33e055d
AM		 2292007-04-19 Alan Modra <amodra@bigpond.net.au>
230
231 * Makefile.am: Run "make dep-am".
232 * Makefile.in: Regenerate.
233 * po/POTFILES.in: Regenerate.
234
360b1600
AM		 2352007-04-19 Alan Modra <amodra@bigpond.net.au>
236
237 * ppc-opc.c (powerpc_opcodes): Add cctpl, cctpm, cctph, db8cyc,
238 db10cyc, db12cyc, db16cyc.
239
b20ae55e
AM		 2402007-04-19 Nathan Froyd <froydnj@codesourcery.com>
241
242 * ppc-opc.c (powerpc_opcodes): Recognize three-operand tlbsxe.
243
381d071f
L		 2442007-04-18 H.J. Lu <hongjiu.lu@intel.com>
245
246 * i386-dis.c (CRC32_Fixup): New.
247 (PREGRP85, PREGRP86, PREGRP87, PREGRP88, PREGRP89, PREGRP90,
248 PREGRP91): New.
249 (threebyte_0x38_uses_DATA_prefix): Updated for SSE4.2.
250 (threebyte_0x3a_uses_DATA_prefix): Likewise.
251 (prefix_user_table): Add PREGRP85, PREGRP86, PREGRP87,
252 PREGRP88, PREGRP89, PREGRP90 and PREGRP91.
253 (three_byte_table): Likewise.
254
255 * i386-opc.c (i386_optab): Add SSE4.2 opcodes.
256
f6fdceb7 257 * i386-opc.h (CpuSSE4_2): New.
381d071f
L		 258 (CpuSSE4): Likewise.
259 (CpuUnknownFlags): Add CpuSSE4_2.
260
42903f7f
L		 2612007-04-18 H.J. Lu <hongjiu.lu@intel.com>
262
263 * i386-dis.c (XMM_Fixup): New.
264 (Edqb): New.
265 (Edqd): New.
266 (XMM0): New.
267 (dqb_mode): New.
268 (dqd_mode): New.
269 (PREGRP39 ... PREGRP85): New.
270 (threebyte_0x38_uses_DATA_prefix): Updated for SSE4.
271 (threebyte_0x3a_uses_DATA_prefix): Likewise.
272 (prefix_user_table): Add PREGRP39 ... PREGRP85.
273 (three_byte_table): Likewise.
274 (putop): Handle 'K'.
275 (intel_operand_size): Handle dqb_mode, dqd_mode):
276 (OP_E): Likewise.
277 (OP_G): Likewise.
278
279 * i386-opc.c (i386_optab): Add SSE4.1 opcodes.
280
281 * i386-opc.h (CpuSSE4_1): New.
282 (CpuUnknownFlags): Add CpuSSE4_1.
283 (regKludge): Update comment.
284
ee5c21a0
DJ		 2852007-04-18 Matthias Klose <doko@ubuntu.com>
286
287 * Makefile.am (libopcodes_la_LDFLAGS): Use bfd soversion.
288 * Makefile.in: Regenerate.
289
b7d19ba6
SE		 2902007-04-14 Steve Ellcey <sje@cup.hp.com>
291
292 * Makefile.am: Add ACLOCAL_AMFLAGS.
293 * Makefile.in: Regenerate.
294
246c51aa
L		 2952007-04-13 H.J. Lu <hongjiu.lu@intel.com>
296
297 * i386-dis.c: Remove trailing white spaces.
6e26e51a
L		 298 * i386-opc.c: Likewise.
299 * i386-opc.h: Likewise.
246c51aa 300
7967e09e
L		 3012007-04-11 H.J. Lu <hongjiu.lu@intel.com>
302
303 PR binutils/4333
304 * i386-dis.c (GRP1a): New.
305 (GRP1b ... GRPPADLCK2): Update index.
306 (dis386): Use GRP1a for entry 0x8f.
307 (mod, rm, reg): Removed. Replaced by ...
308 (modrm): This.
309 (grps): Add GRP1a.
310
56dc1f8a
KH		 3112007-04-09 Kazu Hirata <kazu@codesourcery.com>
312
313 * m68k-dis.c (print_insn_m68k): Restore info->fprintf_func and
314 info->print_address_func if longjmp is called.
315
144f4bc6
DD		 3162007-03-29 DJ Delorie <dj@redhat.com>
317
318 * m32c-desc.c: Regenerate.
319 * m32c-dis.c: Regenerate.
320 * m32c-opc.c: Regenerate.
321
e72cf3ec
L		 3222007-03-28 H.J. Lu <hongjiu.lu@intel.com>
323
324 * i386-opc.c (i386_optab): Change InvMem to RegMem for mov and
325 movq. Remove InvMem from sldt, smsw and str.
326
327 * i386-opc.h (InvMem): Renamed to ...
328 (RegMem): Update comments.
329 (AnyMem): Remove InvMem.
330
831480e9 3312007-03-27 Paul Brook <paul@codesourcery.com>
b74ed8f5 332
b74ed8f5
PB		 333 * arm-dis.c (thumb_opcodes): Add entry for undefined insns (0xbe??).
334
4146fd53
PB		 3352007-03-24 Paul Brook <paul@codesourcery.com>
336
337 * arm-dis.c (coprocessor_opcodes): Remove superfluous 0x.
338 (print_insn_coprocessor): Handle %<bitfield>x.
339
b6702015 3402007-03-24 Paul Brook <paul@codesourcery.com>
e72cf3ec 341 Mark Shinwell <shinwell@codesourcery.com>
b6702015
PB		 342
343 * arm-dis.c (arm_opcodes): Print SRS base register.
344
831480e9 3452007-03-23 H.J. Lu <hongjiu.lu@intel.com>
0003779b
L		 346
347 * i386-dis.c (prefix_name): Replace rex64XYZ with rex.WRXB.
348
349 * i386-opc.c (i386_optab): Add rex.wrxb.
350
831480e9 3512007-03-21 H.J. Lu <hongjiu.lu@intel.com>
161a04f6
L		 352
353 * i386-dis.c (REX_MODE64): Remove definition.
354 (REX_EXTX): Likewise.
355 (REX_EXTY): Likewise.
356 (REX_EXTZ): Likewise.
357 (USED_REX): Use REX_OPCODE instead of 0x40.
358 Replace REX_MODE64, REX_EXTX, REX_EXTY and REX_EXTZ with REX_W,
359 REX_R, REX_X and REX_B respectively.
360
831480e9 3612007-03-21 H.J. Lu <hongjiu.lu@intel.com>
8b38ad71
L		 362
363 PR binutils/4218
364 * i386-dis.c (PREGRP38): New.
365 (dis386): Use PREGRP38 for 0x90.
366 (prefix_user_table): Add PREGRP38.
367 (print_insn): Set uses_REPZ_prefix to 1 for pause.
368 (NOP_Fixup1): Properly handle REX bits.
369 (NOP_Fixup2): Likewise.
370
371 * i386-opc.c (i386_optab): Allow %eax with xchg in 64bit.
372 Allow register with nop.
373
75b06e7b
DD		 3742007-03-20 DJ Delorie <dj@redhat.com>
375
376 * m32c-asm.c: Regenerate.
377 * m32c-desc.c: Regenerate.
378 * m32c-desc.h: Regenerate.
379 * m32c-dis.h: Regenerate.
380 * m32c-ibld.c: Regenerate.
381 * m32c-opc.c: Regenerate.
382 * m32c-opc.h: Regenerate.
383
c3fe08fa
L		 3842007-03-15 H.J. Lu <hongjiu.lu@intel.com>
385
386 * i386-opc.c: Include "libiberty.h".
387 (i386_regtab): Remove the last entry.
388 (i386_regtab_size): New.
389 (i386_float_regtab_size): Likewise.
390
391 * i386-opc.h (i386_regtab_size): New.
392 (i386_float_regtab_size): Likewise.
393
0b1cf022
L		 3942007-03-15 H.J. Lu <hongjiu.lu@intel.com>
395
396 * Makefile.am (CFILES): Add i386-opc.c.
397 (ALL_MACHINES): Add i386-opc.lo.
398 Run "make dep-am".
399 * Makefile.in: Regenerated.
400
401 * configure.in: Add i386-opc.lo for bfd_i386_arch.
402 * configure: Regenerated.
403
404 * i386-dis.c: Include "opcode/i386.h".
405 (MAXLEN): Renamed to MAX_MNEM_SIZE. Remove definition.
406 (FWAIT_OPCODE): Remove definition.
407 (UNIXWARE_COMPAT): Renamed to SYSV386_COMPAT. Remove definition.
408 (MAX_OPERANDS): Remove definition.
409
410 * i386-opc.c: New file.
411 * i386-opc.h: Likewise.
412
56eced12
L		 4132007-03-15 H.J. Lu <hongjiu.lu@intel.com>
414
415 * Makefile.in: Regenerated.
416
6f74c397
L		 4172007-03-09 H.J. Lu <hongjiu.lu@intel.com>
418
419 * i386-dis.c (OP_Rd): Renamed to ...
420 (OP_R): This.
421 (Rd): Updated.
422 (Rm): Likewise.
423
a6d04ec4
AM		 4242007-03-08 Alan Modra <amodra@bigpond.net.au>
425
1620f33d
AM		 426 * fr30-asm.c: Regenerate.
427 * frv-asm.c: Regenerate.
428 * ip2k-asm.c: Regenerate.
429 * iq2000-asm.c: Regenerate.
430 * m32c-asm.c: Regenerate.
431 * m32r-asm.c: Regenerate.
432 * m32r-dis.c: Regenerate.
433 * mt-asm.c: Regenerate.
434 * mt-ibld.c: Regenerate.
435 * mt-opc.c: Regenerate.
436 * openrisc-asm.c: Regenerate.
437 * xc16x-asm.c: Regenerate.
438 * xstormy16-asm.c: Regenerate.
439
a6d04ec4
AM		 440 * Makefile.am: Run "make dep-am".
441 * Makefile.in: Regenerate.
442 * po/POTFILES.in: Regenerate.
443
b5639b37
MS		 4442007-03-06 Andreas Krebbel <krebbel1@de.ibm.com>
445
446 * opcodes/s390-opc.c (INSTR_RRE_FR, INSTR_RRF_F0FF2, INSTR_RRF_F0FR,
447 INSTR_RRF_UUFF, INSTR_RRF_0UFF, INSTR_RRF_FFFU, INSTR_RRR_F0FF): New
448 instruction formats added.
449 (MASK_RRE_FR, MASK_RRF_F0FF2, MASK_RRF_F0FR, MASK_RRF_UUFF,
450 MASK_RRF_0UFF, MASK_RRF_FFFU, MASK_RRR_F0FF): New instruction format
451 masks added.
452 * opcodes/s390-opc.txt (lpdfr - tgxt): Decimal floating point
453 instructions added.
454 * opcodes/s390-mkopc.c (s390_opcode_cpu_val): S390_OPCODE_Z9_EC added.
455 (main): z9-ec cpu type option added.
456 * include/opcode/s390.h (s390_opcode_cpu_val): S390_OPCODE_Z9_EC added.
457
b2e818b7
DD		 4582007-02-22 DJ Delorie <dj@redhat.com>
459
460 * s390-opc.c (INSTR_SS_L2RDRD): New.
461 (MASK_SS_L2RDRD): New.
462 * s390-opc.txt (pka): Use it.
463
8b082fb1
TS		 4642007-02-20 Thiemo Seufer <ths@mips.com>
465 Chao-Ying Fu <fu@mips.com>
466
467 * mips-dis.c (mips_arch_choices): Add DSP R2 support.
468 (print_insn_args): Add support for balign instruction.
469 * mips-opc.c (D33): New shortcut for DSP R2 instructions.
470 (mips_builtin_opcodes): Add DSP R2 instructions.
471
929e4d1a
MS		 4722007-02-19 Andreas Krebbel <krebbel1@de.ibm.com>
473
474 * s390-opc.c (INSTR_RRF_U0FR, MASK_RRF_U0FR): Removed.
475 (INSTR_RRF_U0RF, MASK_RRF_U0RF): Added.
476 * s390-opc.txt (cfxbr, cfdbr, cfebr, cgebr, cgdbr, cgxbr, cger, cgdr,
477 cgxr, cfxr, cfdr, cfer): Instruction type set to INSTR_RRF_U0RF.
478
b8e55848
MS		 4792007-02-19 Andreas Krebbel <krebbel1@de.ibm.com>
480
481 * s390-opc.txt ("efpc", "sfpc"): Set to RRE_RR_OPT instruction type.
482 * s390-opc.c (s390_operands): Add RO_28 as optional gpr.
483 (INSTR_RRE_RR_OPT, MASK_RRE_RR_OPT): New instruction type for efpc
484 and sfpc.
485
af692060
NC		 4862007-02-16 Nick Clifton <nickc@redhat.com>
487
488 PR binutils/4045
489 * avr-dis.c (comment_start): New variable, contains the prefix to
490 use when printing addresses in comments.
491 (print_insn_avr): Set comment_start to an empty space if there is
492 no symbol table available as the generic address printing code
493 will prefix the numeric value of the address with 0x.
494
ce518a5f
L		 4952007-02-13 H.J. Lu <hongjiu.lu@intel.com>
496
497 * i386-dis.c: Updated to use an array of MAX_OPERANDS operands
498 in struct dis386.
499
bd2f2e55 5002007-02-05 Dave Brolley <brolley@redhat.com>
8c9c183d
DB		 501 Richard Sandiford <rsandifo@redhat.com>
502 DJ Delorie <dj@redhat.com>
503 Graydon Hoare <graydon@redhat.com>
504 Frank Ch. Eigler <fche@redhat.com>
505 Ben Elliston <bje@redhat.com>
506
507 * Makefile.am (HFILES): Add mep-desc.h mep-opc.h.
508 (CFILES): Add mep-*.c
509 (ALL_MACHINES): Add mep-*.lo.
510 (CLEANFILES): Add stamp-mep.
511 (CGEN_CPUS): Add mep.
512 (MEP_DEPS): New variable.
513 (mep-*): New targets.
514 * configure.in: Handle bfd_mep_arch.
515 * disassemble.c (ARCH_mep): New macro.
516 (disassembler): Handle bfd_arch_mep.
517 (disassemble_init_for_target): Likewise.
518 * mep-*: New files for Toshiba Media Processor (MeP).
bd2f2e55
DB		 519 * Makefile.in: Regenerated.
520 * configure: Regenerated.
521
eb7834a6 5222007-02-05 H.J. Lu <hongjiu.lu@intel.com>
65ca155d
L		 523
524 * i386-dis.c (OP_J): Undo the last change. Properly handle 64K
525 wrap around within the same segment in 16bit mode.
526
eb7834a6 5272007-02-02 H.J. Lu <hongjiu.lu@intel.com>
206717e8
L		 528
529 * i386-dis.c (OP_J): Mask to 16bit only if there is a data16
530 prefix.
531
c4f5c3d7
L		 5322007-02-02 H.J. Lu <hongjiu.lu@intel.com>
533
534 * avr-dis.c (avr_operand): Correct PR number in comment.
535
fc523535 5362007-02-02 H.J. Lu <hongjiu.lu@intel.com>
f59a29b9
L		 537
538 * disassemble.c (disassembler_usage): Call
539 print_i386_disassembler_options for i386 disassembler.
540
541 * i386-dis.c (print_i386_disassembler_options): New.
542 (print_insn): Support the new addr64 option.
543
64a3a6fc
NC		 5442007-02-02 Hiroki Kaminaga <kaminaga@sm.sony.co.jp>
545
546 * ppc-dis.c (powerpc_dialect): Handle ppc440.
547 * ppc-dis.c (print_ppc_disassembler_options): Note the -M440 can
548 be used.
549
ba4e851b
AM		 5502007-02-02 Alan Modra <amodra@bigpond.net.au>
551
552 * ppc-opc.c (insert_bdm): -Many comment.
553 (valid_bo): Add "extract" param. Accept both powerpc and power4
554 BO fields when disassembling with -Many.
555 (insert_bo, extract_bo, insert_boe, extract_boe): Adjust valid_bo call.
556
3bdcfdf4
KH		 5572007-01-08 Kazu Hirata <kazu@codesourcery.com>
558
559 * m68k-opc.c (m68k_opcodes): Replace cpu32 with
560 cpu32 | fido_a except on tbl instructions.
561
a028a6f5
PB		 5622007-01-04 Paul Brook <paul@codesourcery.com>
563
564 * arm-dis.c (arm_opcodes): Fix cpsie and cpsid entries.
565
baee4c9e
AS		 5662007-01-04 Andreas Schwab <schwab@suse.de>
567
568 * m68k-opc.c: Fix encoding of signed bit in the cpu32 tbls insns.
569
62ac925e
JB		 5702007-01-04 Julian Brown <julian@codesourcery.com>
571
572 * arm-dis.c (neon_opcode): Fix disassembly for vshl, vqshl, vrshl,
573 vqrshl instructions.
574
10a2343e 575For older changes see ChangeLog-2006
252b5132
RH		 576\f
577Local Variables:
2f6d2f85
NC		 578mode: change-log
579left-margin: 8
580fill-column: 74
252b5132
RH		 581version-control: never
582End:
GDB Binutils - Deliverables
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