[deliverable/binutils-gdb.git] / opcodes / ChangeLog

2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>

	* arm-dis.c (coprocessor_opcodes): Add entries for VFP ARMv8-M
	Mainline Security Extensions instructions.
	(thumb_opcodes): Add entries for narrow ARMv8-M Security
	Extensions instructions.
	(thumb32_opcodes): Add entries for wide ARMv8-M Security Extensions
	instructions.
	(psr_name): Add new MSP_NS and PSP_NS ARMv8-M Security Extensions
	special registers.

2016-05-09  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* sparc-opc.c (sparc_opcodes): Fix mnemonic of faligndatai.

2016-05-03  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-ext.c (dump_ARC_extmap): Handle SYNATX_NOP and SYNTAX_1OP.
	(arcExtMap_genOpcode): Likewise.
	* arc-opc.c (arg_32bit_rc): Define new variable.
	(arg_32bit_u6): Likewise.
	(arg_32bit_limm): Likewise.

2016-05-03  Szabolcs Nagy  <szabolcs.nagy@arm.com>

	* aarch64-gen.c (VERIFIER): Define.
	* aarch64-opc.c (VERIFIER): Define.
	(verify_ldpsw): Use static linkage.
	* aarch64-opc.h (verify_ldpsw): Remove.
	* aarch64-tbl.h: Use VERIFIER for verifiers.

2016-04-28  Nick Clifton  <nickc@redhat.com>

	PR target/19722
	* aarch64-dis.c (aarch64_opcode_decode): Run verifier if present.
	* aarch64-opc.c (verify_ldpsw): New function.
	* aarch64-opc.h (verify_ldpsw): New prototype.
	* aarch64-tbl.h: Add initialiser for verifier field.
	(LDPSW): Set verifier to verify_ldpsw.

2016-04-23  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/19983
	PR binutils/19984
	* i386-dis.c (print_insn): Return -1 if size of bfd_vma is
	smaller than address size.

2016-04-20  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>

	* alpha-dis.c: Regenerate.
	* crx-dis.c: Likewise.
	* disassemble.c: Likewise.
	* epiphany-opc.c: Likewise.
	* fr30-opc.c: Likewise.
	* frv-opc.c: Likewise.
	* ip2k-opc.c: Likewise.
	* iq2000-opc.c: Likewise.
	* lm32-opc.c: Likewise.
	* lm32-opinst.c: Likewise.
	* m32c-opc.c: Likewise.
	* m32r-opc.c: Likewise.
	* m32r-opinst.c: Likewise.
	* mep-opc.c: Likewise.
	* mt-opc.c: Likewise.
	* or1k-opc.c: Likewise.
	* or1k-opinst.c: Likewise.
	* tic80-opc.c: Likewise.
	* xc16x-opc.c: Likewise.
	* xstormy16-opc.c: Likewise.

2016-04-19  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add addb, subb, adcb, sbcb, andb, xorb, orb,
	fxorb, wxorb, shlb, shrb, notb, cntbb, div, mod, divm, qcmp,
	calcsd, and calcxd instructions.
	* arc-opc.c (insert_nps_bitop_size): Delete.
	(extract_nps_bitop_size): Delete.
	(MAKE_SRC_POS_INSERT_EXTRACT_FUNCS): Define, and use.
	(extract_nps_qcmp_m3): Define.
	(extract_nps_qcmp_m2): Define.
	(extract_nps_qcmp_m1): Define.
	(arc_flag_operands): Add F_NPS_SX, F_NPS_AR, F_NPS_AL.
	(arc_flag_classes): Add C_NPS_SX, C_NPS_AR_AL
	(arc_operands): Add NPS_SRC2_POS, NPS_SRC1_POS, NPS_ADDB_SIZE,
	NPS_ANDB_SIZE, NPS_FXORB_SIZ, NPS_WXORB_SIZ, NPS_R_XLDST,
	NPS_DIV_UIMM4, NPS_QCMP_SIZE, NPS_QCMP_M1, NPS_QCMP_M2, and
	NPS_QCMP_M3.

2016-04-19  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add dctcp, dcip, dcet, and dcacl instructions.

2016-04-15  H.J. Lu  <hongjiu.lu@intel.com>

	* Makefile.in: Regenerated with automake 1.11.6.
	* aclocal.m4: Likewise.

2016-04-14  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add xldb, xldw, xld, xstb, xstw, and xst
	instructions.
	* arc-opc.c (insert_nps_cmem_uimm16): New function.
	(extract_nps_cmem_uimm16): New function.
	(arc_operands): Add NPS_XLDST_UIMM16 operand.

2016-04-14  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-dis.c (arc_insn_length): New function.
	(print_insn_arc): Use arc_insn_length, change insnLen to unsigned.
	(find_format): Change insnLen parameter to unsigned.

2016-04-13  Nick Clifton  <nickc@redhat.com>

	PR target/19937
	* v850-opc.c (v850_opcodes): Correct masks for long versions of
	the LD.B and LD.BU instructions.

2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-dis.c (find_format): Check for extension flags.
	(print_flags): New function.
	(print_insn_arc): Update for .extCondCode, .extCoreRegister and
	.extAuxRegister.
	* arc-ext.c (arcExtMap_coreRegName): Use
	LAST_EXTENSION_CORE_REGISTER.
	(arcExtMap_coreReadWrite): Likewise.
	(dump_ARC_extmap): Update printing.
	* arc-opc.c (arc_flag_classes): Add F_CLASS_EXTEND flag.
	(arc_aux_regs): Add cpu field.
	* arc-regs.h: Add cpu field, lower case name aux registers.

2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-tbl.h: Add rtsc, sleep with no arguments.

2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-opc.c (flags_none, flags_f, flags_cc, flags_ccf):
	Initialize.
	(arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
	(arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
	(arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
	(arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
	(arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
	(arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
	(arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
	(arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
	(arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
	(arc_opcode arc_opcodes): Null terminate the array.
	(arc_num_opcodes): Remove.
	* arc-ext.h (INSERT_XOP): Define.
	(extInstruction_t): Likewise.
	(arcExtMap_instName): Delete.
	(arcExtMap_insn): New function.
	(arcExtMap_genOpcode): Likewise.
	* arc-ext.c (ExtInstruction): Remove.
	(create_map): Zero initialize instruction fields.
	(arcExtMap_instName): Remove.
	(arcExtMap_insn): New function.
	(dump_ARC_extmap): More info while debuging.
	(arcExtMap_genOpcode): New function.
	* arc-dis.c (find_format): New function.
	(print_insn_arc): Use find_format.
	(arc_get_disassembler): Enable dump_ARC_extmap only when
	debugging.

2016-04-11  Maciej W. Rozycki  <macro@imgtec.com>

	* mips-dis.c (print_mips16_insn_arg): Mask unused extended
	instruction bits out.

2016-04-07  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add schd, sync, and hwschd instructions.
	* arc-opc.c (arc_flag_operands): Add new flags.
	(arc_flag_classes): Add new classes.

2016-04-07  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-opc.c (arc_opcodes): Extend comment to discus table layout.

2016-04-05  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add movbi, decode1, fbset, fbclear, encode0,
	encode1, rflt, crc16, and crc32 instructions.
	* arc-opc.c (arc_flag_operands): Add F_NPS_R.
	(arc_flag_classes): Add C_NPS_R.
	(insert_nps_bitop_size_2b): New function.
	(extract_nps_bitop_size_2b): Likewise.
	(insert_nps_bitop_uimm8): Likewise.
	(extract_nps_bitop_uimm8): Likewise.
	(arc_operands): Add new operand entries.

2016-04-05  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-regs.h: Add a new subclass field.  Add double assist
	accumulator register values.
	* arc-tbl.h: Use DPA subclass to mark the double assist
	instructions.  Use DPX/SPX subclas to mark the FPX instructions.
	* arc-opc.c (RSP): Define instead of SP.
	(arc_aux_regs): Add the subclass field.

2016-04-05  Jiong Wang  <jiong.wang@arm.com>

	* arm-dis.c: Support FP16 vmul, vmla, vmls (by scalar).

2016-03-31  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-opc.c (arc_operands): Fix operand flags for NPS_R_DST, and
	NPS_R_SRC1.

2016-03-30  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add a header comment, and fix some whitespace
	issues.  No functional changes.

2016-03-30  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-regs.h (IC_RAM_ADDRESS, IC_TAG, IC_WP, IC_DATA, CONTROL0)
	(AX2, AY2, MX2, MY2, AY0, AY1, DC_RAM_ADDR, DC_TAG, CONTROL1)
	(RTT): Remove duplicate.
	(LCDINSTR, LCDDATA, LCDSTAT, CC_*, PCT_COUNT*, PCT_SNAP*)
	(PCT_CONFIG*): Remove.
	(D1L, D1H, D2H, D2L): Define.

2016-03-29  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-ext-tbl.h (dsp_fp_i2flt): Fix typo.

2016-03-29  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-tbl.h (invld07): Remove.
	* arc-ext-tbl.h: New file.
	* arc-dis.c (FIELDA, FIELDB, FIELDC): Remove.
	* arc-opc.c (arc_opcodes): Add ext-tbl include.

2016-03-24  Jan Kratochvil  <jan.kratochvil@redhat.com>

	Fix -Wstack-usage warnings.
	* aarch64-dis.c (print_operands): Substitute size.
	* aarch64-opc.c (print_register_offset_address): Substitute tblen.

2016-03-22  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* sparc-opc.c (sparc_opcodes): Reorder entries for `rd' in order
	to get a proper diagnostic when an invalid ASR register is used.

2016-03-22  Nick Clifton  <nickc@redhat.com>

	* configure: Regenerate.

2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: New file.
	* arc-opc.c: Add top level comment.
	(insert_nps_3bit_dst): New function.
	(extract_nps_3bit_dst): New function.
	(insert_nps_3bit_src2): New function.
	(extract_nps_3bit_src2): New function.
	(insert_nps_bitop_size): New function.
	(extract_nps_bitop_size): New function.
	(arc_flag_operands): Add nps400 entries.
	(arc_flag_classes): Add nps400 entries.
	(arc_operands): Add nps400 entries.
	(arc_opcodes): Add nps400 include.

2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-opc.c (arc_flag_classes): Convert all flag classes to use
	the new class enum values.

2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-dis.c (print_insn_arc): Handle nps400.

2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-opc.c (BASE): Delete.

2016-03-18  Nick Clifton  <nickc@redhat.com>

	PR target/19721
	* aarch64-tbl.h (aarch64_opcode_table): Fix type of second operand
	of MOV insn that aliases an ORR insn.

2016-03-16  Jiong Wang  <jiong.wang@arm.com>

	* arm-dis.c (neon_opcodes): Support new FP16 instructions.

2016-03-07  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>

	* mcore-opc.h: Add const qualifiers.
	* microblaze-opc.h (struct op_code_struct): Likewise.
	* sh-opc.h: Likewise.
	* tic4x-dis.c (tic4x_print_indirect): Likewise.
	(tic4x_print_op): Likewise.

2016-03-02  Alan Modra  <amodra@gmail.com>

	* or1k-desc.h: Regenerate.
	* fr30-ibld.c: Regenerate.
	* rl78-decode.c: Regenerate.

2016-03-01  Nick Clifton  <nickc@redhat.com>

	PR target/19747
	* rl78-dis.c (print_insn_rl78_common): Fix typo.

2016-02-24  Renlin Li  <renlin.li@arm.com>

	* arm-dis.c (coprocessor_opcodes): Add fp16 instruction entries.
	(print_insn_coprocessor): Support fp16 instructions.

2016-02-24  Renlin Li  <renlin.li@arm.com>

	* arm-dis.c (print_insn_coprocessor): Fix mask for vsel, vmaxnm,
	vminnm, vrint(mpna).

2016-02-24  Renlin Li  <renlin.li@arm.com>

	* arm-dis.c (print_insn_coprocessor): Check co-processor number for
	cpd/cpd2, mcr/mcr2, mrc/mrc2, ldc/ldc2, stc/stc2.

2016-02-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (print_insn): Parenthesize expression to prevent
	truncated addresses.
	(OP_J): Likewise.

2016-02-10  Claudiu Zissulescu  <claziss@synopsys.com>
	    Janek van Oirschot  <jvanoirs@synopsys.com>

	* arc-opc.c (arc_relax_opcodes, arc_num_relax_opcodes): New
	variable.

2016-02-04  Nick Clifton  <nickc@redhat.com>

	PR target/19561
	* msp430-dis.c (print_insn_msp430): Add a special case for
	decoding an RRC instruction with the ZC bit set in the extension
	word.

2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>

	* cgen-ibld.in (insert_normal): Rework calculation of shift.
	* epiphany-ibld.c: Regenerate.
	* fr30-ibld.c: Regenerate.
	* frv-ibld.c: Regenerate.
	* ip2k-ibld.c: Regenerate.
	* iq2000-ibld.c: Regenerate.
	* lm32-ibld.c: Regenerate.
	* m32c-ibld.c: Regenerate.
	* m32r-ibld.c: Regenerate.
	* mep-ibld.c: Regenerate.
	* mt-ibld.c: Regenerate.
	* or1k-ibld.c: Regenerate.
	* xc16x-ibld.c: Regenerate.
	* xstormy16-ibld.c: Regenerate.

2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>

	* epiphany-dis.c: Regenerated from latest cpu files.

2016-02-01  Michael McConville  <mmcco@mykolab.com>

	* cgen-dis.c (count_decodable_bits): Use unsigned value for mask
	test bit.

2016-01-25  Renlin Li  <renlin.li@arm.com>

	* arm-dis.c (mapping_symbol_for_insn): New function.
	(find_ifthen_state): Call mapping_symbol_for_insn().

2016-01-20  Matthew Wahab  <matthew.wahab@arm.com>

	* aarch64-opc.c (operand_general_constraint_met_p): Check validity
	of MSR UAO immediate operand.

2016-01-18  Maciej W. Rozycki  <macro@imgtec.com>

	* mips-dis.c (print_insn_micromips): Remove 48-bit microMIPS
	instruction support.

2016-01-17  Alan Modra  <amodra@gmail.com>

	* configure: Regenerate.

2016-01-14  Nick Clifton  <nickc@redhat.com>

	* rl78-decode.opc (rl78_decode_opcode): Add 's' operand to movw
	instructions that can support stack pointer operations.
	* rl78-decode.c: Regenerate.
	* rl78-dis.c: Fix display of stack pointer in MOVW based
	instructions.

2016-01-14  Matthew Wahab  <matthew.wahab@arm.com>

	* aarch64-opc.c (aarch64_sys_reg_supported_p): Merge conditionals
	testing for RAS support.  Add checks for erxfr_el1, erxctlr_el1,
	erxtatus_el1 and erxaddr_el1.

2016-01-12  Matthew Wahab  <matthew.wahab@arm.com>

	* arm-dis.c (arm_opcodes): Add "esb".
	(thumb_opcodes): Likewise.

2016-01-11  Peter Bergner <bergner@vnet.ibm.com>

	* ppc-opc.c <xscmpnedp>: Delete.
	<xvcmpnedp>: Likewise.
	<xvcmpnedp.>: Likewise.
	<xvcmpnesp>: Likewise.
	<xvcmpnesp.>: Likewise.

2016-01-08  Andreas Schwab  <schwab@linux-m68k.org>

	PR gas/13050
	* m68k-opc.c (moveb, movew): For ISA_B/C only allow #,d(An) in
	addition to ISA_A.

2016-01-01  Alan Modra  <amodra@gmail.com>

	Update year range in copyright notice of all files.

For older changes see ChangeLog-2015
\f
Copyright (C) 2016 Free Software Foundation, Inc.

Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved.

Local Variables:
mode: change-log
left-margin: 8
fill-column: 74
version-control: never
End:
Commit	Line	Data
16a1fa25 TP	1	2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
	2
	3	* arm-dis.c (coprocessor_opcodes): Add entries for VFP ARMv8-M
	4	Mainline Security Extensions instructions.
	5	(thumb_opcodes): Add entries for narrow ARMv8-M Security
	6	Extensions instructions.
	7	(thumb32_opcodes): Add entries for wide ARMv8-M Security Extensions
	8	instructions.
	9	(psr_name): Add new MSP_NS and PSP_NS ARMv8-M Security Extensions
	10	special registers.
	11
d751b79e JM	12	2016-05-09 Jose E. Marchesi <jose.marchesi@oracle.com>
	13
	14	* sparc-opc.c (sparc_opcodes): Fix mnemonic of faligndatai.
	15
945e0f82 CZ	16	2016-05-03 Claudiu Zissulescu <claziss@synopsys.com>
	17
	18	* arc-ext.c (dump_ARC_extmap): Handle SYNATX_NOP and SYNTAX_1OP.
	19	(arcExtMap_genOpcode): Likewise.
	20	* arc-opc.c (arg_32bit_rc): Define new variable.
	21	(arg_32bit_u6): Likewise.
	22	(arg_32bit_limm): Likewise.
	23
20f55f38 SN	24	2016-05-03 Szabolcs Nagy <szabolcs.nagy@arm.com>
	25
	26	* aarch64-gen.c (VERIFIER): Define.
	27	* aarch64-opc.c (VERIFIER): Define.
	28	(verify_ldpsw): Use static linkage.
	29	* aarch64-opc.h (verify_ldpsw): Remove.
	30	* aarch64-tbl.h: Use VERIFIER for verifiers.
	31
4bd13cde NC	32	2016-04-28 Nick Clifton <nickc@redhat.com>
	33
	34	PR target/19722
	35	* aarch64-dis.c (aarch64_opcode_decode): Run verifier if present.
	36	* aarch64-opc.c (verify_ldpsw): New function.
	37	* aarch64-opc.h (verify_ldpsw): New prototype.
	38	* aarch64-tbl.h: Add initialiser for verifier field.
	39	(LDPSW): Set verifier to verify_ldpsw.
	40
c0f92bf9 L	41	2016-04-23 H.J. Lu <hongjiu.lu@intel.com>
	42
	43	PR binutils/19983
	44	PR binutils/19984
	45	* i386-dis.c (print_insn): Return -1 if size of bfd_vma is
	46	smaller than address size.
	47
e6c7cdec TS	48	2016-04-20 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
	49
	50	* alpha-dis.c: Regenerate.
	51	* crx-dis.c: Likewise.
	52	* disassemble.c: Likewise.
	53	* epiphany-opc.c: Likewise.
	54	* fr30-opc.c: Likewise.
	55	* frv-opc.c: Likewise.
	56	* ip2k-opc.c: Likewise.
	57	* iq2000-opc.c: Likewise.
	58	* lm32-opc.c: Likewise.
	59	* lm32-opinst.c: Likewise.
	60	* m32c-opc.c: Likewise.
	61	* m32r-opc.c: Likewise.
	62	* m32r-opinst.c: Likewise.
	63	* mep-opc.c: Likewise.
	64	* mt-opc.c: Likewise.
	65	* or1k-opc.c: Likewise.
	66	* or1k-opinst.c: Likewise.
	67	* tic80-opc.c: Likewise.
	68	* xc16x-opc.c: Likewise.
	69	* xstormy16-opc.c: Likewise.
	70
537aefaf AB	71	2016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
	72
	73	* arc-nps400-tbl.h: Add addb, subb, adcb, sbcb, andb, xorb, orb,
	74	fxorb, wxorb, shlb, shrb, notb, cntbb, div, mod, divm, qcmp,
	75	calcsd, and calcxd instructions.
	76	* arc-opc.c (insert_nps_bitop_size): Delete.
	77	(extract_nps_bitop_size): Delete.
	78	(MAKE_SRC_POS_INSERT_EXTRACT_FUNCS): Define, and use.
	79	(extract_nps_qcmp_m3): Define.
	80	(extract_nps_qcmp_m2): Define.
	81	(extract_nps_qcmp_m1): Define.
	82	(arc_flag_operands): Add F_NPS_SX, F_NPS_AR, F_NPS_AL.
	83	(arc_flag_classes): Add C_NPS_SX, C_NPS_AR_AL
	84	(arc_operands): Add NPS_SRC2_POS, NPS_SRC1_POS, NPS_ADDB_SIZE,
	85	NPS_ANDB_SIZE, NPS_FXORB_SIZ, NPS_WXORB_SIZ, NPS_R_XLDST,
	86	NPS_DIV_UIMM4, NPS_QCMP_SIZE, NPS_QCMP_M1, NPS_QCMP_M2, and
	87	NPS_QCMP_M3.
	88
c8f785f2 AB	89	2016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
	90
	91	* arc-nps400-tbl.h: Add dctcp, dcip, dcet, and dcacl instructions.
	92
6fd8e7c2 L	93	2016-04-15 H.J. Lu <hongjiu.lu@intel.com>
	94
	95	* Makefile.in: Regenerated with automake 1.11.6.
	96	* aclocal.m4: Likewise.
	97
4b0c052e AB	98	2016-04-14 Andrew Burgess <andrew.burgess@embecosm.com>
	99
	100	* arc-nps400-tbl.h: Add xldb, xldw, xld, xstb, xstw, and xst
	101	instructions.
	102	* arc-opc.c (insert_nps_cmem_uimm16): New function.
	103	(extract_nps_cmem_uimm16): New function.
	104	(arc_operands): Add NPS_XLDST_UIMM16 operand.
	105
cb040366 AB	106	2016-04-14 Andrew Burgess <andrew.burgess@embecosm.com>
	107
	108	* arc-dis.c (arc_insn_length): New function.
	109	(print_insn_arc): Use arc_insn_length, change insnLen to unsigned.
	110	(find_format): Change insnLen parameter to unsigned.
	111
accc0180 NC	112	2016-04-13 Nick Clifton <nickc@redhat.com>
	113
	114	PR target/19937
	115	* v850-opc.c (v850_opcodes): Correct masks for long versions of
	116	the LD.B and LD.BU instructions.
	117
f36e33da CZ	118	2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
	119
	120	* arc-dis.c (find_format): Check for extension flags.
	121	(print_flags): New function.
	122	(print_insn_arc): Update for .extCondCode, .extCoreRegister and
	123	.extAuxRegister.
	124	* arc-ext.c (arcExtMap_coreRegName): Use
	125	LAST_EXTENSION_CORE_REGISTER.
	126	(arcExtMap_coreReadWrite): Likewise.
	127	(dump_ARC_extmap): Update printing.
	128	* arc-opc.c (arc_flag_classes): Add F_CLASS_EXTEND flag.
	129	(arc_aux_regs): Add cpu field.
	130	* arc-regs.h: Add cpu field, lower case name aux registers.
	131
1c2e355e CZ	132	2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
	133
	134	* arc-tbl.h: Add rtsc, sleep with no arguments.
	135
b99747ae CZ	136	2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
	137
	138	* arc-opc.c (flags_none, flags_f, flags_cc, flags_ccf):
	139	Initialize.
	140	(arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
	141	(arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
	142	(arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
	143	(arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
	144	(arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
	145	(arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
	146	(arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
	147	(arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
	148	(arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
	149	(arc_opcode arc_opcodes): Null terminate the array.
	150	(arc_num_opcodes): Remove.
	151	* arc-ext.h (INSERT_XOP): Define.
	152	(extInstruction_t): Likewise.
	153	(arcExtMap_instName): Delete.
	154	(arcExtMap_insn): New function.
	155	(arcExtMap_genOpcode): Likewise.
	156	* arc-ext.c (ExtInstruction): Remove.
	157	(create_map): Zero initialize instruction fields.
	158	(arcExtMap_instName): Remove.
	159	(arcExtMap_insn): New function.
	160	(dump_ARC_extmap): More info while debuging.
	161	(arcExtMap_genOpcode): New function.
	162	* arc-dis.c (find_format): New function.
	163	(print_insn_arc): Use find_format.
	164	(arc_get_disassembler): Enable dump_ARC_extmap only when
	165	debugging.
	166
92708cec MR	167	2016-04-11 Maciej W. Rozycki <macro@imgtec.com>
	168
	169	* mips-dis.c (print_mips16_insn_arg): Mask unused extended
	170	instruction bits out.
	171
a42a4f84 AB	172	2016-04-07 Andrew Burgess <andrew.burgess@embecosm.com>
	173
	174	* arc-nps400-tbl.h: Add schd, sync, and hwschd instructions.
	175	* arc-opc.c (arc_flag_operands): Add new flags.
	176	(arc_flag_classes): Add new classes.
	177
1328504b AB	178	2016-04-07 Andrew Burgess <andrew.burgess@embecosm.com>
	179
	180	* arc-opc.c (arc_opcodes): Extend comment to discus table layout.
	181
820f03ff AB	182	2016-04-05 Andrew Burgess <andrew.burgess@embecosm.com>
	183
	184	* arc-nps400-tbl.h: Add movbi, decode1, fbset, fbclear, encode0,
	185	encode1, rflt, crc16, and crc32 instructions.
	186	* arc-opc.c (arc_flag_operands): Add F_NPS_R.
	187	(arc_flag_classes): Add C_NPS_R.
	188	(insert_nps_bitop_size_2b): New function.
	189	(extract_nps_bitop_size_2b): Likewise.
	190	(insert_nps_bitop_uimm8): Likewise.
	191	(extract_nps_bitop_uimm8): Likewise.
	192	(arc_operands): Add new operand entries.
	193
8ddf6b2a CZ	194	2016-04-05 Claudiu Zissulescu <claziss@synopsys.com>
8ddf6b2a CZ	195
b99747ae CZ	196	* arc-regs.h: Add a new subclass field. Add double assist
	197	accumulator register values.
	198	* arc-tbl.h: Use DPA subclass to mark the double assist
	199	instructions. Use DPX/SPX subclas to mark the FPX instructions.
	200	* arc-opc.c (RSP): Define instead of SP.
	201	(arc_aux_regs): Add the subclass field.
8ddf6b2a	202
589a7d88 JW	203	2016-04-05 Jiong Wang <jiong.wang@arm.com>
	204
	205	* arm-dis.c: Support FP16 vmul, vmla, vmls (by scalar).
	206
0a191de9	207	2016-03-31 Andrew Burgess <andrew.burgess@embecosm.com>
2cce10e7 AB	208
	209	* arc-opc.c (arc_operands): Fix operand flags for NPS_R_DST, and
	210	NPS_R_SRC1.
	211
0a106562 AB	212	2016-03-30 Andrew Burgess <andrew.burgess@embecosm.com>
	213
	214	* arc-nps400-tbl.h: Add a header comment, and fix some whitespace
	215	issues. No functional changes.
	216
bd05ac5f CZ	217	2016-03-30 Claudiu Zissulescu <claziss@synopsys.com>
bd05ac5f CZ	218
b99747ae CZ	219	* arc-regs.h (IC_RAM_ADDRESS, IC_TAG, IC_WP, IC_DATA, CONTROL0)
	220	(AX2, AY2, MX2, MY2, AY0, AY1, DC_RAM_ADDR, DC_TAG, CONTROL1)
	221	(RTT): Remove duplicate.
	222	(LCDINSTR, LCDDATA, LCDSTAT, CC_, PCT_COUNT, PCT_SNAP*)
	223	(PCT_CONFIG*): Remove.
	224	(D1L, D1H, D2H, D2L): Define.
bd05ac5f	225
9885948f CZ	226	2016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
9885948f CZ	227
b99747ae	228	* arc-ext-tbl.h (dsp_fp_i2flt): Fix typo.
9885948f	229
f2dd8838 CZ	230	2016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
f2dd8838 CZ	231
b99747ae CZ	232	* arc-tbl.h (invld07): Remove.
	233	* arc-ext-tbl.h: New file.
	234	* arc-dis.c (FIELDA, FIELDB, FIELDC): Remove.
	235	* arc-opc.c (arc_opcodes): Add ext-tbl include.
f2dd8838	236
0d2f91fe JK	237	2016-03-24 Jan Kratochvil <jan.kratochvil@redhat.com>
	238
	239	Fix -Wstack-usage warnings.
	240	* aarch64-dis.c (print_operands): Substitute size.
	241	* aarch64-opc.c (print_register_offset_address): Substitute tblen.
	242
a6b71f42 JM	243	2016-03-22 Jose E. Marchesi <jose.marchesi@oracle.com>
	244
	245	* sparc-opc.c (sparc_opcodes): Reorder entries for `rd' in order
	246	to get a proper diagnostic when an invalid ASR register is used.
	247
9780e045 NC	248	2016-03-22 Nick Clifton <nickc@redhat.com>
	249
	250	* configure: Regenerate.
	251
e23e8ebe AB	252	2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
	253
	254	* arc-nps400-tbl.h: New file.
	255	* arc-opc.c: Add top level comment.
	256	(insert_nps_3bit_dst): New function.
	257	(extract_nps_3bit_dst): New function.
	258	(insert_nps_3bit_src2): New function.
	259	(extract_nps_3bit_src2): New function.
	260	(insert_nps_bitop_size): New function.
	261	(extract_nps_bitop_size): New function.
	262	(arc_flag_operands): Add nps400 entries.
	263	(arc_flag_classes): Add nps400 entries.
	264	(arc_operands): Add nps400 entries.
	265	(arc_opcodes): Add nps400 include.
	266
1ae8ab47 AB	267	2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
	268
	269	* arc-opc.c (arc_flag_classes): Convert all flag classes to use
	270	the new class enum values.
	271
8699fc3e AB	272	2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
	273
	274	* arc-dis.c (print_insn_arc): Handle nps400.
	275
24740d83 AB	276	2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
	277
	278	* arc-opc.c (BASE): Delete.
	279
8678914f NC	280	2016-03-18 Nick Clifton <nickc@redhat.com>
	281
	282	PR target/19721
	283	* aarch64-tbl.h (aarch64_opcode_table): Fix type of second operand
	284	of MOV insn that aliases an ORR insn.
	285
cc933301 JW	286	2016-03-16 Jiong Wang <jiong.wang@arm.com>
	287
	288	* arm-dis.c (neon_opcodes): Support new FP16 instructions.
	289
f86f5863 TS	290	2016-03-07 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
	291
	292	* mcore-opc.h: Add const qualifiers.
	293	* microblaze-opc.h (struct op_code_struct): Likewise.
	294	* sh-opc.h: Likewise.
	295	* tic4x-dis.c (tic4x_print_indirect): Likewise.
	296	(tic4x_print_op): Likewise.
	297
62de1c63 AM	298	2016-03-02 Alan Modra <amodra@gmail.com>
62de1c63 AM	299
d11698cd	300	* or1k-desc.h: Regenerate.
62de1c63	301	* fr30-ibld.c: Regenerate.
c697cf0b	302	* rl78-decode.c: Regenerate.
62de1c63	303
020efce5 NC	304	2016-03-01 Nick Clifton <nickc@redhat.com>
	305
	306	PR target/19747
	307	* rl78-dis.c (print_insn_rl78_common): Fix typo.
	308
b0c11777 RL	309	2016-02-24 Renlin Li <renlin.li@arm.com>
	310
	311	* arm-dis.c (coprocessor_opcodes): Add fp16 instruction entries.
	312	(print_insn_coprocessor): Support fp16 instructions.
	313
3e309328 RL	314	2016-02-24 Renlin Li <renlin.li@arm.com>
	315
	316	* arm-dis.c (print_insn_coprocessor): Fix mask for vsel, vmaxnm,
	317	vminnm, vrint(mpna).
	318
8afc7bea RL	319	2016-02-24 Renlin Li <renlin.li@arm.com>
	320
	321	* arm-dis.c (print_insn_coprocessor): Check co-processor number for
	322	cpd/cpd2, mcr/mcr2, mrc/mrc2, ldc/ldc2, stc/stc2.
	323
4fd7268a L	324	2016-02-15 H.J. Lu <hongjiu.lu@intel.com>
	325
	326	* i386-dis.c (print_insn): Parenthesize expression to prevent
	327	truncated addresses.
	328	(OP_J): Likewise.
	329
4670103e CZ	330	2016-02-10 Claudiu Zissulescu <claziss@synopsys.com>
	331	Janek van Oirschot <jvanoirs@synopsys.com>
	332
b99747ae CZ	333	* arc-opc.c (arc_relax_opcodes, arc_num_relax_opcodes): New
b99747ae CZ	334	variable.
4670103e	335
c1d9289f NC	336	2016-02-04 Nick Clifton <nickc@redhat.com>
	337
	338	PR target/19561
	339	* msp430-dis.c (print_insn_msp430): Add a special case for
	340	decoding an RRC instruction with the ZC bit set in the extension
	341	word.
	342
a143b004 AB	343	2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
	344
	345	* cgen-ibld.in (insert_normal): Rework calculation of shift.
	346	* epiphany-ibld.c: Regenerate.
	347	* fr30-ibld.c: Regenerate.
	348	* frv-ibld.c: Regenerate.
	349	* ip2k-ibld.c: Regenerate.
	350	* iq2000-ibld.c: Regenerate.
	351	* lm32-ibld.c: Regenerate.
	352	* m32c-ibld.c: Regenerate.
	353	* m32r-ibld.c: Regenerate.
	354	* mep-ibld.c: Regenerate.
	355	* mt-ibld.c: Regenerate.
	356	* or1k-ibld.c: Regenerate.
	357	* xc16x-ibld.c: Regenerate.
	358	* xstormy16-ibld.c: Regenerate.
	359
b89807c6 AB	360	2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
	361
	362	* epiphany-dis.c: Regenerated from latest cpu files.
	363
d8c823c8 MM	364	2016-02-01 Michael McConville <mmcco@mykolab.com>
	365
	366	* cgen-dis.c (count_decodable_bits): Use unsigned value for mask
	367	test bit.
	368
5bc5ae88 RL	369	2016-01-25 Renlin Li <renlin.li@arm.com>
	370
	371	* arm-dis.c (mapping_symbol_for_insn): New function.
	372	(find_ifthen_state): Call mapping_symbol_for_insn().
	373
0bff6e2d MW	374	2016-01-20 Matthew Wahab <matthew.wahab@arm.com>
	375
	376	* aarch64-opc.c (operand_general_constraint_met_p): Check validity
	377	of MSR UAO immediate operand.
	378
100b4f2e MR	379	2016-01-18 Maciej W. Rozycki <macro@imgtec.com>
	380
	381	* mips-dis.c (print_insn_micromips): Remove 48-bit microMIPS
	382	instruction support.
	383
5c14705f AM	384	2016-01-17 Alan Modra <amodra@gmail.com>
	385
	386	* configure: Regenerate.
	387
4d82fe66 NC	388	2016-01-14 Nick Clifton <nickc@redhat.com>
	389
	390	* rl78-decode.opc (rl78_decode_opcode): Add 's' operand to movw
	391	instructions that can support stack pointer operations.
	392	* rl78-decode.c: Regenerate.
	393	* rl78-dis.c: Fix display of stack pointer in MOVW based
	394	instructions.
	395
651657fa MW	396	2016-01-14 Matthew Wahab <matthew.wahab@arm.com>
	397
	398	* aarch64-opc.c (aarch64_sys_reg_supported_p): Merge conditionals
	399	testing for RAS support. Add checks for erxfr_el1, erxctlr_el1,
	400	erxtatus_el1 and erxaddr_el1.
	401
105bde57 MW	402	2016-01-12 Matthew Wahab <matthew.wahab@arm.com>
	403
	404	* arm-dis.c (arm_opcodes): Add "esb".
	405	(thumb_opcodes): Likewise.
	406
afa8d405 PB	407	2016-01-11 Peter Bergner <bergner@vnet.ibm.com>
	408
	409	* ppc-opc.c <xscmpnedp>: Delete.
	410	<xvcmpnedp>: Likewise.
	411	<xvcmpnedp.>: Likewise.
	412	<xvcmpnesp>: Likewise.
	413	<xvcmpnesp.>: Likewise.
	414
83c3256e AS	415	2016-01-08 Andreas Schwab <schwab@linux-m68k.org>
	416
	417	PR gas/13050
	418	* m68k-opc.c (moveb, movew): For ISA_B/C only allow #,d(An) in
	419	addition to ISA_A.
	420
6f2750fe AM	421	2016-01-01 Alan Modra <amodra@gmail.com>
	422
	423	Update year range in copyright notice of all files.
	424
3499769a AM	425	For older changes see ChangeLog-2015
	426	\f
	427	Copyright (C) 2016 Free Software Foundation, Inc.
	428
	429	Copying and distribution of this file, with or without modification,
	430	are permitted in any medium without royalty provided the copyright
	431	notice and this notice are preserved.
	432
	433	Local Variables:
	434	mode: change-log
	435	left-margin: 8
	436	fill-column: 74
	437	version-control: never
	438	End: