x86: drop CpuRegMMX, CpuReg[XYZ]MM, and CpuRegMask
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
6e041cf4
JB
12018-04-26 Jan Beulich <jbeulich@suse.com>
2
3 * i386-gen.c (cpu_flag_init): Drop all uses of CpuRegMMX,
4 CpuRegXMM, CpuRegYMM, CpuRegZMM, and CpuRegMask. Use
5 CPU_AVX2_FLAGS for CPU_AVX512F_FLAGS and drop bogus comment.
6 Don't use CPU_AVX2_FLAGS for CPU_AVX512VL_FLAGS and drop bogus
7 comment.
8 (cpu_flags): Drop CpuRegMMX, CpuRegXMM, CpuRegYMM, CpuRegZMM,
9 and CpuRegMask.
10 * i386-opc.h: CpuRegMMX, CpuRegXMM, CpuRegYMM, CpuRegZMM,
11 CpuRegMask: Delete.
12 (union i386_cpu_flags): Remove cpuregmmx, cpuregxmm, cpuregymm,
13 cpuregzmm, and cpuregmask.
14 * i386-init.h: Re-generate.
15 * i386-tbl.h: Re-generate.
16
0e0eea78
JB
172018-04-26 Jan Beulich <jbeulich@suse.com>
18
19 * i386-gen.c (cpu_flag_init): CPU_I586_FLAGS inherits Cpu387 only.
20 CPU_287_FLAGS is Cpu287 only. CPU_387_FLAGS is Cpu387 only.
21 * i386-init.h: Re-generate.
22
2f1bada2
JB
232018-04-26 Jan Beulich <jbeulich@suse.com>
24
25 * i386-gen.c (VexImmExt): Delete.
26 * i386-opc.h (VexImmExt, veximmext): Delete.
27 * i386-opc.tbl: Drop all VexImmExt uses.
28 * i386-tlb.h: Re-generate.
29
bacd1457
JB
302018-04-25 Jan Beulich <jbeulich@suse.com>
31
32 * i386-opc.tbl (vpslld, vpsrad, vpsrld): Drop AVX512VL
33 register-only forms.
34 * i386-tlb.h: Re-generate.
35
10bba94b
TC
362018-04-25 Tamar Christina <tamar.christina@arm.com>
37
38 * aarch64-tbl.h (sqrdmlah, sqrdmlsh): Fix masks.
39
c48935d7
IT
402018-04-17 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
41
42 * i386-dis.c: Add REG_0F1C_MOD_0, MOD_0F1C_PREFIX_0,
43 PREFIX_0F1C.
44 * i386-gen.c (cpu_flag_init): Add CPU_CLDEMOTE_FLAGS,
45 (cpu_flags): Add CpuCLDEMOTE.
46 * i386-init.h: Regenerate.
47 * i386-opc.h (enum): Add CpuCLDEMOTE,
48 (i386_cpu_flags): Add cpucldemote.
49 * i386-opc.tbl: Add cldemote.
50 * i386-tbl.h: Regenerate.
51
211dc24b
AM
522018-04-16 Alan Modra <amodra@gmail.com>
53
54 * Makefile.am: Remove sh5 and sh64 support.
55 * configure.ac: Likewise.
56 * disassemble.c: Likewise.
57 * disassemble.h: Likewise.
58 * sh-dis.c: Likewise.
59 * sh64-dis.c: Delete.
60 * sh64-opc.c: Delete.
61 * sh64-opc.h: Delete.
62 * Makefile.in: Regenerate.
63 * configure: Regenerate.
64 * po/POTFILES.in: Regenerate.
65
a9a4b302
AM
662018-04-16 Alan Modra <amodra@gmail.com>
67
68 * Makefile.am: Remove w65 support.
69 * configure.ac: Likewise.
70 * disassemble.c: Likewise.
71 * disassemble.h: Likewise.
72 * w65-dis.c: Delete.
73 * w65-opc.h: Delete.
74 * Makefile.in: Regenerate.
75 * configure: Regenerate.
76 * po/POTFILES.in: Regenerate.
77
04cb01fd
AM
782018-04-16 Alan Modra <amodra@gmail.com>
79
80 * configure.ac: Remove we32k support.
81 * configure: Regenerate.
82
c2bf1eec
AM
832018-04-16 Alan Modra <amodra@gmail.com>
84
85 * Makefile.am: Remove m88k support.
86 * configure.ac: Likewise.
87 * disassemble.c: Likewise.
88 * disassemble.h: Likewise.
89 * m88k-dis.c: Delete.
90 * Makefile.in: Regenerate.
91 * configure: Regenerate.
92 * po/POTFILES.in: Regenerate.
93
6793974d
AM
942018-04-16 Alan Modra <amodra@gmail.com>
95
96 * Makefile.am: Remove i370 support.
97 * configure.ac: Likewise.
98 * disassemble.c: Likewise.
99 * disassemble.h: Likewise.
100 * i370-dis.c: Delete.
101 * i370-opc.c: Delete.
102 * Makefile.in: Regenerate.
103 * configure: Regenerate.
104 * po/POTFILES.in: Regenerate.
105
e82aa794
AM
1062018-04-16 Alan Modra <amodra@gmail.com>
107
108 * Makefile.am: Remove h8500 support.
109 * configure.ac: Likewise.
110 * disassemble.c: Likewise.
111 * disassemble.h: Likewise.
112 * h8500-dis.c: Delete.
113 * h8500-opc.h: Delete.
114 * Makefile.in: Regenerate.
115 * configure: Regenerate.
116 * po/POTFILES.in: Regenerate.
117
fceadf09
AM
1182018-04-16 Alan Modra <amodra@gmail.com>
119
120 * configure.ac: Remove tahoe support.
121 * configure: Regenerate.
122
ae1d3843
L
1232018-04-15 H.J. Lu <hongjiu.lu@intel.com>
124
125 * i386-dis.c (prefix_table): Replace Em with Edq on tpause and
126 umwait.
127 * i386-opc.tbl: Allow 32-bit registers for tpause and umwait in
128 64-bit mode.
129 * i386-tbl.h: Regenerated.
130
de89d0a3
IT
1312018-04-11 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
132
133 * i386-dis.c (enum): Add PREFIX_MOD_0_0FAE_REG_6,
134 PREFIX_MOD_1_0FAE_REG_6.
135 (va_mode): New.
136 (OP_E_register): Use va_mode.
137 * i386-dis-evex.h (prefix_table):
138 New instructions (see prefixes above).
139 * i386-gen.c (cpu_flag_init): Add WAITPKG.
140 (cpu_flags): Likewise.
141 * i386-opc.h (enum): Likewise.
142 (i386_cpu_flags): Likewise.
143 * i386-opc.tbl: Add umonitor, umwait, tpause.
144 * i386-init.h: Regenerate.
145 * i386-tbl.h: Likewise.
146
a8eb42a8
AM
1472018-04-11 Alan Modra <amodra@gmail.com>
148
149 * opcodes/i860-dis.c: Delete.
150 * opcodes/i960-dis.c: Delete.
151 * Makefile.am: Remove i860 and i960 support.
152 * configure.ac: Likewise.
153 * disassemble.c: Likewise.
154 * disassemble.h: Likewise.
155 * Makefile.in: Regenerate.
156 * configure: Regenerate.
157 * po/POTFILES.in: Regenerate.
158
caf0678c
L
1592018-04-04 H.J. Lu <hongjiu.lu@intel.com>
160
161 PR binutils/23025
162 * i386-dis.c (get_valid_dis386): Don't set vex.prefix nor vex.w
163 to 0.
164 (print_insn): Clear vex instead of vex.evex.
165
4fb0d2b9
NC
1662018-04-04 Nick Clifton <nickc@redhat.com>
167
168 * po/es.po: Updated Spanish translation.
169
c39e5b26
JB
1702018-03-28 Jan Beulich <jbeulich@suse.com>
171
172 * i386-gen.c (opcode_modifiers): Delete VecESize.
173 * i386-opc.h (VecESize): Delete.
174 (struct i386_opcode_modifier): Delete vecesize.
175 * i386-opc.tbl: Drop VecESize.
176 * i386-tlb.h: Re-generate.
177
8e6e0792
JB
1782018-03-28 Jan Beulich <jbeulich@suse.com>
179
180 * i386-opc.h (NO_BROADCAST, BROADCAST_1TO16, BROADCAST_1TO8,
181 BROADCAST_1TO4, BROADCAST_1TO2): Delete.
182 (struct i386_opcode_modifier): Shrink broadcast field to 1 bit.
183 * i386-opc.tbl: Replace Broadcast=<N> by Broadcast.
184 * i386-tlb.h: Re-generate.
185
9f123b91
JB
1862018-03-28 Jan Beulich <jbeulich@suse.com>
187
188 * i386-opc.tbl (vcvt*d2si, vcvt*d2usi, vcvt*s2si, vcvt*s2usi):
189 Fold AVX512 forms
190 * i386-tlb.h: Re-generate.
191
9646c87b
JB
1922018-03-28 Jan Beulich <jbeulich@suse.com>
193
194 * i386-dis.c (prefix_table): Drop Y for cvt*2si.
195 (vex_len_table): Drop Y for vcvt*2si.
196 (putop): Replace plain 'Y' handling by abort().
197
c8d59609
NC
1982018-03-28 Nick Clifton <nickc@redhat.com>
199
200 PR 22988
201 * aarch64-tbl.h (aarch64_opcode_table): Add entries for LDFF1xx
202 instructions with only a base address register.
203 * aarch64-opc.c (operand_general_constraint_met_p): Add code to
204 handle AARHC64_OPND_SVE_ADDR_R.
205 (aarch64_print_operand): Likewise.
206 * aarch64-asm-2.c: Regenerate.
207 * aarch64_dis-2.c: Regenerate.
208 * aarch64-opc-2.c: Regenerate.
209
b8c169f3
JB
2102018-03-22 Jan Beulich <jbeulich@suse.com>
211
212 * i386-opc.tbl: Drop VecESize from register only insn forms and
213 memory forms not allowing broadcast.
214 * i386-tlb.h: Re-generate.
215
96bc132a
JB
2162018-03-22 Jan Beulich <jbeulich@suse.com>
217
218 * i386-opc.tbl (vfrczs*, vphadd*, vphsub*, vpmacs*, vpmadcs*,
219 vprot*, vpsha*, vpshl*, bextr, blc*, bls*, t1mskc, tzmsk, sha1*,
220 sha256*): Drop Disp<N>.
221
9f79e886
JB
2222018-03-22 Jan Beulich <jbeulich@suse.com>
223
224 * i386-dis.c (EbndS, bnd_swap_mode): New.
225 (prefix_table): Use EbndS.
226 (OP_E_register, OP_E_memory): Also handle bnd_swap_mode.
227 * i386-opc.tbl (bndmov): Move misplaced Load.
228 * i386-tlb.h: Re-generate.
229
d6793fa1
JB
2302018-03-22 Jan Beulich <jbeulich@suse.com>
231
232 * i386-opc.tbl (vcvtdq2pd, vcvtps2pd, vcvtudq2pd): Use separate
233 templates allowing memory operands and folded ones for register
234 only flavors.
235 * i386-tlb.h: Re-generate.
236
f7768225
JB
2372018-03-22 Jan Beulich <jbeulich@suse.com>
238
239 * i386-opc.tbl (vfrczp*, vpcmov, vpermil2p*): Fold 128- and
240 256-bit templates. Drop redundant leftover Disp<N>.
241 * i386-tlb.h: Re-generate.
242
0e35537d
JW
2432018-03-14 Kito Cheng <kito.cheng@gmail.com>
244
245 * riscv-opc.c (riscv_insn_types): New.
246
b4a3689a
NC
2472018-03-13 Nick Clifton <nickc@redhat.com>
248
249 * po/pt_BR.po: Updated Brazilian Portuguese translation.
250
d3d50934
L
2512018-03-08 H.J. Lu <hongjiu.lu@intel.com>
252
253 * i386-opc.tbl: Add Optimize to clr.
254 * i386-tbl.h: Regenerated.
255
bd5dea88
L
2562018-03-08 H.J. Lu <hongjiu.lu@intel.com>
257
258 * i386-gen.c (opcode_modifiers): Remove OldGcc.
259 * i386-opc.h (OldGcc): Removed.
260 (i386_opcode_modifier): Remove oldgcc.
261 * i386-opc.tbl: Remove fsubp, fsubrp, fdivp and fdivrp
262 instructions for old (<= 2.8.1) versions of gcc.
263 * i386-tbl.h: Regenerated.
264
e771e7c9
JB
2652018-03-08 Jan Beulich <jbeulich@suse.com>
266
267 * i386-opc.h (EVEXDYN): New.
268 * i386-opc.tbl: Fold various AVX512VL templates.
269 * i386-tlb.h: Re-generate.
270
ed438a93
JB
2712018-03-08 Jan Beulich <jbeulich@suse.com>
272
273 * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
274 vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
275 vpexpandd, vpexpandq): Fold AFX512VF templates.
276 * i386-tlb.h: Re-generate.
277
454172a9
JB
2782018-03-08 Jan Beulich <jbeulich@suse.com>
279
280 * i386-opc.tbl (vgf2p8affineinvqb, vgf2p8affineqb, vgf2p8mulb):
281 Fold 128- and 256-bit VEX-encoded templates.
282 * i386-tlb.h: Re-generate.
283
36824150
JB
2842018-03-08 Jan Beulich <jbeulich@suse.com>
285
286 * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
287 vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
288 vpexpandd, vpexpandq): Fold AVX512F templates.
289 * i386-tlb.h: Re-generate.
290
e7f5c0a9
JB
2912018-03-08 Jan Beulich <jbeulich@suse.com>
292
293 * i386-opc.tbl (llwpcb, slwpcb, lwpval, lwpins): Fold 32- and
294 64-bit templates. Drop Disp<N>.
295 * i386-tlb.h: Re-generate.
296
25a4277f
JB
2972018-03-08 Jan Beulich <jbeulich@suse.com>
298
299 * i386-opc.tbl (vfmadd*, vfmsub*, vfnmadd*, vfnmsub*): Fold 128-
300 and 256-bit templates.
301 * i386-tlb.h: Re-generate.
302
d2224064
JB
3032018-03-08 Jan Beulich <jbeulich@suse.com>
304
305 * i386-opc.tbl (cmpxchg8b): Add NoRex64.
306 * i386-tlb.h: Re-generate.
307
1b193f0b
JB
3082018-03-08 Jan Beulich <jbeulich@suse.com>
309
310 * i386-opc.tbl (cmpxchg16b, fisttp, fisttpll, bndmov, mwaitx):
311 Drop NoAVX.
312 * i386-tlb.h: Re-generate.
313
f2f6a710
JB
3142018-03-08 Jan Beulich <jbeulich@suse.com>
315
316 * i386-opc.tbl (ldmxcsr, stmxcsr): Add NoAVX.
317 * i386-tlb.h: Re-generate.
318
38e314eb
JB
3192018-03-08 Jan Beulich <jbeulich@suse.com>
320
321 * i386-gen.c (opcode_modifiers): Delete FloatD.
322 * i386-opc.h (FloatD): Delete.
323 (struct i386_opcode_modifier): Delete floatd.
324 * i386-opc.tbl (fadd, fsub, fsubr, fmul, fdiv, fdivr): Replace
325 FloatD by D.
326 * i386-tlb.h: Re-generate.
327
d53e6b98
JB
3282018-03-08 Jan Beulich <jbeulich@suse.com>
329
330 * i386-dis.c (float_reg): Adjust DC and DE fsub*/fdiv* patterns.
331
2907c2f5
JB
3322018-03-08 Jan Beulich <jbeulich@suse.com>
333
334 * i386-opc.tbl (vmovd): Disallow Qword memory operands.
335 * i386-tlb.h: Re-generate.
336
73053c1f
JB
3372018-03-08 Jan Beulich <jbeulich@suse.com>
338
339 * i386-opc.tbl (vcvtpd2ps): Fold AVX 128- and 256-bit memory
340 forms.
341 * i386-tlb.h: Re-generate.
342
52fe4420
AM
3432018-03-07 Alan Modra <amodra@gmail.com>
344
345 * disassemble.c (disassembler): Use bfd_arch_powerpc entry for
346 bfd_arch_rs6000.
347 * disassemble.h (print_insn_rs6000): Delete.
348 * ppc-dis.c (powerpc_init_dialect): Handle rs6000.
349 (disassemble_init_powerpc): Call powerpc_init_dialect for rs6000.
350 (print_insn_rs6000): Delete.
351
a6743a54
AM
3522018-03-03 Alan Modra <amodra@gmail.com>
353
354 * sysdep.h (opcodes_error_handler): Define.
355 (_bfd_error_handler): Declare.
356 * Makefile.am: Remove stray #.
357 * opc2c.c (main): Remove bogus -l arg handling. Print "DO NOT
358 EDIT" comment.
359 * aarch64-dis.c, * arc-dis.c, * arm-dis.c, * avr-dis.c,
360 * d30v-dis.c, * h8300-dis.c, * mmix-dis.c, * ppc-dis.c,
361 * riscv-dis.c, * s390-dis.c, * sparc-dis.c, * v850-dis.c: Use
362 opcodes_error_handler to print errors. Standardize error messages.
363 * msp430-decode.opc, * nios2-dis.c, * rl78-decode.opc: Likewise,
364 and include opintl.h.
365 * nds32-asm.c: Likewise, and include sysdep.h and opintl.h.
366 * i386-gen.c: Standardize error messages.
367 * msp430-decode.c, * rl78-decode.c, rx-decode.c: Regenerate.
368 * Makefile.in: Regenerate.
369 * epiphany-asm.c, * epiphany-desc.c, * epiphany-dis.c,
370 * epiphany-ibld.c, * fr30-asm.c, * fr30-desc.c, * fr30-dis.c,
371 * fr30-ibld.c, * frv-asm.c, * frv-desc.c, * frv-dis.c, * frv-ibld.c,
372 * frv-opc.c, * ip2k-asm.c, * ip2k-desc.c, * ip2k-dis.c, * ip2k-ibld.c,
373 * iq2000-asm.c, * iq2000-desc.c, * iq2000-dis.c, * iq2000-ibld.c,
374 * lm32-asm.c, * lm32-desc.c, * lm32-dis.c, * lm32-ibld.c,
375 * m32c-asm.c, * m32c-desc.c, * m32c-dis.c, * m32c-ibld.c,
376 * m32r-asm.c, * m32r-desc.c, * m32r-dis.c, * m32r-ibld.c,
377 * mep-asm.c, * mep-desc.c, * mep-dis.c, * mep-ibld.c, * mt-asm.c,
378 * mt-desc.c, * mt-dis.c, * mt-ibld.c, * or1k-asm.c, * or1k-desc.c,
379 * or1k-dis.c, * or1k-ibld.c, * xc16x-asm.c, * xc16x-desc.c,
380 * xc16x-dis.c, * xc16x-ibld.c, * xstormy16-asm.c, * xstormy16-desc.c,
381 * xstormy16-dis.c, * xstormy16-ibld.c: Regenerate.
382
8305403a
L
3832018-03-01 H.J. Lu <hongjiu.lu@intel.com>
384
385 * * i386-opc.tbl: Add "Optimize" to AVX256 and AVX512
386 vpsub[bwdq] instructions.
387 * i386-tbl.h: Regenerated.
388
e184813f
AM
3892018-03-01 Alan Modra <amodra@gmail.com>
390
391 * configure.ac (ALL_LINGUAS): Sort.
392 * configure: Regenerate.
393
5b616bef
TP
3942018-02-27 Thomas Preud'homme <thomas.preudhomme@arm.com>
395
396 * arm-dis.c (print_insn_coprocessor): Replace uses of ARM_FEATURE_COPY
397 macro by assignements.
398
b6f8c7c4
L
3992018-02-27 H.J. Lu <hongjiu.lu@intel.com>
400
401 PR gas/22871
402 * i386-gen.c (opcode_modifiers): Add Optimize.
403 * i386-opc.h (Optimize): New enum.
404 (i386_opcode_modifier): Add optimize.
405 * i386-opc.tbl: Add "Optimize" to "mov $imm, reg",
406 "sub reg, reg/mem", "test $imm, acc", "test $imm, reg/mem",
407 "and $imm, acc", "and $imm, reg/mem", "xor reg, reg/mem",
408 "movq $imm, reg" and AVX256 and AVX512 versions of vandnps,
409 vandnpd, vpandn, vpandnd, vpandnq, vxorps, vxorpd, vpxor,
410 vpxord and vpxorq.
411 * i386-tbl.h: Regenerated.
412
e95b887f
AM
4132018-02-26 Alan Modra <amodra@gmail.com>
414
415 * crx-dis.c (getregliststring): Allocate a large enough buffer
416 to silence false positive gcc8 warning.
417
0bccfb29
JW
4182018-02-22 Shea Levy <shea@shealevy.com>
419
420 * disassemble.c (ARCH_riscv): Define if ARCH_all.
421
6b6b6807
L
4222018-02-22 H.J. Lu <hongjiu.lu@intel.com>
423
424 * i386-opc.tbl: Add {rex},
425 * i386-tbl.h: Regenerated.
426
75f31665
MR
4272018-02-20 Maciej W. Rozycki <macro@mips.com>
428
429 * mips16-opc.c (decode_mips16_operand) <'M'>: Remove case.
430 (mips16_opcodes): Replace `M' with `m' for "restore".
431
e207bc53
TP
4322018-02-19 Thomas Preud'homme <thomas.preudhomme@arm.com>
433
434 * arm-dis.c (thumb_opcodes): Fix BXNS mask.
435
87993319
MR
4362018-02-13 Maciej W. Rozycki <macro@mips.com>
437
438 * wasm32-dis.c (print_insn_wasm32): Rename `index' local
439 variable to `function_index'.
440
68d20676
NC
4412018-02-13 Nick Clifton <nickc@redhat.com>
442
443 PR 22823
444 * metag-dis.c (print_fmmov): Double buffer size to avoid warning
445 about truncation of printing.
446
d2159fdc
HW
4472018-02-12 Henry Wong <henry@stuffedcow.net>
448
449 * mips-opc.c (mips_builtin_opcodes): Correct "sigrie" encoding.
450
f174ef9f
NC
4512018-02-05 Nick Clifton <nickc@redhat.com>
452
453 * po/pt_BR.po: Updated Brazilian Portuguese translation.
454
be3a8dca
IT
4552018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
456
457 * i386-dis.c (enum): Add pconfig.
458 * i386-gen.c (cpu_flag_init): Add CPU_PCONFIG_FLAGS.
459 (cpu_flags): Add CpuPCONFIG.
460 * i386-opc.h (enum): Add CpuPCONFIG.
461 (i386_cpu_flags): Add cpupconfig.
462 * i386-opc.tbl: Add PCONFIG instruction.
463 * i386-init.h: Regenerate.
464 * i386-tbl.h: Likewise.
465
3233d7d0
IT
4662018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
467
468 * i386-dis.c (enum): Add PREFIX_0F09.
469 * i386-gen.c (cpu_flag_init): Add CPU_WBNOINVD_FLAGS.
470 (cpu_flags): Add CpuWBNOINVD.
471 * i386-opc.h (enum): Add CpuWBNOINVD.
472 (i386_cpu_flags): Add cpuwbnoinvd.
473 * i386-opc.tbl: Add WBNOINVD instruction.
474 * i386-init.h: Regenerate.
475 * i386-tbl.h: Likewise.
476
e925c834
JW
4772018-01-17 Jim Wilson <jimw@sifive.com>
478
479 * riscv-opc.c (riscv_opcodes) <addi>: Use z instead of 0.
480
d777820b
IT
4812018-01-17 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
482
483 * i386-gen.c (cpu_flag_init): Delete CPU_CET_FLAGS, CpuCET.
484 Add CPU_IBT_FLAGS, CPU_SHSTK_FLAGS, CPY_ANY_IBT_FLAGS,
485 CPU_ANY_SHSTK_FLAGS, CpuIBT, CpuSHSTK.
486 (cpu_flags): Add CpuIBT, CpuSHSTK.
487 * i386-opc.h (enum): Add CpuIBT, CpuSHSTK.
488 (i386_cpu_flags): Add cpuibt, cpushstk.
489 * i386-opc.tbl: Change CpuCET to CpuSHSTK and CpuIBT.
490 * i386-init.h: Regenerate.
491 * i386-tbl.h: Likewise.
492
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4932018-01-16 Nick Clifton <nickc@redhat.com>
494
495 * po/pt_BR.po: Updated Brazilian Portugese translation.
496 * po/de.po: Updated German translation.
497
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4982018-01-15 Jim Wilson <jimw@sifive.com>
499
500 * riscv-opc.c (match_c_nop): New.
501 (riscv_opcodes) <addi>: Handle an addi that compresses to c.nop.
502
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5032018-01-15 Nick Clifton <nickc@redhat.com>
504
505 * po/uk.po: Updated Ukranian translation.
506
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5072018-01-13 Nick Clifton <nickc@redhat.com>
508
509 * po/opcodes.pot: Regenerated.
510
769c7ea5
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5112018-01-13 Nick Clifton <nickc@redhat.com>
512
513 * configure: Regenerate.
514
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5152018-01-13 Nick Clifton <nickc@redhat.com>
516
517 2.30 branch created.
518
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5192018-01-11 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
520
521 * i386-opc.tbl: Remove VL variants for 4FMAPS and 4VNNIW insns.
522 * i386-tbl.h: Regenerate.
523
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5242018-01-10 Jan Beulich <jbeulich@suse.com>
525
526 * i386-opc.tbl (v4fmaddss, v4fnmaddss): Adjust Disp8MemShift.
527 * i386-tbl.h: Re-generate.
528
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5292018-01-10 Jan Beulich <jbeulich@suse.com>
530
531 * i386-opc.tbl (vpcmpeqb, vpcmpleb, vpcmpltb, vpcmpneqb,
532 vpcmpnleb, vpcmpnltb, vpcmpequb, vpcmpleub, vpcmpltub,
533 vpcmpnequb, vpcmpnleub, vpcmpnltub, vpcmpeqw, vpcmplew,
534 vpcmpltw, vpcmpneqw, vpcmpnlew, vpcmpnltw, vpcmpequw, vpcmpleuw,
535 vpcmpltuw, vpcmpnequw, vpcmpnleuw, vpcmpnltuw): Adjust
536 Disp8MemShift of AVX512VL forms.
537 * i386-tbl.h: Re-generate.
538
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5392018-01-09 Jim Wilson <jimw@sifive.com>
540
541 * riscv-dis.c (maybe_print_address): If base_reg is zero,
542 then the hi_addr value is zero.
543
91d8b670
JG
5442018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
545
546 * arm-dis.c (arm_opcodes): Add csdb.
547 (thumb32_opcodes): Add csdb.
548
be2e7d95
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5492018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
550
551 * aarch64-tbl.h (aarch64_opcode_table): Add "csdb".
552 * aarch64-asm-2.c: Regenerate.
553 * aarch64-dis-2.c: Regenerate.
554 * aarch64-opc-2.c: Regenerate.
555
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L
5562018-01-08 H.J. Lu <hongjiu.lu@intel.com>
557
558 PR gas/22681
559 * i386-opc.tbl: Properly encode vmovd with Qword memeory operand.
560 Remove AVX512 vmovd with 64-bit operands.
561 * i386-tbl.h: Regenerated.
562
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5632018-01-05 Jim Wilson <jimw@sifive.com>
564
565 * riscv-dis.c (print_insn_args) <'s'>: Call maybe_print_address for a
566 jalr.
567
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5682018-01-03 Alan Modra <amodra@gmail.com>
569
570 Update year range in copyright notice of all files.
571
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5722018-01-02 Jan Beulich <jbeulich@suse.com>
573
574 * i386-gen.c (operand_type_init): Restore OPERAND_TYPE_REGYMM
575 and OPERAND_TYPE_REGZMM entries.
576
1e563868 577For older changes see ChangeLog-2017
3499769a 578\f
1e563868 579Copyright (C) 2018 Free Software Foundation, Inc.
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580
581Copying and distribution of this file, with or without modification,
582are permitted in any medium without royalty provided the copyright
583notice and this notice are preserved.
584
585Local Variables:
586mode: change-log
587left-margin: 8
588fill-column: 74
589version-control: never
590End:
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