x86: extend SSE check to PCLMULQDQ, AES, and GFNI insns
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
38e314eb
JB
12018-03-08 Jan Beulich <jbeulich@suse.com>
2
3 * i386-gen.c (opcode_modifiers): Delete FloatD.
4 * i386-opc.h (FloatD): Delete.
5 (struct i386_opcode_modifier): Delete floatd.
6 * i386-opc.tbl (fadd, fsub, fsubr, fmul, fdiv, fdivr): Replace
7 FloatD by D.
8 * i386-tlb.h: Re-generate.
9
d53e6b98
JB
102018-03-08 Jan Beulich <jbeulich@suse.com>
11
12 * i386-dis.c (float_reg): Adjust DC and DE fsub*/fdiv* patterns.
13
2907c2f5
JB
142018-03-08 Jan Beulich <jbeulich@suse.com>
15
16 * i386-opc.tbl (vmovd): Disallow Qword memory operands.
17 * i386-tlb.h: Re-generate.
18
73053c1f
JB
192018-03-08 Jan Beulich <jbeulich@suse.com>
20
21 * i386-opc.tbl (vcvtpd2ps): Fold AVX 128- and 256-bit memory
22 forms.
23 * i386-tlb.h: Re-generate.
24
52fe4420
AM
252018-03-07 Alan Modra <amodra@gmail.com>
26
27 * disassemble.c (disassembler): Use bfd_arch_powerpc entry for
28 bfd_arch_rs6000.
29 * disassemble.h (print_insn_rs6000): Delete.
30 * ppc-dis.c (powerpc_init_dialect): Handle rs6000.
31 (disassemble_init_powerpc): Call powerpc_init_dialect for rs6000.
32 (print_insn_rs6000): Delete.
33
a6743a54
AM
342018-03-03 Alan Modra <amodra@gmail.com>
35
36 * sysdep.h (opcodes_error_handler): Define.
37 (_bfd_error_handler): Declare.
38 * Makefile.am: Remove stray #.
39 * opc2c.c (main): Remove bogus -l arg handling. Print "DO NOT
40 EDIT" comment.
41 * aarch64-dis.c, * arc-dis.c, * arm-dis.c, * avr-dis.c,
42 * d30v-dis.c, * h8300-dis.c, * mmix-dis.c, * ppc-dis.c,
43 * riscv-dis.c, * s390-dis.c, * sparc-dis.c, * v850-dis.c: Use
44 opcodes_error_handler to print errors. Standardize error messages.
45 * msp430-decode.opc, * nios2-dis.c, * rl78-decode.opc: Likewise,
46 and include opintl.h.
47 * nds32-asm.c: Likewise, and include sysdep.h and opintl.h.
48 * i386-gen.c: Standardize error messages.
49 * msp430-decode.c, * rl78-decode.c, rx-decode.c: Regenerate.
50 * Makefile.in: Regenerate.
51 * epiphany-asm.c, * epiphany-desc.c, * epiphany-dis.c,
52 * epiphany-ibld.c, * fr30-asm.c, * fr30-desc.c, * fr30-dis.c,
53 * fr30-ibld.c, * frv-asm.c, * frv-desc.c, * frv-dis.c, * frv-ibld.c,
54 * frv-opc.c, * ip2k-asm.c, * ip2k-desc.c, * ip2k-dis.c, * ip2k-ibld.c,
55 * iq2000-asm.c, * iq2000-desc.c, * iq2000-dis.c, * iq2000-ibld.c,
56 * lm32-asm.c, * lm32-desc.c, * lm32-dis.c, * lm32-ibld.c,
57 * m32c-asm.c, * m32c-desc.c, * m32c-dis.c, * m32c-ibld.c,
58 * m32r-asm.c, * m32r-desc.c, * m32r-dis.c, * m32r-ibld.c,
59 * mep-asm.c, * mep-desc.c, * mep-dis.c, * mep-ibld.c, * mt-asm.c,
60 * mt-desc.c, * mt-dis.c, * mt-ibld.c, * or1k-asm.c, * or1k-desc.c,
61 * or1k-dis.c, * or1k-ibld.c, * xc16x-asm.c, * xc16x-desc.c,
62 * xc16x-dis.c, * xc16x-ibld.c, * xstormy16-asm.c, * xstormy16-desc.c,
63 * xstormy16-dis.c, * xstormy16-ibld.c: Regenerate.
64
8305403a
L
652018-03-01 H.J. Lu <hongjiu.lu@intel.com>
66
67 * * i386-opc.tbl: Add "Optimize" to AVX256 and AVX512
68 vpsub[bwdq] instructions.
69 * i386-tbl.h: Regenerated.
70
e184813f
AM
712018-03-01 Alan Modra <amodra@gmail.com>
72
73 * configure.ac (ALL_LINGUAS): Sort.
74 * configure: Regenerate.
75
5b616bef
TP
762018-02-27 Thomas Preud'homme <thomas.preudhomme@arm.com>
77
78 * arm-dis.c (print_insn_coprocessor): Replace uses of ARM_FEATURE_COPY
79 macro by assignements.
80
b6f8c7c4
L
812018-02-27 H.J. Lu <hongjiu.lu@intel.com>
82
83 PR gas/22871
84 * i386-gen.c (opcode_modifiers): Add Optimize.
85 * i386-opc.h (Optimize): New enum.
86 (i386_opcode_modifier): Add optimize.
87 * i386-opc.tbl: Add "Optimize" to "mov $imm, reg",
88 "sub reg, reg/mem", "test $imm, acc", "test $imm, reg/mem",
89 "and $imm, acc", "and $imm, reg/mem", "xor reg, reg/mem",
90 "movq $imm, reg" and AVX256 and AVX512 versions of vandnps,
91 vandnpd, vpandn, vpandnd, vpandnq, vxorps, vxorpd, vpxor,
92 vpxord and vpxorq.
93 * i386-tbl.h: Regenerated.
94
e95b887f
AM
952018-02-26 Alan Modra <amodra@gmail.com>
96
97 * crx-dis.c (getregliststring): Allocate a large enough buffer
98 to silence false positive gcc8 warning.
99
0bccfb29
JW
1002018-02-22 Shea Levy <shea@shealevy.com>
101
102 * disassemble.c (ARCH_riscv): Define if ARCH_all.
103
6b6b6807
L
1042018-02-22 H.J. Lu <hongjiu.lu@intel.com>
105
106 * i386-opc.tbl: Add {rex},
107 * i386-tbl.h: Regenerated.
108
75f31665
MR
1092018-02-20 Maciej W. Rozycki <macro@mips.com>
110
111 * mips16-opc.c (decode_mips16_operand) <'M'>: Remove case.
112 (mips16_opcodes): Replace `M' with `m' for "restore".
113
e207bc53
TP
1142018-02-19 Thomas Preud'homme <thomas.preudhomme@arm.com>
115
116 * arm-dis.c (thumb_opcodes): Fix BXNS mask.
117
87993319
MR
1182018-02-13 Maciej W. Rozycki <macro@mips.com>
119
120 * wasm32-dis.c (print_insn_wasm32): Rename `index' local
121 variable to `function_index'.
122
68d20676
NC
1232018-02-13 Nick Clifton <nickc@redhat.com>
124
125 PR 22823
126 * metag-dis.c (print_fmmov): Double buffer size to avoid warning
127 about truncation of printing.
128
d2159fdc
HW
1292018-02-12 Henry Wong <henry@stuffedcow.net>
130
131 * mips-opc.c (mips_builtin_opcodes): Correct "sigrie" encoding.
132
f174ef9f
NC
1332018-02-05 Nick Clifton <nickc@redhat.com>
134
135 * po/pt_BR.po: Updated Brazilian Portuguese translation.
136
be3a8dca
IT
1372018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
138
139 * i386-dis.c (enum): Add pconfig.
140 * i386-gen.c (cpu_flag_init): Add CPU_PCONFIG_FLAGS.
141 (cpu_flags): Add CpuPCONFIG.
142 * i386-opc.h (enum): Add CpuPCONFIG.
143 (i386_cpu_flags): Add cpupconfig.
144 * i386-opc.tbl: Add PCONFIG instruction.
145 * i386-init.h: Regenerate.
146 * i386-tbl.h: Likewise.
147
3233d7d0
IT
1482018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
149
150 * i386-dis.c (enum): Add PREFIX_0F09.
151 * i386-gen.c (cpu_flag_init): Add CPU_WBNOINVD_FLAGS.
152 (cpu_flags): Add CpuWBNOINVD.
153 * i386-opc.h (enum): Add CpuWBNOINVD.
154 (i386_cpu_flags): Add cpuwbnoinvd.
155 * i386-opc.tbl: Add WBNOINVD instruction.
156 * i386-init.h: Regenerate.
157 * i386-tbl.h: Likewise.
158
e925c834
JW
1592018-01-17 Jim Wilson <jimw@sifive.com>
160
161 * riscv-opc.c (riscv_opcodes) <addi>: Use z instead of 0.
162
d777820b
IT
1632018-01-17 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
164
165 * i386-gen.c (cpu_flag_init): Delete CPU_CET_FLAGS, CpuCET.
166 Add CPU_IBT_FLAGS, CPU_SHSTK_FLAGS, CPY_ANY_IBT_FLAGS,
167 CPU_ANY_SHSTK_FLAGS, CpuIBT, CpuSHSTK.
168 (cpu_flags): Add CpuIBT, CpuSHSTK.
169 * i386-opc.h (enum): Add CpuIBT, CpuSHSTK.
170 (i386_cpu_flags): Add cpuibt, cpushstk.
171 * i386-opc.tbl: Change CpuCET to CpuSHSTK and CpuIBT.
172 * i386-init.h: Regenerate.
173 * i386-tbl.h: Likewise.
174
f6efed01
NC
1752018-01-16 Nick Clifton <nickc@redhat.com>
176
177 * po/pt_BR.po: Updated Brazilian Portugese translation.
178 * po/de.po: Updated German translation.
179
2721d702
JW
1802018-01-15 Jim Wilson <jimw@sifive.com>
181
182 * riscv-opc.c (match_c_nop): New.
183 (riscv_opcodes) <addi>: Handle an addi that compresses to c.nop.
184
616dcb87
NC
1852018-01-15 Nick Clifton <nickc@redhat.com>
186
187 * po/uk.po: Updated Ukranian translation.
188
3957a496
NC
1892018-01-13 Nick Clifton <nickc@redhat.com>
190
191 * po/opcodes.pot: Regenerated.
192
769c7ea5
NC
1932018-01-13 Nick Clifton <nickc@redhat.com>
194
195 * configure: Regenerate.
196
faf766e3
NC
1972018-01-13 Nick Clifton <nickc@redhat.com>
198
199 2.30 branch created.
200
888a89da
IT
2012018-01-11 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
202
203 * i386-opc.tbl: Remove VL variants for 4FMAPS and 4VNNIW insns.
204 * i386-tbl.h: Regenerate.
205
cbda583a
JB
2062018-01-10 Jan Beulich <jbeulich@suse.com>
207
208 * i386-opc.tbl (v4fmaddss, v4fnmaddss): Adjust Disp8MemShift.
209 * i386-tbl.h: Re-generate.
210
c9e92278
JB
2112018-01-10 Jan Beulich <jbeulich@suse.com>
212
213 * i386-opc.tbl (vpcmpeqb, vpcmpleb, vpcmpltb, vpcmpneqb,
214 vpcmpnleb, vpcmpnltb, vpcmpequb, vpcmpleub, vpcmpltub,
215 vpcmpnequb, vpcmpnleub, vpcmpnltub, vpcmpeqw, vpcmplew,
216 vpcmpltw, vpcmpneqw, vpcmpnlew, vpcmpnltw, vpcmpequw, vpcmpleuw,
217 vpcmpltuw, vpcmpnequw, vpcmpnleuw, vpcmpnltuw): Adjust
218 Disp8MemShift of AVX512VL forms.
219 * i386-tbl.h: Re-generate.
220
35fd2b2b
JW
2212018-01-09 Jim Wilson <jimw@sifive.com>
222
223 * riscv-dis.c (maybe_print_address): If base_reg is zero,
224 then the hi_addr value is zero.
225
91d8b670
JG
2262018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
227
228 * arm-dis.c (arm_opcodes): Add csdb.
229 (thumb32_opcodes): Add csdb.
230
be2e7d95
JG
2312018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
232
233 * aarch64-tbl.h (aarch64_opcode_table): Add "csdb".
234 * aarch64-asm-2.c: Regenerate.
235 * aarch64-dis-2.c: Regenerate.
236 * aarch64-opc-2.c: Regenerate.
237
704a705d
L
2382018-01-08 H.J. Lu <hongjiu.lu@intel.com>
239
240 PR gas/22681
241 * i386-opc.tbl: Properly encode vmovd with Qword memeory operand.
242 Remove AVX512 vmovd with 64-bit operands.
243 * i386-tbl.h: Regenerated.
244
35eeb78f
JW
2452018-01-05 Jim Wilson <jimw@sifive.com>
246
247 * riscv-dis.c (print_insn_args) <'s'>: Call maybe_print_address for a
248 jalr.
249
219d1afa
AM
2502018-01-03 Alan Modra <amodra@gmail.com>
251
252 Update year range in copyright notice of all files.
253
1508bbf5
JB
2542018-01-02 Jan Beulich <jbeulich@suse.com>
255
256 * i386-gen.c (operand_type_init): Restore OPERAND_TYPE_REGYMM
257 and OPERAND_TYPE_REGZMM entries.
258
1e563868 259For older changes see ChangeLog-2017
3499769a 260\f
1e563868 261Copyright (C) 2018 Free Software Foundation, Inc.
3499769a
AM
262
263Copying and distribution of this file, with or without modification,
264are permitted in any medium without royalty provided the copyright
265notice and this notice are preserved.
266
267Local Variables:
268mode: change-log
269left-margin: 8
270fill-column: 74
271version-control: never
272End:
This page took 0.133308 seconds and 4 git commands to generate.