[deliverable/binutils-gdb.git] / opcodes / ChangeLog

2016-04-13  Nick Clifton  <nickc@redhat.com>

	PR target/19937
	* v850-opc.c (v850_opcodes): Correct masks for long versions of
	the LD.B and LD.BU instructions.

2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-dis.c (find_format): Check for extension flags.
	(print_flags): New function.
	(print_insn_arc): Update for .extCondCode, .extCoreRegister and
	.extAuxRegister.
	* arc-ext.c (arcExtMap_coreRegName): Use
	LAST_EXTENSION_CORE_REGISTER.
	(arcExtMap_coreReadWrite): Likewise.
	(dump_ARC_extmap): Update printing.
	* arc-opc.c (arc_flag_classes): Add F_CLASS_EXTEND flag.
	(arc_aux_regs): Add cpu field.
	* arc-regs.h: Add cpu field, lower case name aux registers.

2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-tbl.h: Add rtsc, sleep with no arguments.

2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-opc.c (flags_none, flags_f, flags_cc, flags_ccf):
	Initialize.
	(arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
	(arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
	(arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
	(arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
	(arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
	(arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
	(arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
	(arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
	(arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
	(arc_opcode arc_opcodes): Null terminate the array.
	(arc_num_opcodes): Remove.
	* arc-ext.h (INSERT_XOP): Define.
	(extInstruction_t): Likewise.
	(arcExtMap_instName): Delete.
	(arcExtMap_insn): New function.
	(arcExtMap_genOpcode): Likewise.
	* arc-ext.c (ExtInstruction): Remove.
	(create_map): Zero initialize instruction fields.
	(arcExtMap_instName): Remove.
	(arcExtMap_insn): New function.
	(dump_ARC_extmap): More info while debuging.
	(arcExtMap_genOpcode): New function.
	* arc-dis.c (find_format): New function.
	(print_insn_arc): Use find_format.
	(arc_get_disassembler): Enable dump_ARC_extmap only when
	debugging.

2016-04-11  Maciej W. Rozycki  <macro@imgtec.com>

	* mips-dis.c (print_mips16_insn_arg): Mask unused extended
	instruction bits out.

2016-04-07  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add schd, sync, and hwschd instructions.
	* arc-opc.c (arc_flag_operands): Add new flags.
	(arc_flag_classes): Add new classes.

2016-04-07  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-opc.c (arc_opcodes): Extend comment to discus table layout.

2016-04-05  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add movbi, decode1, fbset, fbclear, encode0,
	encode1, rflt, crc16, and crc32 instructions.
	* arc-opc.c (arc_flag_operands): Add F_NPS_R.
	(arc_flag_classes): Add C_NPS_R.
	(insert_nps_bitop_size_2b): New function.
	(extract_nps_bitop_size_2b): Likewise.
	(insert_nps_bitop_uimm8): Likewise.
	(extract_nps_bitop_uimm8): Likewise.
	(arc_operands): Add new operand entries.

2016-04-05  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-regs.h: Add a new subclass field.  Add double assist
	accumulator register values.
	* arc-tbl.h: Use DPA subclass to mark the double assist
	instructions.  Use DPX/SPX subclas to mark the FPX instructions.
	* arc-opc.c (RSP): Define instead of SP.
	(arc_aux_regs): Add the subclass field.

2016-04-05  Jiong Wang  <jiong.wang@arm.com>

	* arm-dis.c: Support FP16 vmul, vmla, vmls (by scalar).

2016-03-31  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-opc.c (arc_operands): Fix operand flags for NPS_R_DST, and
	NPS_R_SRC1.

2016-03-30  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add a header comment, and fix some whitespace
	issues.  No functional changes.

2016-03-30  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-regs.h (IC_RAM_ADDRESS, IC_TAG, IC_WP, IC_DATA, CONTROL0)
	(AX2, AY2, MX2, MY2, AY0, AY1, DC_RAM_ADDR, DC_TAG, CONTROL1)
	(RTT): Remove duplicate.
	(LCDINSTR, LCDDATA, LCDSTAT, CC_*, PCT_COUNT*, PCT_SNAP*)
	(PCT_CONFIG*): Remove.
	(D1L, D1H, D2H, D2L): Define.

2016-03-29  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-ext-tbl.h (dsp_fp_i2flt): Fix typo.

2016-03-29  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-tbl.h (invld07): Remove.
	* arc-ext-tbl.h: New file.
	* arc-dis.c (FIELDA, FIELDB, FIELDC): Remove.
	* arc-opc.c (arc_opcodes): Add ext-tbl include.

2016-03-24  Jan Kratochvil  <jan.kratochvil@redhat.com>

	Fix -Wstack-usage warnings.
	* aarch64-dis.c (print_operands): Substitute size.
	* aarch64-opc.c (print_register_offset_address): Substitute tblen.

2016-03-22  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* sparc-opc.c (sparc_opcodes): Reorder entries for `rd' in order
	to get a proper diagnostic when an invalid ASR register is used.

2016-03-22  Nick Clifton  <nickc@redhat.com>

	* configure: Regenerate.

2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: New file.
	* arc-opc.c: Add top level comment.
	(insert_nps_3bit_dst): New function.
	(extract_nps_3bit_dst): New function.
	(insert_nps_3bit_src2): New function.
	(extract_nps_3bit_src2): New function.
	(insert_nps_bitop_size): New function.
	(extract_nps_bitop_size): New function.
	(arc_flag_operands): Add nps400 entries.
	(arc_flag_classes): Add nps400 entries.
	(arc_operands): Add nps400 entries.
	(arc_opcodes): Add nps400 include.

2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-opc.c (arc_flag_classes): Convert all flag classes to use
	the new class enum values.

2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-dis.c (print_insn_arc): Handle nps400.

2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-opc.c (BASE): Delete.

2016-03-18  Nick Clifton  <nickc@redhat.com>

	PR target/19721
	* aarch64-tbl.h (aarch64_opcode_table): Fix type of second operand
	of MOV insn that aliases an ORR insn.

2016-03-16  Jiong Wang  <jiong.wang@arm.com>

	* arm-dis.c (neon_opcodes): Support new FP16 instructions.

2016-03-07  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>

	* mcore-opc.h: Add const qualifiers.
	* microblaze-opc.h (struct op_code_struct): Likewise.
	* sh-opc.h: Likewise.
	* tic4x-dis.c (tic4x_print_indirect): Likewise.
	(tic4x_print_op): Likewise.

2016-03-02  Alan Modra  <amodra@gmail.com>

	* or1k-desc.h: Regenerate.
	* fr30-ibld.c: Regenerate.
	* rl78-decode.c: Regenerate.

2016-03-01  Nick Clifton  <nickc@redhat.com>

	PR target/19747
	* rl78-dis.c (print_insn_rl78_common): Fix typo.

2016-02-24  Renlin Li  <renlin.li@arm.com>

	* arm-dis.c (coprocessor_opcodes): Add fp16 instruction entries.
	(print_insn_coprocessor): Support fp16 instructions.

2016-02-24  Renlin Li  <renlin.li@arm.com>

	* arm-dis.c (print_insn_coprocessor): Fix mask for vsel, vmaxnm,
	vminnm, vrint(mpna).

2016-02-24  Renlin Li  <renlin.li@arm.com>

	* arm-dis.c (print_insn_coprocessor): Check co-processor number for
	cpd/cpd2, mcr/mcr2, mrc/mrc2, ldc/ldc2, stc/stc2.

2016-02-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (print_insn): Parenthesize expression to prevent
	truncated addresses.
	(OP_J): Likewise.

2016-02-10  Claudiu Zissulescu  <claziss@synopsys.com>
	    Janek van Oirschot  <jvanoirs@synopsys.com>

	* arc-opc.c (arc_relax_opcodes, arc_num_relax_opcodes): New
	variable.

2016-02-04  Nick Clifton  <nickc@redhat.com>

	PR target/19561
	* msp430-dis.c (print_insn_msp430): Add a special case for
	decoding an RRC instruction with the ZC bit set in the extension
	word.

2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>

	* cgen-ibld.in (insert_normal): Rework calculation of shift.
	* epiphany-ibld.c: Regenerate.
	* fr30-ibld.c: Regenerate.
	* frv-ibld.c: Regenerate.
	* ip2k-ibld.c: Regenerate.
	* iq2000-ibld.c: Regenerate.
	* lm32-ibld.c: Regenerate.
	* m32c-ibld.c: Regenerate.
	* m32r-ibld.c: Regenerate.
	* mep-ibld.c: Regenerate.
	* mt-ibld.c: Regenerate.
	* or1k-ibld.c: Regenerate.
	* xc16x-ibld.c: Regenerate.
	* xstormy16-ibld.c: Regenerate.

2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>

	* epiphany-dis.c: Regenerated from latest cpu files.

2016-02-01  Michael McConville  <mmcco@mykolab.com>

	* cgen-dis.c (count_decodable_bits): Use unsigned value for mask
	test bit.

2016-01-25  Renlin Li  <renlin.li@arm.com>

	* arm-dis.c (mapping_symbol_for_insn): New function.
	(find_ifthen_state): Call mapping_symbol_for_insn().

2016-01-20  Matthew Wahab  <matthew.wahab@arm.com>

	* aarch64-opc.c (operand_general_constraint_met_p): Check validity
	of MSR UAO immediate operand.

2016-01-18  Maciej W. Rozycki  <macro@imgtec.com>

	* mips-dis.c (print_insn_micromips): Remove 48-bit microMIPS
	instruction support.

2016-01-17  Alan Modra  <amodra@gmail.com>

	* configure: Regenerate.

2016-01-14  Nick Clifton  <nickc@redhat.com>

	* rl78-decode.opc (rl78_decode_opcode): Add 's' operand to movw
	instructions that can support stack pointer operations.
	* rl78-decode.c: Regenerate.
	* rl78-dis.c: Fix display of stack pointer in MOVW based
	instructions.

2016-01-14  Matthew Wahab  <matthew.wahab@arm.com>

	* aarch64-opc.c (aarch64_sys_reg_supported_p): Merge conditionals
	testing for RAS support.  Add checks for erxfr_el1, erxctlr_el1,
	erxtatus_el1 and erxaddr_el1.

2016-01-12  Matthew Wahab  <matthew.wahab@arm.com>

	* arm-dis.c (arm_opcodes): Add "esb".
	(thumb_opcodes): Likewise.

2016-01-11  Peter Bergner <bergner@vnet.ibm.com>

	* ppc-opc.c <xscmpnedp>: Delete.
	<xvcmpnedp>: Likewise.
	<xvcmpnedp.>: Likewise.
	<xvcmpnesp>: Likewise.
	<xvcmpnesp.>: Likewise.

2016-01-08  Andreas Schwab  <schwab@linux-m68k.org>

	PR gas/13050
	* m68k-opc.c (moveb, movew): For ISA_B/C only allow #,d(An) in
	addition to ISA_A.

2016-01-01  Alan Modra  <amodra@gmail.com>

	Update year range in copyright notice of all files.

For older changes see ChangeLog-2015
\f
Copyright (C) 2016 Free Software Foundation, Inc.

Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved.

Local Variables:
mode: change-log
left-margin: 8
fill-column: 74
version-control: never
End:
Commit	Line	Data
accc0180 NC	1	2016-04-13 Nick Clifton <nickc@redhat.com>
	2
	3	PR target/19937
	4	* v850-opc.c (v850_opcodes): Correct masks for long versions of
	5	the LD.B and LD.BU instructions.
	6
f36e33da CZ	7	2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
	8
	9	* arc-dis.c (find_format): Check for extension flags.
	10	(print_flags): New function.
	11	(print_insn_arc): Update for .extCondCode, .extCoreRegister and
	12	.extAuxRegister.
	13	* arc-ext.c (arcExtMap_coreRegName): Use
	14	LAST_EXTENSION_CORE_REGISTER.
	15	(arcExtMap_coreReadWrite): Likewise.
	16	(dump_ARC_extmap): Update printing.
	17	* arc-opc.c (arc_flag_classes): Add F_CLASS_EXTEND flag.
	18	(arc_aux_regs): Add cpu field.
	19	* arc-regs.h: Add cpu field, lower case name aux registers.
	20
1c2e355e CZ	21	2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
	22
	23	* arc-tbl.h: Add rtsc, sleep with no arguments.
	24
b99747ae CZ	25	2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
	26
	27	* arc-opc.c (flags_none, flags_f, flags_cc, flags_ccf):
	28	Initialize.
	29	(arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
	30	(arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
	31	(arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
	32	(arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
	33	(arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
	34	(arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
	35	(arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
	36	(arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
	37	(arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
	38	(arc_opcode arc_opcodes): Null terminate the array.
	39	(arc_num_opcodes): Remove.
	40	* arc-ext.h (INSERT_XOP): Define.
	41	(extInstruction_t): Likewise.
	42	(arcExtMap_instName): Delete.
	43	(arcExtMap_insn): New function.
	44	(arcExtMap_genOpcode): Likewise.
	45	* arc-ext.c (ExtInstruction): Remove.
	46	(create_map): Zero initialize instruction fields.
	47	(arcExtMap_instName): Remove.
	48	(arcExtMap_insn): New function.
	49	(dump_ARC_extmap): More info while debuging.
	50	(arcExtMap_genOpcode): New function.
	51	* arc-dis.c (find_format): New function.
	52	(print_insn_arc): Use find_format.
	53	(arc_get_disassembler): Enable dump_ARC_extmap only when
	54	debugging.
	55
92708cec MR	56	2016-04-11 Maciej W. Rozycki <macro@imgtec.com>
	57
	58	* mips-dis.c (print_mips16_insn_arg): Mask unused extended
	59	instruction bits out.
	60
a42a4f84 AB	61	2016-04-07 Andrew Burgess <andrew.burgess@embecosm.com>
	62
	63	* arc-nps400-tbl.h: Add schd, sync, and hwschd instructions.
	64	* arc-opc.c (arc_flag_operands): Add new flags.
	65	(arc_flag_classes): Add new classes.
	66
1328504b AB	67	2016-04-07 Andrew Burgess <andrew.burgess@embecosm.com>
	68
	69	* arc-opc.c (arc_opcodes): Extend comment to discus table layout.
	70
820f03ff AB	71	2016-04-05 Andrew Burgess <andrew.burgess@embecosm.com>
	72
	73	* arc-nps400-tbl.h: Add movbi, decode1, fbset, fbclear, encode0,
	74	encode1, rflt, crc16, and crc32 instructions.
	75	* arc-opc.c (arc_flag_operands): Add F_NPS_R.
	76	(arc_flag_classes): Add C_NPS_R.
	77	(insert_nps_bitop_size_2b): New function.
	78	(extract_nps_bitop_size_2b): Likewise.
	79	(insert_nps_bitop_uimm8): Likewise.
	80	(extract_nps_bitop_uimm8): Likewise.
	81	(arc_operands): Add new operand entries.
	82
8ddf6b2a CZ	83	2016-04-05 Claudiu Zissulescu <claziss@synopsys.com>
8ddf6b2a CZ	84
b99747ae CZ	85	* arc-regs.h: Add a new subclass field. Add double assist
	86	accumulator register values.
	87	* arc-tbl.h: Use DPA subclass to mark the double assist
	88	instructions. Use DPX/SPX subclas to mark the FPX instructions.
	89	* arc-opc.c (RSP): Define instead of SP.
	90	(arc_aux_regs): Add the subclass field.
8ddf6b2a	91
589a7d88 JW	92	2016-04-05 Jiong Wang <jiong.wang@arm.com>
	93
	94	* arm-dis.c: Support FP16 vmul, vmla, vmls (by scalar).
	95
0a191de9	96	2016-03-31 Andrew Burgess <andrew.burgess@embecosm.com>
2cce10e7 AB	97
	98	* arc-opc.c (arc_operands): Fix operand flags for NPS_R_DST, and
	99	NPS_R_SRC1.
	100
0a106562 AB	101	2016-03-30 Andrew Burgess <andrew.burgess@embecosm.com>
	102
	103	* arc-nps400-tbl.h: Add a header comment, and fix some whitespace
	104	issues. No functional changes.
	105
bd05ac5f CZ	106	2016-03-30 Claudiu Zissulescu <claziss@synopsys.com>
bd05ac5f CZ	107
b99747ae CZ	108	* arc-regs.h (IC_RAM_ADDRESS, IC_TAG, IC_WP, IC_DATA, CONTROL0)
	109	(AX2, AY2, MX2, MY2, AY0, AY1, DC_RAM_ADDR, DC_TAG, CONTROL1)
	110	(RTT): Remove duplicate.
	111	(LCDINSTR, LCDDATA, LCDSTAT, CC_, PCT_COUNT, PCT_SNAP*)
	112	(PCT_CONFIG*): Remove.
	113	(D1L, D1H, D2H, D2L): Define.
bd05ac5f	114
9885948f CZ	115	2016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
9885948f CZ	116
b99747ae	117	* arc-ext-tbl.h (dsp_fp_i2flt): Fix typo.
9885948f	118
f2dd8838 CZ	119	2016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
f2dd8838 CZ	120
b99747ae CZ	121	* arc-tbl.h (invld07): Remove.
	122	* arc-ext-tbl.h: New file.
	123	* arc-dis.c (FIELDA, FIELDB, FIELDC): Remove.
	124	* arc-opc.c (arc_opcodes): Add ext-tbl include.
f2dd8838	125
0d2f91fe JK	126	2016-03-24 Jan Kratochvil <jan.kratochvil@redhat.com>
	127
	128	Fix -Wstack-usage warnings.
	129	* aarch64-dis.c (print_operands): Substitute size.
	130	* aarch64-opc.c (print_register_offset_address): Substitute tblen.
	131
a6b71f42 JM	132	2016-03-22 Jose E. Marchesi <jose.marchesi@oracle.com>
	133
	134	* sparc-opc.c (sparc_opcodes): Reorder entries for `rd' in order
	135	to get a proper diagnostic when an invalid ASR register is used.
	136
9780e045 NC	137	2016-03-22 Nick Clifton <nickc@redhat.com>
	138
	139	* configure: Regenerate.
	140
e23e8ebe AB	141	2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
	142
	143	* arc-nps400-tbl.h: New file.
	144	* arc-opc.c: Add top level comment.
	145	(insert_nps_3bit_dst): New function.
	146	(extract_nps_3bit_dst): New function.
	147	(insert_nps_3bit_src2): New function.
	148	(extract_nps_3bit_src2): New function.
	149	(insert_nps_bitop_size): New function.
	150	(extract_nps_bitop_size): New function.
	151	(arc_flag_operands): Add nps400 entries.
	152	(arc_flag_classes): Add nps400 entries.
	153	(arc_operands): Add nps400 entries.
	154	(arc_opcodes): Add nps400 include.
	155
1ae8ab47 AB	156	2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
	157
	158	* arc-opc.c (arc_flag_classes): Convert all flag classes to use
	159	the new class enum values.
	160
8699fc3e AB	161	2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
	162
	163	* arc-dis.c (print_insn_arc): Handle nps400.
	164
24740d83 AB	165	2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
	166
	167	* arc-opc.c (BASE): Delete.
	168
8678914f NC	169	2016-03-18 Nick Clifton <nickc@redhat.com>
	170
	171	PR target/19721
	172	* aarch64-tbl.h (aarch64_opcode_table): Fix type of second operand
	173	of MOV insn that aliases an ORR insn.
	174
cc933301 JW	175	2016-03-16 Jiong Wang <jiong.wang@arm.com>
	176
	177	* arm-dis.c (neon_opcodes): Support new FP16 instructions.
	178
f86f5863 TS	179	2016-03-07 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
	180
	181	* mcore-opc.h: Add const qualifiers.
	182	* microblaze-opc.h (struct op_code_struct): Likewise.
	183	* sh-opc.h: Likewise.
	184	* tic4x-dis.c (tic4x_print_indirect): Likewise.
	185	(tic4x_print_op): Likewise.
	186
62de1c63 AM	187	2016-03-02 Alan Modra <amodra@gmail.com>
62de1c63 AM	188
d11698cd	189	* or1k-desc.h: Regenerate.
62de1c63	190	* fr30-ibld.c: Regenerate.
c697cf0b	191	* rl78-decode.c: Regenerate.
62de1c63	192
020efce5 NC	193	2016-03-01 Nick Clifton <nickc@redhat.com>
	194
	195	PR target/19747
	196	* rl78-dis.c (print_insn_rl78_common): Fix typo.
	197
b0c11777 RL	198	2016-02-24 Renlin Li <renlin.li@arm.com>
	199
	200	* arm-dis.c (coprocessor_opcodes): Add fp16 instruction entries.
	201	(print_insn_coprocessor): Support fp16 instructions.
	202
3e309328 RL	203	2016-02-24 Renlin Li <renlin.li@arm.com>
	204
	205	* arm-dis.c (print_insn_coprocessor): Fix mask for vsel, vmaxnm,
	206	vminnm, vrint(mpna).
	207
8afc7bea RL	208	2016-02-24 Renlin Li <renlin.li@arm.com>
	209
	210	* arm-dis.c (print_insn_coprocessor): Check co-processor number for
	211	cpd/cpd2, mcr/mcr2, mrc/mrc2, ldc/ldc2, stc/stc2.
	212
4fd7268a L	213	2016-02-15 H.J. Lu <hongjiu.lu@intel.com>
	214
	215	* i386-dis.c (print_insn): Parenthesize expression to prevent
	216	truncated addresses.
	217	(OP_J): Likewise.
	218
4670103e CZ	219	2016-02-10 Claudiu Zissulescu <claziss@synopsys.com>
	220	Janek van Oirschot <jvanoirs@synopsys.com>
	221
b99747ae CZ	222	* arc-opc.c (arc_relax_opcodes, arc_num_relax_opcodes): New
b99747ae CZ	223	variable.
4670103e	224
c1d9289f NC	225	2016-02-04 Nick Clifton <nickc@redhat.com>
	226
	227	PR target/19561
	228	* msp430-dis.c (print_insn_msp430): Add a special case for
	229	decoding an RRC instruction with the ZC bit set in the extension
	230	word.
	231
a143b004 AB	232	2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
	233
	234	* cgen-ibld.in (insert_normal): Rework calculation of shift.
	235	* epiphany-ibld.c: Regenerate.
	236	* fr30-ibld.c: Regenerate.
	237	* frv-ibld.c: Regenerate.
	238	* ip2k-ibld.c: Regenerate.
	239	* iq2000-ibld.c: Regenerate.
	240	* lm32-ibld.c: Regenerate.
	241	* m32c-ibld.c: Regenerate.
	242	* m32r-ibld.c: Regenerate.
	243	* mep-ibld.c: Regenerate.
	244	* mt-ibld.c: Regenerate.
	245	* or1k-ibld.c: Regenerate.
	246	* xc16x-ibld.c: Regenerate.
	247	* xstormy16-ibld.c: Regenerate.
	248
b89807c6 AB	249	2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
	250
	251	* epiphany-dis.c: Regenerated from latest cpu files.
	252
d8c823c8 MM	253	2016-02-01 Michael McConville <mmcco@mykolab.com>
	254
	255	* cgen-dis.c (count_decodable_bits): Use unsigned value for mask
	256	test bit.
	257
5bc5ae88 RL	258	2016-01-25 Renlin Li <renlin.li@arm.com>
	259
	260	* arm-dis.c (mapping_symbol_for_insn): New function.
	261	(find_ifthen_state): Call mapping_symbol_for_insn().
	262
0bff6e2d MW	263	2016-01-20 Matthew Wahab <matthew.wahab@arm.com>
	264
	265	* aarch64-opc.c (operand_general_constraint_met_p): Check validity
	266	of MSR UAO immediate operand.
	267
100b4f2e MR	268	2016-01-18 Maciej W. Rozycki <macro@imgtec.com>
	269
	270	* mips-dis.c (print_insn_micromips): Remove 48-bit microMIPS
	271	instruction support.
	272
5c14705f AM	273	2016-01-17 Alan Modra <amodra@gmail.com>
	274
	275	* configure: Regenerate.
	276
4d82fe66 NC	277	2016-01-14 Nick Clifton <nickc@redhat.com>
	278
	279	* rl78-decode.opc (rl78_decode_opcode): Add 's' operand to movw
	280	instructions that can support stack pointer operations.
	281	* rl78-decode.c: Regenerate.
	282	* rl78-dis.c: Fix display of stack pointer in MOVW based
	283	instructions.
	284
651657fa MW	285	2016-01-14 Matthew Wahab <matthew.wahab@arm.com>
	286
	287	* aarch64-opc.c (aarch64_sys_reg_supported_p): Merge conditionals
	288	testing for RAS support. Add checks for erxfr_el1, erxctlr_el1,
	289	erxtatus_el1 and erxaddr_el1.
	290
105bde57 MW	291	2016-01-12 Matthew Wahab <matthew.wahab@arm.com>
	292
	293	* arm-dis.c (arm_opcodes): Add "esb".
	294	(thumb_opcodes): Likewise.
	295
afa8d405 PB	296	2016-01-11 Peter Bergner <bergner@vnet.ibm.com>
	297
	298	* ppc-opc.c <xscmpnedp>: Delete.
	299	<xvcmpnedp>: Likewise.
	300	<xvcmpnedp.>: Likewise.
	301	<xvcmpnesp>: Likewise.
	302	<xvcmpnesp.>: Likewise.
	303
83c3256e AS	304	2016-01-08 Andreas Schwab <schwab@linux-m68k.org>
	305
	306	PR gas/13050
	307	* m68k-opc.c (moveb, movew): For ISA_B/C only allow #,d(An) in
	308	addition to ISA_A.
	309
6f2750fe AM	310	2016-01-01 Alan Modra <amodra@gmail.com>
	311
	312	Update year range in copyright notice of all files.
	313
3499769a AM	314	For older changes see ChangeLog-2015
	315	\f
	316	Copyright (C) 2016 Free Software Foundation, Inc.
	317
	318	Copying and distribution of this file, with or without modification,
	319	are permitted in any medium without royalty provided the copyright
	320	notice and this notice are preserved.
	321
	322	Local Variables:
	323	mode: change-log
	324	left-margin: 8
	325	fill-column: 74
	326	version-control: never
	327	End: