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[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
4d67a4d3
L		 12007-05-10 H.J. Lu <hongjiu.lu@intel.com>
2
3 * i386-opc.h (ShortForm): Redefined.
4 (Jump): Likewise.
5 (JumpDword): Likewise.
6 (JumpByte): Likewise.
7 (JumpInterSegment): Likewise.
8 (FloatMF): Likewise.
9 (FloatR): Likewise.
10 (FloatD): Likewise.
11 (Size16): Likewise.
12 (Size32): Likewise.
13 (Size64): Likewise.
14 (IgnoreSize): Likewise.
15 (DefaultSize): Likewise.
16 (No_bSuf): Likewise.
17 (No_wSuf): Likewise.
18 (No_lSuf): Likewise.
19 (No_sSuf): Likewise.
20 (No_qSuf): Likewise.
21 (No_xSuf): Likewise.
22 (FWait): Likewise.
23 (IsString): Likewise.
24 (regKludge): Likewise.
25 (IsPrefix): Likewise.
26 (ImmExt): Likewise.
27 (NoRex64): Likewise.
28 (Rex64): Likewise.
29 (Ugh): Likewise.
30
8de28984
L		 312007-05-07 H.J. Lu <hongjiu.lu@intel.com>
32
33 * i386-dis.c (threebyte_0x38_uses_DATA_prefix): Correct entries
34 for some SSE4 instructions.
35 (threebyte_0x3a_uses_DATA_prefix): Likewise.
36
20592a94
L		 372007-05-03 H.J. Lu <hongjiu.lu@intel.com>
38
39 * i386-dis.c (CRC32_Fixup): Don't print suffix in Intel mode.
40
41 * i386-opc.c (i386_optab): Remove IgnoreSize and correct operand
42 type for crc32.
43
9344ff29
L		 442007-05-01 H.J. Lu <hongjiu.lu@intel.com>
45
46 * i386-dis.c (CRC32_Fixup): Properly handle Intel mode and
47 check data size prefix in 16bit mode.
48
49 * i386-opc.c (i386_optab): Default crc32 to non-8bit and
50 support Intel mode.
51
53289dcd
MS		 522007-04-30 Mark Salter <msalter@redhat.com>
53
54 * frv-desc.c: Regenerate.
55 * frv-desc.h: Regenerate.
56
eb42fac1
AM		 572007-04-30 Alan Modra <amodra@bigpond.net.au>
58
59 PR 4436
60 * ppc-opc.c (powerpc_operands): Correct bitm for second entry of MBE.
61
484c222e
L		 622007-04-27 H.J. Lu <hongjiu.lu@intel.com>
63
64 * i386-dis.c (modrm): Put reg before rm.
65
5d669648
L		 662007-04-26 H.J. Lu <hongjiu.lu@intel.com>
67
68 PR binutils/4430
69 * i386-dis.c (print_displacement): New.
70 (OP_E): Call print_displacement instead of print_operand_value
71 to output displacement when either base or index exist. Print
72 the explicit zero displacement in 16bit mode.
73
185b1163
L		 742007-04-26 H.J. Lu <hongjiu.lu@intel.com>
75
76 PR binutils/4429
77 * i386-dis.c (print_insn): Also swap the order of op_riprel
78 when swapping op_index. Break when the RIP relative address
79 is printed.
80 (OP_E): Properly handle RIP relative addressing and print the
81 explicit zero displacement for Intel mode.
82
eddc20ad
AM		 832007-04-27 Alan Modra <amodra@bigpond.net.au>
84
85 * Makefile.am: Run "make dep-am".
86 * Makefile.in: Regenerate.
87 * ns32k-dis.c: Include sysdep.h first.
88
dacc8b01
MS		 892007-04-24 Andreas Krebbel <krebbel1@de.ibm.com>
90
91 * opcodes/s390-opc.c (MASK_SSF_RRDRD): Fourth nybble belongs to the
92 opcode.
eddc20ad
AM		 93 * opcodes/s390-opc.txt (pfpo, ectg, csst): Add new z9-ec instructions.
94
fbb92301
NC		 952007-04-24 Nick Clifton <nickc@redhat.com>
96
97 * arm-dis.c (print_insn): Initialise type.
98
4c273957
AM		 992007-04-24 Alan Modra <amodra@bigpond.net.au>
100
101 * cgen-types.h: Include bfd_stdint.h, not stdint.h.
102 * Makefile.am: Run "make dep-am".
103 * Makefile.in: Regenerate.
104
9a2e615a
NS		 1052007-04-23 Nathan Sidwell <nathan@codesourcery.com>
106
107 * m68k-opc.c: Mark mcfisa_c instructions.
108
37b37b2d
RE		 1092007-04-21 Richard Earnshaw <rearnsha@arm.com>
110
111 * arm-dis.c (arm_opcodes): Disassemble to unified syntax.
112 (thumb_opcodes): Add missing white space in adr.
113 (arm_decode_shift): New parameter, print_shift. Only decode the
114 shift parameter if set. Adjust callers.
115 (print_insn_arm): Support for operand type q with no shift decode.
116
717bbdf1
AM		 1172007-04-21 Alan Modra <amodra@bigpond.net.au>
118
db557034
AM		 119 * i386-opc.c (i386_float_regtab, i386_float_regtab_size): Delete.
120 Move contents to..
121 (i386_regtab): ..here.
122 * i386-opc.h (i386_float_regtab, i386_float_regtab_size): Delete.
123
717bbdf1
AM		 124 * ppc-opc.c (powerpc_operands): Delete duplicate entries.
125 (BA_MASK, FXM_MASK, STRM_MASK, VA_MASK, VB_MASK, VC_MASK): Delete.
126 (VD_MASK, WS_MASK, MTMSRD_L, XRT_L): Delete.
127 (powerpc_opcodes): Replace uses of MTMSRD_L and XRT_L.
128
78336706
NS		 1292007-04-20 Nathan Sidwell <nathan@codesourcery.com>
130
131 * m68k-dis.c (print_insn_arg): Show c04 as rambar0 and c05 as
132 rambar1.
133
b84bf58a
AM		 1342007-04-20 Alan Modra <amodra@bigpond.net.au>
135
136 * ppc-dis.c (print_insn_powerpc): Adjust for struct powerpc_operand
137 change.
138 * ppc-opc.c (powerpc_operands): Replace bit count with bit mask
139 in all entries. Add PPC_OPERAND_SIGNED to DE entry. Remove
140 references to following deleted functions.
141 (insert_bd, extract_bd, insert_dq, extract_dq): Delete.
142 (insert_ds, extract_ds, insert_de, extract_de): Delete.
143 (insert_des, extract_des, insert_li, extract_li): Delete.
144 (insert_nb, insert_rsq, insert_rtq, insert_ev2, extract_ev2): Delete.
145 (insert_ev4, extract_ev4, insert_ev8, extract_ev8): Delete.
146 (num_powerpc_operands): New constant.
147 (XSPRG_MASK): Remove entire SPRG field.
148 (powerpc_opcodes <bcctre, bcctrel>): Use XLBB_MASK not XLYBB_MASK.
149
0bbdef92
AM		 1502007-04-20 Alan Modra <amodra@bigpond.net.au>
151
152 * ppc-opc.c (DCM, DGM, TE, RMC, R, SP, S): Correct shift.
153 (Z2_MASK): Define.
154 (powerpc_opcodes): Use Z2_MASK in all insns taking RMC operand.
155
86ad2a13
RE		 1562007-04-20 Richard Earnshaw <rearnsha@arm.com>
157
158 * arm-dis.c (print_insn): Only look for a mapping symbol in the section
159 being disassembled.
160
a33e055d
AM		 1612007-04-19 Alan Modra <amodra@bigpond.net.au>
162
163 * Makefile.am: Run "make dep-am".
164 * Makefile.in: Regenerate.
165 * po/POTFILES.in: Regenerate.
166
360b1600
AM		 1672007-04-19 Alan Modra <amodra@bigpond.net.au>
168
169 * ppc-opc.c (powerpc_opcodes): Add cctpl, cctpm, cctph, db8cyc,
170 db10cyc, db12cyc, db16cyc.
171
b20ae55e
AM		 1722007-04-19 Nathan Froyd <froydnj@codesourcery.com>
173
174 * ppc-opc.c (powerpc_opcodes): Recognize three-operand tlbsxe.
175
381d071f
L		 1762007-04-18 H.J. Lu <hongjiu.lu@intel.com>
177
178 * i386-dis.c (CRC32_Fixup): New.
179 (PREGRP85, PREGRP86, PREGRP87, PREGRP88, PREGRP89, PREGRP90,
180 PREGRP91): New.
181 (threebyte_0x38_uses_DATA_prefix): Updated for SSE4.2.
182 (threebyte_0x3a_uses_DATA_prefix): Likewise.
183 (prefix_user_table): Add PREGRP85, PREGRP86, PREGRP87,
184 PREGRP88, PREGRP89, PREGRP90 and PREGRP91.
185 (three_byte_table): Likewise.
186
187 * i386-opc.c (i386_optab): Add SSE4.2 opcodes.
188
f6fdceb7 189 * i386-opc.h (CpuSSE4_2): New.
381d071f
L		 190 (CpuSSE4): Likewise.
191 (CpuUnknownFlags): Add CpuSSE4_2.
192
42903f7f
L		 1932007-04-18 H.J. Lu <hongjiu.lu@intel.com>
194
195 * i386-dis.c (XMM_Fixup): New.
196 (Edqb): New.
197 (Edqd): New.
198 (XMM0): New.
199 (dqb_mode): New.
200 (dqd_mode): New.
201 (PREGRP39 ... PREGRP85): New.
202 (threebyte_0x38_uses_DATA_prefix): Updated for SSE4.
203 (threebyte_0x3a_uses_DATA_prefix): Likewise.
204 (prefix_user_table): Add PREGRP39 ... PREGRP85.
205 (three_byte_table): Likewise.
206 (putop): Handle 'K'.
207 (intel_operand_size): Handle dqb_mode, dqd_mode):
208 (OP_E): Likewise.
209 (OP_G): Likewise.
210
211 * i386-opc.c (i386_optab): Add SSE4.1 opcodes.
212
213 * i386-opc.h (CpuSSE4_1): New.
214 (CpuUnknownFlags): Add CpuSSE4_1.
215 (regKludge): Update comment.
216
ee5c21a0
DJ		 2172007-04-18 Matthias Klose <doko@ubuntu.com>
218
219 * Makefile.am (libopcodes_la_LDFLAGS): Use bfd soversion.
220 * Makefile.in: Regenerate.
221
b7d19ba6
SE		 2222007-04-14 Steve Ellcey <sje@cup.hp.com>
223
224 * Makefile.am: Add ACLOCAL_AMFLAGS.
225 * Makefile.in: Regenerate.
226
246c51aa
L		 2272007-04-13 H.J. Lu <hongjiu.lu@intel.com>
228
229 * i386-dis.c: Remove trailing white spaces.
6e26e51a
L		 230 * i386-opc.c: Likewise.
231 * i386-opc.h: Likewise.
246c51aa 232
7967e09e
L		 2332007-04-11 H.J. Lu <hongjiu.lu@intel.com>
234
235 PR binutils/4333
236 * i386-dis.c (GRP1a): New.
237 (GRP1b ... GRPPADLCK2): Update index.
238 (dis386): Use GRP1a for entry 0x8f.
239 (mod, rm, reg): Removed. Replaced by ...
240 (modrm): This.
241 (grps): Add GRP1a.
242
56dc1f8a
KH		 2432007-04-09 Kazu Hirata <kazu@codesourcery.com>
244
245 * m68k-dis.c (print_insn_m68k): Restore info->fprintf_func and
246 info->print_address_func if longjmp is called.
247
144f4bc6
DD		 2482007-03-29 DJ Delorie <dj@redhat.com>
249
250 * m32c-desc.c: Regenerate.
251 * m32c-dis.c: Regenerate.
252 * m32c-opc.c: Regenerate.
253
e72cf3ec
L		 2542007-03-28 H.J. Lu <hongjiu.lu@intel.com>
255
256 * i386-opc.c (i386_optab): Change InvMem to RegMem for mov and
257 movq. Remove InvMem from sldt, smsw and str.
258
259 * i386-opc.h (InvMem): Renamed to ...
260 (RegMem): Update comments.
261 (AnyMem): Remove InvMem.
262
831480e9 2632007-03-27 Paul Brook <paul@codesourcery.com>
b74ed8f5 264
b74ed8f5
PB		 265 * arm-dis.c (thumb_opcodes): Add entry for undefined insns (0xbe??).
266
4146fd53
PB		 2672007-03-24 Paul Brook <paul@codesourcery.com>
268
269 * arm-dis.c (coprocessor_opcodes): Remove superfluous 0x.
270 (print_insn_coprocessor): Handle %<bitfield>x.
271
b6702015 2722007-03-24 Paul Brook <paul@codesourcery.com>
e72cf3ec 273 Mark Shinwell <shinwell@codesourcery.com>
b6702015
PB		 274
275 * arm-dis.c (arm_opcodes): Print SRS base register.
276
831480e9 2772007-03-23 H.J. Lu <hongjiu.lu@intel.com>
0003779b
L		 278
279 * i386-dis.c (prefix_name): Replace rex64XYZ with rex.WRXB.
280
281 * i386-opc.c (i386_optab): Add rex.wrxb.
282
831480e9 2832007-03-21 H.J. Lu <hongjiu.lu@intel.com>
161a04f6
L		 284
285 * i386-dis.c (REX_MODE64): Remove definition.
286 (REX_EXTX): Likewise.
287 (REX_EXTY): Likewise.
288 (REX_EXTZ): Likewise.
289 (USED_REX): Use REX_OPCODE instead of 0x40.
290 Replace REX_MODE64, REX_EXTX, REX_EXTY and REX_EXTZ with REX_W,
291 REX_R, REX_X and REX_B respectively.
292
831480e9 2932007-03-21 H.J. Lu <hongjiu.lu@intel.com>
8b38ad71
L		 294
295 PR binutils/4218
296 * i386-dis.c (PREGRP38): New.
297 (dis386): Use PREGRP38 for 0x90.
298 (prefix_user_table): Add PREGRP38.
299 (print_insn): Set uses_REPZ_prefix to 1 for pause.
300 (NOP_Fixup1): Properly handle REX bits.
301 (NOP_Fixup2): Likewise.
302
303 * i386-opc.c (i386_optab): Allow %eax with xchg in 64bit.
304 Allow register with nop.
305
75b06e7b
DD		 3062007-03-20 DJ Delorie <dj@redhat.com>
307
308 * m32c-asm.c: Regenerate.
309 * m32c-desc.c: Regenerate.
310 * m32c-desc.h: Regenerate.
311 * m32c-dis.h: Regenerate.
312 * m32c-ibld.c: Regenerate.
313 * m32c-opc.c: Regenerate.
314 * m32c-opc.h: Regenerate.
315
c3fe08fa
L		 3162007-03-15 H.J. Lu <hongjiu.lu@intel.com>
317
318 * i386-opc.c: Include "libiberty.h".
319 (i386_regtab): Remove the last entry.
320 (i386_regtab_size): New.
321 (i386_float_regtab_size): Likewise.
322
323 * i386-opc.h (i386_regtab_size): New.
324 (i386_float_regtab_size): Likewise.
325
0b1cf022
L		 3262007-03-15 H.J. Lu <hongjiu.lu@intel.com>
327
328 * Makefile.am (CFILES): Add i386-opc.c.
329 (ALL_MACHINES): Add i386-opc.lo.
330 Run "make dep-am".
331 * Makefile.in: Regenerated.
332
333 * configure.in: Add i386-opc.lo for bfd_i386_arch.
334 * configure: Regenerated.
335
336 * i386-dis.c: Include "opcode/i386.h".
337 (MAXLEN): Renamed to MAX_MNEM_SIZE. Remove definition.
338 (FWAIT_OPCODE): Remove definition.
339 (UNIXWARE_COMPAT): Renamed to SYSV386_COMPAT. Remove definition.
340 (MAX_OPERANDS): Remove definition.
341
342 * i386-opc.c: New file.
343 * i386-opc.h: Likewise.
344
56eced12
L		 3452007-03-15 H.J. Lu <hongjiu.lu@intel.com>
346
347 * Makefile.in: Regenerated.
348
6f74c397
L		 3492007-03-09 H.J. Lu <hongjiu.lu@intel.com>
350
351 * i386-dis.c (OP_Rd): Renamed to ...
352 (OP_R): This.
353 (Rd): Updated.
354 (Rm): Likewise.
355
a6d04ec4
AM		 3562007-03-08 Alan Modra <amodra@bigpond.net.au>
357
1620f33d
AM		 358 * fr30-asm.c: Regenerate.
359 * frv-asm.c: Regenerate.
360 * ip2k-asm.c: Regenerate.
361 * iq2000-asm.c: Regenerate.
362 * m32c-asm.c: Regenerate.
363 * m32r-asm.c: Regenerate.
364 * m32r-dis.c: Regenerate.
365 * mt-asm.c: Regenerate.
366 * mt-ibld.c: Regenerate.
367 * mt-opc.c: Regenerate.
368 * openrisc-asm.c: Regenerate.
369 * xc16x-asm.c: Regenerate.
370 * xstormy16-asm.c: Regenerate.
371
a6d04ec4
AM		 372 * Makefile.am: Run "make dep-am".
373 * Makefile.in: Regenerate.
374 * po/POTFILES.in: Regenerate.
375
b5639b37
MS		 3762007-03-06 Andreas Krebbel <krebbel1@de.ibm.com>
377
378 * opcodes/s390-opc.c (INSTR_RRE_FR, INSTR_RRF_F0FF2, INSTR_RRF_F0FR,
379 INSTR_RRF_UUFF, INSTR_RRF_0UFF, INSTR_RRF_FFFU, INSTR_RRR_F0FF): New
380 instruction formats added.
381 (MASK_RRE_FR, MASK_RRF_F0FF2, MASK_RRF_F0FR, MASK_RRF_UUFF,
382 MASK_RRF_0UFF, MASK_RRF_FFFU, MASK_RRR_F0FF): New instruction format
383 masks added.
384 * opcodes/s390-opc.txt (lpdfr - tgxt): Decimal floating point
385 instructions added.
386 * opcodes/s390-mkopc.c (s390_opcode_cpu_val): S390_OPCODE_Z9_EC added.
387 (main): z9-ec cpu type option added.
388 * include/opcode/s390.h (s390_opcode_cpu_val): S390_OPCODE_Z9_EC added.
389
b2e818b7
DD		 3902007-02-22 DJ Delorie <dj@redhat.com>
391
392 * s390-opc.c (INSTR_SS_L2RDRD): New.
393 (MASK_SS_L2RDRD): New.
394 * s390-opc.txt (pka): Use it.
395
8b082fb1
TS		 3962007-02-20 Thiemo Seufer <ths@mips.com>
397 Chao-Ying Fu <fu@mips.com>
398
399 * mips-dis.c (mips_arch_choices): Add DSP R2 support.
400 (print_insn_args): Add support for balign instruction.
401 * mips-opc.c (D33): New shortcut for DSP R2 instructions.
402 (mips_builtin_opcodes): Add DSP R2 instructions.
403
929e4d1a
MS		 4042007-02-19 Andreas Krebbel <krebbel1@de.ibm.com>
405
406 * s390-opc.c (INSTR_RRF_U0FR, MASK_RRF_U0FR): Removed.
407 (INSTR_RRF_U0RF, MASK_RRF_U0RF): Added.
408 * s390-opc.txt (cfxbr, cfdbr, cfebr, cgebr, cgdbr, cgxbr, cger, cgdr,
409 cgxr, cfxr, cfdr, cfer): Instruction type set to INSTR_RRF_U0RF.
410
b8e55848
MS		 4112007-02-19 Andreas Krebbel <krebbel1@de.ibm.com>
412
413 * s390-opc.txt ("efpc", "sfpc"): Set to RRE_RR_OPT instruction type.
414 * s390-opc.c (s390_operands): Add RO_28 as optional gpr.
415 (INSTR_RRE_RR_OPT, MASK_RRE_RR_OPT): New instruction type for efpc
416 and sfpc.
417
af692060
NC		 4182007-02-16 Nick Clifton <nickc@redhat.com>
419
420 PR binutils/4045
421 * avr-dis.c (comment_start): New variable, contains the prefix to
422 use when printing addresses in comments.
423 (print_insn_avr): Set comment_start to an empty space if there is
424 no symbol table available as the generic address printing code
425 will prefix the numeric value of the address with 0x.
426
ce518a5f
L		 4272007-02-13 H.J. Lu <hongjiu.lu@intel.com>
428
429 * i386-dis.c: Updated to use an array of MAX_OPERANDS operands
430 in struct dis386.
431
bd2f2e55 4322007-02-05 Dave Brolley <brolley@redhat.com>
8c9c183d
DB		 433 Richard Sandiford <rsandifo@redhat.com>
434 DJ Delorie <dj@redhat.com>
435 Graydon Hoare <graydon@redhat.com>
436 Frank Ch. Eigler <fche@redhat.com>
437 Ben Elliston <bje@redhat.com>
438
439 * Makefile.am (HFILES): Add mep-desc.h mep-opc.h.
440 (CFILES): Add mep-*.c
441 (ALL_MACHINES): Add mep-*.lo.
442 (CLEANFILES): Add stamp-mep.
443 (CGEN_CPUS): Add mep.
444 (MEP_DEPS): New variable.
445 (mep-*): New targets.
446 * configure.in: Handle bfd_mep_arch.
447 * disassemble.c (ARCH_mep): New macro.
448 (disassembler): Handle bfd_arch_mep.
449 (disassemble_init_for_target): Likewise.
450 * mep-*: New files for Toshiba Media Processor (MeP).
bd2f2e55
DB		 451 * Makefile.in: Regenerated.
452 * configure: Regenerated.
453
eb7834a6 4542007-02-05 H.J. Lu <hongjiu.lu@intel.com>
65ca155d
L		 455
456 * i386-dis.c (OP_J): Undo the last change. Properly handle 64K
457 wrap around within the same segment in 16bit mode.
458
eb7834a6 4592007-02-02 H.J. Lu <hongjiu.lu@intel.com>
206717e8
L		 460
461 * i386-dis.c (OP_J): Mask to 16bit only if there is a data16
462 prefix.
463
c4f5c3d7
L		 4642007-02-02 H.J. Lu <hongjiu.lu@intel.com>
465
466 * avr-dis.c (avr_operand): Correct PR number in comment.
467
fc523535 4682007-02-02 H.J. Lu <hongjiu.lu@intel.com>
f59a29b9
L		 469
470 * disassemble.c (disassembler_usage): Call
471 print_i386_disassembler_options for i386 disassembler.
472
473 * i386-dis.c (print_i386_disassembler_options): New.
474 (print_insn): Support the new addr64 option.
475
64a3a6fc
NC		 4762007-02-02 Hiroki Kaminaga <kaminaga@sm.sony.co.jp>
477
478 * ppc-dis.c (powerpc_dialect): Handle ppc440.
479 * ppc-dis.c (print_ppc_disassembler_options): Note the -M440 can
480 be used.
481
ba4e851b
AM		 4822007-02-02 Alan Modra <amodra@bigpond.net.au>
483
484 * ppc-opc.c (insert_bdm): -Many comment.
485 (valid_bo): Add "extract" param. Accept both powerpc and power4
486 BO fields when disassembling with -Many.
487 (insert_bo, extract_bo, insert_boe, extract_boe): Adjust valid_bo call.
488
3bdcfdf4
KH		 4892007-01-08 Kazu Hirata <kazu@codesourcery.com>
490
491 * m68k-opc.c (m68k_opcodes): Replace cpu32 with
492 cpu32 | fido_a except on tbl instructions.
493
a028a6f5
PB		 4942007-01-04 Paul Brook <paul@codesourcery.com>
495
496 * arm-dis.c (arm_opcodes): Fix cpsie and cpsid entries.
497
baee4c9e
AS		 4982007-01-04 Andreas Schwab <schwab@suse.de>
499
500 * m68k-opc.c: Fix encoding of signed bit in the cpu32 tbls insns.
501
62ac925e
JB		 5022007-01-04 Julian Brown <julian@codesourcery.com>
503
504 * arm-dis.c (neon_opcode): Fix disassembly for vshl, vqshl, vrshl,
505 vqrshl instructions.
506
10a2343e 507For older changes see ChangeLog-2006
252b5132
RH		 508\f
509Local Variables:
2f6d2f85
NC		 510mode: change-log
511left-margin: 8
512fill-column: 74
252b5132
RH		 513version-control: never
514End:
GDB Binutils - Deliverables
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