[deliverable/binutils-gdb.git] / opcodes / ChangeLog

2006-05-18  Alan Modra  <amodra@bigpond.net.au>

	* avr-dis.c: Formatting fix.

2006-05-14  Thiemo Seufer  <ths@mips.com>

	* mips16-opc.c (I1, I32, I64): New shortcut defines.
	(mips16_opcodes): Change membership of instructions to their
	lowest baseline ISA.

2006-05-09  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (grps): Update sgdt/sidt for 64bit.

2006-05-05  Julian Brown  <julian@codesourcery.com>

	* arm-dis.c (coprocessor_opcodes): Don't interpret fldmx/fstmx as
	vldm/vstm.

2006-05-05  Thiemo Seufer  <ths@mips.com>
            David Ung  <davidu@mips.com>

	* mips-opc.c: Add macro for cache instruction.

2006-05-04  Thiemo Seufer  <ths@mips.com>
            Nigel Stephens  <nigel@mips.com>
	    David Ung  <davidu@mips.com>

	* mips-dis.c (mips_arch_choices): Add smartmips instruction
	decoding to MIPS32 and MIPS32R2.  Limit DSP decoding to release
	2 ISAs.  Add MIPS3D decoding to MIPS32R2.  Add MT decoding to
	MIPS64R2.
	* mips-opc.c: fix random typos in comments.
	(INSN_SMARTMIPS): New defines.
	(mips_builtin_opcodes): Add paired single support for MIPS32R2.
	Move bc3f, bc3fl, bc3t, bc3tl downwards.  Move flushi, flushd,
	flushid, wb upwards.  Move cfc3, ctc3 downwards.  Rework the
	FP_S and FP_D flags to denote single and double register
	accesses separately.  Move dmfc3, dmtc3, mfc3, mtc3 downwards.
	Allow jr.hb and jalr.hb for release 1 ISAs.  Allow luxc1, suxc1
	for MIPS32R2.  Add SmartMIPS instructions.  Add two-argument
	variants of bc2f, bc2fl, bc2t, bc2tl.  Add mfhc2, mthc2 to
	release 2 ISAs.
	* mips16-opc.c (mips16_opcodes): Add sdbbp instruction.

2006-05-03  Thiemo Seufer  <ths@mips.com>

	* mips-opc.c (mips_builtin_opcodes): Fix mftr argument order.

2006-05-02  Thiemo Seufer  <ths@mips.com>
            Nigel Stephens  <nigel@mips.com>
            David Ung  <davidu@mips.com>

	* mips-dis.c (print_insn_args): Force mips16 to odd addresses.
	(print_mips16_insn_arg): Force mips16 to odd addresses.

2006-04-30  Thiemo Seufer  <ths@mips.com>
            David Ung  <davidu@mips.com>

	* mips-opc.c (mips_builtin_opcodes): Add udi instructions
	"udi0" to "udi15".
	* mips-dis.c (print_insn_args): Adds udi argument handling.

2006-04-28  James E Wilson  <wilson@specifix.com>

	* m68k-dis.c (match_insn_m68k): Restore fprintf_func before printing
	error message.

2006-04-28  Thiemo Seufer  <ths@mips.com>
            David Ung  <davidu@mips.com>
	    Nigel Stephens  <nigel@mips.com>

	* mips-dis.c (mips_cp0sel_names_mips3264r2): Add MT register
	names.

2006-04-28  Thiemo Seufer  <ths@mips.com>
            Nigel Stephens  <nigel@mips.com>
            David Ung  <davidu@mips.com>

	* mips-dis.c (print_insn_args): Add mips_opcode argument.
	(print_insn_mips):  Adjust print_insn_args call.

2006-04-28  Thiemo Seufer  <ths@mips.com>
            Nigel Stephens  <nigel@mips.com>

	* mips-dis.c (print_insn_args): Print $fcc only for FP
	instructions, use $cc elsewise.

2006-04-28  Thiemo Seufer  <ths@mips.com>
            Nigel Stephens  <nigel@mips.com>

	* opcodes/mips-dis.c (mips16_to_32_reg_map, mips16_reg_names):
	Map MIPS16 registers to O32 names.
	(print_mips16_insn_arg): Use mips16_reg_names.

2006-04-26  Julian Brown  <julian@codesourcery.com>

	* arm-dis.c (print_insn_neon): Disassemble floating-point constant
	VMOV.

2006-04-26  Nathan Sidwell  <nathan@codesourcery.com>
	    Julian Brown  <julian@codesourcery.com>

	* opcodes/arm-dis.c (coprocessor_opcodes): Add %A, %B, %k, convert
	%<code>[zy] into %[zy]<code>.  Expand meaning of %<bitfield>['`?].
	Add unified load/store instruction names.
	(neon_opcode_table): New.
	(arm_opcodes): Expand meaning of %<bitfield>['`?].
	(arm_decode_bitfield): New.
	(print_insn_coprocessor): Add pc argument. Add %A & %B specifiers.
	Use arm_decode_bitfield and adjust numeric specifiers. Adjust %z & %y.
	(print_insn_neon): New.
	(print_insn_arm): Adjust print_insn_coprocessor call. Call
	print_insn_neon. Use arm_decode_bitfield and adjust numeric specifiers.
	(print_insn_thumb32): Likewise.

2006-04-19  Alan Modra  <amodra@bigpond.net.au>

	* Makefile.am: Run "make dep-am".
	* Makefile.in: Regenerate.

2006-04-19  Alan Modra  <amodra@bigpond.net.au>

	* avr-dis.c (avr_operand): Warning fix.

	* configure: Regenerate.

2006-04-16  Daniel Jacobowitz  <dan@codesourcery.com>

	* po/POTFILES.in: Regenerated.

2006-04-12   Hochstein  <hochstein@algo.informatik.tu-darmstadt.de>

	PR binutils/2454
	* avr-dis.c (avr_operand): Arrange for a comment to appear before
	the symolic form of an address, so that the output of objdump -d
	can be reassembled.

2006-04-10  DJ Delorie  <dj@redhat.com>

	* m32c-asm.c: Regenerate.

2006-04-06  Carlos O'Donell  <carlos@codesourcery.com>

	* Makefile.am: Add install-html target.
	* Makefile.in: Regenerate.

2006-04-06  Nick Clifton  <nickc@redhat.com>

	* po/vi/po: Updated Vietnamese translation.

2006-03-31  Paul Koning  <ni1d@arrl.net>

	* pdp11-opc.c (pdp11_opcodes): Fix opcode for SEC instruction.

2006-03-16  Bernd Schmidt  <bernd.schmidt@analog.com>

	* bfin-dis.c (decode_dsp32shiftimm_0): Simplify and correct the
	logic to identify halfword shifts.

2006-03-16  Paul Brook  <paul@codesourcery.com>

	* arm-dis.c (arm_opcodes): Rename swi to svc.
	(thumb_opcodes): Ditto.

2006-03-13  DJ Delorie  <dj@redhat.com>

	* m32c-asm.c: Regenerate.
	* m32c-desc.c: Likewise.
	* m32c-desc.h: Likewise.
	* m32c-dis.c: Likewise.
	* m32c-ibld.c: Likewise.
	* m32c-opc.c: Likewise.
	* m32c-opc.h: Likewise.

2006-03-10  DJ Delorie  <dj@redhat.com>

	* m32c-desc.c: Regenerate with mul.l, mulu.l.
	* m32c-opc.c: Likewise.
	* m32c-opc.h: Likewise.


2006-03-09  Nick Clifton  <nickc@redhat.com>

	* po/sv.po: Updated Swedish translation.

2006-03-07  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/2428
	* i386-dis.c (REP_Fixup): New function.
	(AL): Remove duplicate.
	(Xbr): New.
	(Xvr): Likewise.
	(Ybr): Likewise.
	(Yvr): Likewise.
	(indirDXr): Likewise.
	(ALr): Likewise.
	(eAXr): Likewise.
	(dis386): Updated entries of ins, outs, movs, lods and stos.

2006-03-05  Nick Clifton  <nickc@redhat.com>

	* cgen-ibld.in (insert_normal): Cope with attempts to insert a
	signed 32-bit value into an unsigned 32-bit field when the host is
	a 64-bit machine.
	* fr30-ibld.c: Regenerate.
	* frv-ibld.c: Regenerate.
	* ip2k-ibld.c: Regenerate.
	* iq2000-asm.c: Regenerate.
	* iq2000-ibld.c: Regenerate.
	* m32c-ibld.c: Regenerate.
	* m32r-ibld.c: Regenerate.
	* openrisc-ibld.c: Regenerate.
	* xc16x-ibld.c: Regenerate.
	* xstormy16-ibld.c: Regenerate.

2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)

	* xc16x-asm.c: Regenerate.
	* xc16x-dis.c: Regenerate.

2006-02-27  Carlos O'Donell  <carlos@codesourcery.com>

	* po/Make-in: Add html target.

2006-02-27  H.J. Lu <hongjiu.lu@intel.com>

	* i386-dis.c (IS_3BYTE_OPCODE): New for 3-byte opcodes used by
	Intel Merom New Instructions.
	(THREE_BYTE_0): Likewise.
	(THREE_BYTE_1): Likewise.
	(three_byte_table): Likewise.
	(dis386_twobyte): Use THREE_BYTE_0 for entry 0x38. Use
	THREE_BYTE_1 for entry 0x3a.
	(twobyte_has_modrm): Updated.
	(twobyte_uses_SSE_prefix): Likewise.
	(print_insn): Handle 3-byte opcodes used by Intel Merom New
	Instructions.

2006-02-24  David S. Miller  <davem@sunset.davemloft.net>

	* sparc-dis.c (v9_priv_reg_names): Add "gl" entry.
	(v9_hpriv_reg_names): New table.
	(print_insn_sparc): Allow values up to 16 for '?' and '!'.
	New cases '$' and '%' for read/write hyperprivileged register.
	* sparc-opc.c (sparc_opcodes): Add new entries for UA2005
	window handling and rdhpr/wrhpr instructions.
	
2006-02-24  DJ Delorie  <dj@redhat.com>

	* m32c-desc.c: Regenerate with linker relaxation attributes.
	* m32c-desc.h: Likewise.
	* m32c-dis.c: Likewise.
	* m32c-opc.c: Likewise.

2006-02-24  Paul Brook  <paul@codesourcery.com>

	* arm-dis.c (arm_opcodes): Add V7 instructions.
	(thumb32_opcodes): Ditto.  Handle V7M MSR/MRS variants.
	(print_arm_address): New function.
	(print_insn_arm): Use it.  Add 'P' and 'U' cases.
	(psr_name): New function.
	(print_insn_thumb32): Add 'U', 'C' and 'D' cases.

2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>

	* ia64-opc-i.c (bXc): New.
	(mXc): Likewise.
	(OpX2TaTbYaXcC): Likewise.
	(TF). Likewise.
	(TFCM). Likewise.
	(ia64_opcodes_i): Add instructions for tf.

	* ia64-opc.h (IMMU5b): New.

	* ia64-asmtab.c: Regenerated.

2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>

	* ia64-gen.c: Update copyright years.
	* ia64-opc-b.c: Likewise.

2006-02-22  H.J. Lu  <hongjiu.lu@intel.com>

	* ia64-gen.c (lookup_regindex): Handle ".vm".
	(print_dependency_table): Handle '\"'.

	* ia64-ic.tbl: Updated from SDM 2.2.
	* ia64-raw.tbl: Likewise.
	* ia64-waw.tbl: Likewise.
	* ia64-asmtab.c: Regenerated.

	* ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.

2006-02-17  Shrirang Khisti  <shrirangk@kpitcummins.com>
            Anil Paranjape   <anilp1@kpitcummins.com>
            Shilin Shakti    <shilins@kpitcummins.com>

	* xc16x-desc.h: New file
	* xc16x-desc.c: New file
	* xc16x-opc.h: New file	
	* xc16x-opc.c: New file
	* xc16x-ibld.c: New file
	* xc16x-asm.c: New file
	* xc16x-dis.c: New file
	* Makefile.am: Entries for xc16x 
	* Makefile.in: Regenerate 
	* cofigure.in: Add xc16x target information.
	* configure: Regenerate.
	* disassemble.c: Add xc16x target information.

2006-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (dis386_twobyte): Use "movZ" for debug register
	moves.

2006-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c ('Z'): Add a new macro.
	(dis386_twobyte): Use "movZ" for control register moves.

2006-02-10  Nick Clifton  <nickc@redhat.com>

	* iq2000-asm.c: Regenerate.

2006-02-07  Nathan Sidwell  <nathan@codesourcery.com>

	* m68k-dis.c (print_insn_m68k): Use bfd_m68k_mach_to_features.

2006-01-26  David Ung  <davidu@mips.com>

	* mips-opc.c: Add I33 masks to these MIPS32R2 instructions: prefx,
	ceil.l.d, ceil.l.s, cvt.d.l, cvt.l.d, cvt.l.s, cvt.s.l, floor.l.d,
	floor.l.s, ldxc1, lwxc1, madd.d, madd.s, msub.d, msub.s, nmadd.d,
	nmadd.s, nmsub.d, nmsub.s, recip.d, recip.s, round.l.d, rsqrt.d,
	rsqrt.s, sdxc1, swxc1, trunc.l.d, trunc.l.s.

2006-01-18  Arnold Metselaar  <arnoldm@sourceware.org>

	* z80-dis.c (struct buffer, prt_d, prt_d_n, arit_d, ld_r_d,
	ld_d_r, pref_xd_cb): Use signed char to hold data to be
	disassembled.	
	* z80-dis.c (TXTSIZ): Increase buffer size to 24, this fixes
	buffer overflows when disassembling instructions like
	ld (ix+123),0x23
	* z80-dis.c (opc_ind, pref_xd_cb): Suppress '+' in an indexed
	operand, if the offset is negative.

2006-01-17  Arnold Metselaar  <arnoldm@sourceware.org>

	* z80-dis.c (struct buffer, prt_d, prt_d_n, pref_xd_cb): Use
	unsigned char to hold data to be disassembled.

2006-01-17  Andreas Schwab  <schwab@suse.de>

	PR binutils/1486
	* disassemble.c (disassemble_init_for_target): Set
	disassembler_needs_relocs for bfd_arch_arm.

2006-01-16  Paul Brook  <paul@codesourcery.com>

	* m68k-opc.c (m68k_opcodes): Fix opcodes for ColdFire f?abss,
	f?add?, and f?sub? instructions.

2006-01-16  Nick Clifton  <nickc@redhat.com>

	* po/zh_CN.po: New Chinese (simplified) translation.
	* configure.in (ALL_LINGUAS): Add "zh_CH".
	* configure: Regenerate.

2006-01-05  Paul Brook  <paul@codesourcery.com>

	* m68k-opc.c (m68k_opcodes): Add missing ColdFire fdsqrtd entry.

2006-01-06  DJ Delorie  <dj@redhat.com>

	* m32c-desc.c: Regenerate.
	* m32c-opc.c: Regenerate.
	* m32c-opc.h: Regenerate.

2006-01-03  DJ Delorie  <dj@redhat.com>

	* cgen-ibld.in (extract_normal): Avoid memory range errors.
	* m32c-ibld.c: Regenerated.

For older changes see ChangeLog-2005
\f
Local Variables:
mode: change-log
left-margin: 8
fill-column: 74
version-control: never
End:
Commit	Line	Data
00988f49 AM	1	2006-05-18 Alan Modra <amodra@bigpond.net.au>
	2
	3	* avr-dis.c: Formatting fix.
	4
9b3f89ee TS	5	2006-05-14 Thiemo Seufer <ths@mips.com>
	6
	7	* mips16-opc.c (I1, I32, I64): New shortcut defines.
	8	(mips16_opcodes): Change membership of instructions to their
	9	lowest baseline ISA.
	10
cb6d3433 L	11	2006-05-09 H.J. Lu <hongjiu.lu@intel.com>
	12
	13	* i386-dis.c (grps): Update sgdt/sidt for 64bit.
	14
1f3c39b9 JB	15	2006-05-05 Julian Brown <julian@codesourcery.com>
	16
	17	* arm-dis.c (coprocessor_opcodes): Don't interpret fldmx/fstmx as
	18	vldm/vstm.
	19
d43b4baf TS	20	2006-05-05 Thiemo Seufer <ths@mips.com>
	21	David Ung <davidu@mips.com>
	22
	23	* mips-opc.c: Add macro for cache instruction.
	24
39a7806d TS	25	2006-05-04 Thiemo Seufer <ths@mips.com>
	26	Nigel Stephens <nigel@mips.com>
	27	David Ung <davidu@mips.com>
	28
	29	* mips-dis.c (mips_arch_choices): Add smartmips instruction
	30	decoding to MIPS32 and MIPS32R2. Limit DSP decoding to release
	31	2 ISAs. Add MIPS3D decoding to MIPS32R2. Add MT decoding to
	32	MIPS64R2.
	33	* mips-opc.c: fix random typos in comments.
	34	(INSN_SMARTMIPS): New defines.
	35	(mips_builtin_opcodes): Add paired single support for MIPS32R2.
	36	Move bc3f, bc3fl, bc3t, bc3tl downwards. Move flushi, flushd,
	37	flushid, wb upwards. Move cfc3, ctc3 downwards. Rework the
	38	FP_S and FP_D flags to denote single and double register
	39	accesses separately. Move dmfc3, dmtc3, mfc3, mtc3 downwards.
	40	Allow jr.hb and jalr.hb for release 1 ISAs. Allow luxc1, suxc1
	41	for MIPS32R2. Add SmartMIPS instructions. Add two-argument
	42	variants of bc2f, bc2fl, bc2t, bc2tl. Add mfhc2, mthc2 to
	43	release 2 ISAs.
	44	* mips16-opc.c (mips16_opcodes): Add sdbbp instruction.
	45
104b4fab TS	46	2006-05-03 Thiemo Seufer <ths@mips.com>
	47
	48	* mips-opc.c (mips_builtin_opcodes): Fix mftr argument order.
	49
022fac6d TS	50	2006-05-02 Thiemo Seufer <ths@mips.com>
	51	Nigel Stephens <nigel@mips.com>
	52	David Ung <davidu@mips.com>
	53
	54	* mips-dis.c (print_insn_args): Force mips16 to odd addresses.
	55	(print_mips16_insn_arg): Force mips16 to odd addresses.
	56
9bcd4f99 TS	57	2006-04-30 Thiemo Seufer <ths@mips.com>
	58	David Ung <davidu@mips.com>
	59
	60	* mips-opc.c (mips_builtin_opcodes): Add udi instructions
	61	"udi0" to "udi15".
	62	* mips-dis.c (print_insn_args): Adds udi argument handling.
	63
f095b97b JW	64	2006-04-28 James E Wilson <wilson@specifix.com>
	65
	66	* m68k-dis.c (match_insn_m68k): Restore fprintf_func before printing
	67	error message.
	68
59c455b3 TS	69	2006-04-28 Thiemo Seufer <ths@mips.com>
59c455b3 TS	70	David Ung <davidu@mips.com>
bdb09db1	71	Nigel Stephens <nigel@mips.com>
59c455b3 TS	72
	73	* mips-dis.c (mips_cp0sel_names_mips3264r2): Add MT register
	74	names.
	75
cc0ca239	76	2006-04-28 Thiemo Seufer <ths@mips.com>
bdb09db1	77	Nigel Stephens <nigel@mips.com>
cc0ca239 TS	78	David Ung <davidu@mips.com>
	79
	80	* mips-dis.c (print_insn_args): Add mips_opcode argument.
	81	(print_insn_mips): Adjust print_insn_args call.
	82
0d09bfe6	83	2006-04-28 Thiemo Seufer <ths@mips.com>
bdb09db1	84	Nigel Stephens <nigel@mips.com>
0d09bfe6 TS	85
	86	* mips-dis.c (print_insn_args): Print $fcc only for FP
	87	instructions, use $cc elsewise.
	88
654c225a	89	2006-04-28 Thiemo Seufer <ths@mips.com>
bdb09db1	90	Nigel Stephens <nigel@mips.com>
654c225a TS	91
	92	* opcodes/mips-dis.c (mips16_to_32_reg_map, mips16_reg_names):
	93	Map MIPS16 registers to O32 names.
	94	(print_mips16_insn_arg): Use mips16_reg_names.
	95
0dbde4cf JB	96	2006-04-26 Julian Brown <julian@codesourcery.com>
	97
	98	* arm-dis.c (print_insn_neon): Disassemble floating-point constant
	99	VMOV.
	100
16980d0b JB	101	2006-04-26 Nathan Sidwell <nathan@codesourcery.com>
	102	Julian Brown <julian@codesourcery.com>
	103
	104	* opcodes/arm-dis.c (coprocessor_opcodes): Add %A, %B, %k, convert
	105	%<code>[zy] into %[zy]<code>. Expand meaning of %<bitfield>['`?].
	106	Add unified load/store instruction names.
	107	(neon_opcode_table): New.
	108	(arm_opcodes): Expand meaning of %<bitfield>['`?].
	109	(arm_decode_bitfield): New.
	110	(print_insn_coprocessor): Add pc argument. Add %A & %B specifiers.
	111	Use arm_decode_bitfield and adjust numeric specifiers. Adjust %z & %y.
	112	(print_insn_neon): New.
	113	(print_insn_arm): Adjust print_insn_coprocessor call. Call
	114	print_insn_neon. Use arm_decode_bitfield and adjust numeric specifiers.
	115	(print_insn_thumb32): Likewise.
	116
ec3fcc56 AM	117	2006-04-19 Alan Modra <amodra@bigpond.net.au>
	118
	119	* Makefile.am: Run "make dep-am".
	120	* Makefile.in: Regenerate.
	121
241a6c40 AM	122	2006-04-19 Alan Modra <amodra@bigpond.net.au>
241a6c40 AM	123
7c6646cd AM	124	* avr-dis.c (avr_operand): Warning fix.
7c6646cd AM	125
241a6c40 AM	126	* configure: Regenerate.
241a6c40 AM	127
e7403566 DJ	128	2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
	129
	130	* po/POTFILES.in: Regenerated.
	131
52f16a0e NC	132	2006-04-12 Hochstein <hochstein@algo.informatik.tu-darmstadt.de>
	133
	134	PR binutils/2454
	135	* avr-dis.c (avr_operand): Arrange for a comment to appear before
	136	the symolic form of an address, so that the output of objdump -d
	137	can be reassembled.
	138
e78efa90 DD	139	2006-04-10 DJ Delorie <dj@redhat.com>
	140
	141	* m32c-asm.c: Regenerate.
	142
108a6f8e CD	143	2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
	144
	145	* Makefile.am: Add install-html target.
	146	* Makefile.in: Regenerate.
	147
a135cb2c NC	148	2006-04-06 Nick Clifton <nickc@redhat.com>
	149
	150	* po/vi/po: Updated Vietnamese translation.
	151
47426b41 AM	152	2006-03-31 Paul Koning <ni1d@arrl.net>
	153
	154	* pdp11-opc.c (pdp11_opcodes): Fix opcode for SEC instruction.
	155
331f1cbe BS	156	2006-03-16 Bernd Schmidt <bernd.schmidt@analog.com>
	157
	158	* bfin-dis.c (decode_dsp32shiftimm_0): Simplify and correct the
	159	logic to identify halfword shifts.
	160
c16d2bf0 PB	161	2006-03-16 Paul Brook <paul@codesourcery.com>
	162
	163	* arm-dis.c (arm_opcodes): Rename swi to svc.
	164	(thumb_opcodes): Ditto.
	165
5348b81e DD	166	2006-03-13 DJ Delorie <dj@redhat.com>
5348b81e DD	167
5398310a DD	168	* m32c-asm.c: Regenerate.
	169	* m32c-desc.c: Likewise.
	170	* m32c-desc.h: Likewise.
	171	* m32c-dis.c: Likewise.
	172	* m32c-ibld.c: Likewise.
5348b81e DD	173	* m32c-opc.c: Likewise.
	174	* m32c-opc.h: Likewise.
	175
253d272c DD	176	2006-03-10 DJ Delorie <dj@redhat.com>
	177
	178	* m32c-desc.c: Regenerate with mul.l, mulu.l.
	179	* m32c-opc.c: Likewise.
	180	* m32c-opc.h: Likewise.
	181
	182
f530741d NC	183	2006-03-09 Nick Clifton <nickc@redhat.com>
	184
	185	* po/sv.po: Updated Swedish translation.
	186
35c52694 L	187	2006-03-07 H.J. Lu <hongjiu.lu@intel.com>
	188
	189	PR binutils/2428
	190	* i386-dis.c (REP_Fixup): New function.
	191	(AL): Remove duplicate.
	192	(Xbr): New.
	193	(Xvr): Likewise.
	194	(Ybr): Likewise.
	195	(Yvr): Likewise.
	196	(indirDXr): Likewise.
	197	(ALr): Likewise.
	198	(eAXr): Likewise.
	199	(dis386): Updated entries of ins, outs, movs, lods and stos.
	200
ed963e2d NC	201	2006-03-05 Nick Clifton <nickc@redhat.com>
	202
	203	* cgen-ibld.in (insert_normal): Cope with attempts to insert a
	204	signed 32-bit value into an unsigned 32-bit field when the host is
	205	a 64-bit machine.
	206	* fr30-ibld.c: Regenerate.
	207	* frv-ibld.c: Regenerate.
	208	* ip2k-ibld.c: Regenerate.
	209	* iq2000-asm.c: Regenerate.
	210	* iq2000-ibld.c: Regenerate.
	211	* m32c-ibld.c: Regenerate.
	212	* m32r-ibld.c: Regenerate.
	213	* openrisc-ibld.c: Regenerate.
	214	* xc16x-ibld.c: Regenerate.
	215	* xstormy16-ibld.c: Regenerate.
	216
c7d41dc5 NC	217	2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
	218
	219	* xc16x-asm.c: Regenerate.
	220	* xc16x-dis.c: Regenerate.
c7d41dc5	221
f7d9e5c3 CD	222	2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
	223
	224	* po/Make-in: Add html target.
	225
331d2d0d L	226	2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
	227
	228	* i386-dis.c (IS_3BYTE_OPCODE): New for 3-byte opcodes used by
	229	Intel Merom New Instructions.
	230	(THREE_BYTE_0): Likewise.
	231	(THREE_BYTE_1): Likewise.
	232	(three_byte_table): Likewise.
	233	(dis386_twobyte): Use THREE_BYTE_0 for entry 0x38. Use
	234	THREE_BYTE_1 for entry 0x3a.
	235	(twobyte_has_modrm): Updated.
	236	(twobyte_uses_SSE_prefix): Likewise.
	237	(print_insn): Handle 3-byte opcodes used by Intel Merom New
	238	Instructions.
	239
ff3f9d5b DM	240	2006-02-24 David S. Miller <davem@sunset.davemloft.net>
	241
	242	* sparc-dis.c (v9_priv_reg_names): Add "gl" entry.
	243	(v9_hpriv_reg_names): New table.
	244	(print_insn_sparc): Allow values up to 16 for '?' and '!'.
	245	New cases '$' and '%' for read/write hyperprivileged register.
	246	* sparc-opc.c (sparc_opcodes): Add new entries for UA2005
	247	window handling and rdhpr/wrhpr instructions.
	248
6772dd07 DD	249	2006-02-24 DJ Delorie <dj@redhat.com>
	250
	251	* m32c-desc.c: Regenerate with linker relaxation attributes.
	252	* m32c-desc.h: Likewise.
	253	* m32c-dis.c: Likewise.
	254	* m32c-opc.c: Likewise.
	255
62b3e311 PB	256	2006-02-24 Paul Brook <paul@codesourcery.com>
	257
	258	* arm-dis.c (arm_opcodes): Add V7 instructions.
	259	(thumb32_opcodes): Ditto. Handle V7M MSR/MRS variants.
	260	(print_arm_address): New function.
	261	(print_insn_arm): Use it. Add 'P' and 'U' cases.
	262	(psr_name): New function.
	263	(print_insn_thumb32): Add 'U', 'C' and 'D' cases.
	264
59cf82fe L	265	2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
	266
	267	* ia64-opc-i.c (bXc): New.
	268	(mXc): Likewise.
	269	(OpX2TaTbYaXcC): Likewise.
	270	(TF). Likewise.
	271	(TFCM). Likewise.
	272	(ia64_opcodes_i): Add instructions for tf.
	273
	274	* ia64-opc.h (IMMU5b): New.
	275
	276	* ia64-asmtab.c: Regenerated.
	277
19a7219f L	278	2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
	279
	280	* ia64-gen.c: Update copyright years.
	281	* ia64-opc-b.c: Likewise.
	282
7f3dfb9c L	283	2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
	284
	285	* ia64-gen.c (lookup_regindex): Handle ".vm".
	286	(print_dependency_table): Handle '\"'.
	287
	288	* ia64-ic.tbl: Updated from SDM 2.2.
	289	* ia64-raw.tbl: Likewise.
	290	* ia64-waw.tbl: Likewise.
	291	* ia64-asmtab.c: Regenerated.
	292
	293	* ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.
	294
d70c5fc7 NC	295	2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
	296	Anil Paranjape <anilp1@kpitcummins.com>
	297	Shilin Shakti <shilins@kpitcummins.com>
	298
	299	* xc16x-desc.h: New file
	300	* xc16x-desc.c: New file
	301	* xc16x-opc.h: New file
	302	* xc16x-opc.c: New file
	303	* xc16x-ibld.c: New file
	304	* xc16x-asm.c: New file
	305	* xc16x-dis.c: New file
	306	* Makefile.am: Entries for xc16x
	307	* Makefile.in: Regenerate
	308	* cofigure.in: Add xc16x target information.
	309	* configure: Regenerate.
	310	* disassemble.c: Add xc16x target information.
	311
a1cfb73e L	312	2006-02-11 H.J. Lu <hongjiu.lu@intel.com>
	313
	314	* i386-dis.c (dis386_twobyte): Use "movZ" for debug register
	315	moves.
	316
6dd5059a L	317	2006-02-11 H.J. Lu <hongjiu.lu@intel.com>
	318
	319	* i386-dis.c ('Z'): Add a new macro.
	320	(dis386_twobyte): Use "movZ" for control register moves.
	321
8536c657 NC	322	2006-02-10 Nick Clifton <nickc@redhat.com>
	323
	324	* iq2000-asm.c: Regenerate.
	325
266abb8f NS	326	2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
	327
	328	* m68k-dis.c (print_insn_m68k): Use bfd_m68k_mach_to_features.
	329
f1a64f49 DU	330	2006-01-26 David Ung <davidu@mips.com>
	331
	332	* mips-opc.c: Add I33 masks to these MIPS32R2 instructions: prefx,
	333	ceil.l.d, ceil.l.s, cvt.d.l, cvt.l.d, cvt.l.s, cvt.s.l, floor.l.d,
	334	floor.l.s, ldxc1, lwxc1, madd.d, madd.s, msub.d, msub.s, nmadd.d,
	335	nmadd.s, nmsub.d, nmsub.s, recip.d, recip.s, round.l.d, rsqrt.d,
	336	rsqrt.s, sdxc1, swxc1, trunc.l.d, trunc.l.s.
	337
9e919b5f AM	338	2006-01-18 Arnold Metselaar <arnoldm@sourceware.org>
	339
	340	* z80-dis.c (struct buffer, prt_d, prt_d_n, arit_d, ld_r_d,
	341	ld_d_r, pref_xd_cb): Use signed char to hold data to be
	342	disassembled.
	343	* z80-dis.c (TXTSIZ): Increase buffer size to 24, this fixes
	344	buffer overflows when disassembling instructions like
	345	ld (ix+123),0x23
	346	* z80-dis.c (opc_ind, pref_xd_cb): Suppress '+' in an indexed
	347	operand, if the offset is negative.
	348
c9021189 AM	349	2006-01-17 Arnold Metselaar <arnoldm@sourceware.org>
	350
	351	* z80-dis.c (struct buffer, prt_d, prt_d_n, pref_xd_cb): Use
	352	unsigned char to hold data to be disassembled.
	353
d99b6465 AS	354	2006-01-17 Andreas Schwab <schwab@suse.de>
	355
	356	PR binutils/1486
	357	* disassemble.c (disassemble_init_for_target): Set
	358	disassembler_needs_relocs for bfd_arch_arm.
	359
c2fe9327 PB	360	2006-01-16 Paul Brook <paul@codesourcery.com>
c2fe9327 PB	361
e88d958a	362	* m68k-opc.c (m68k_opcodes): Fix opcodes for ColdFire f?abss,
c2fe9327 PB	363	f?add?, and f?sub? instructions.
c2fe9327 PB	364
32fba81d NC	365	2006-01-16 Nick Clifton <nickc@redhat.com>
	366
	367	* po/zh_CN.po: New Chinese (simplified) translation.
	368	* configure.in (ALL_LINGUAS): Add "zh_CH".
	369	* configure: Regenerate.
	370
1b3a26b5 PB	371	2006-01-05 Paul Brook <paul@codesourcery.com>
	372
	373	* m68k-opc.c (m68k_opcodes): Add missing ColdFire fdsqrtd entry.
	374
db313fa6 DD	375	2006-01-06 DJ Delorie <dj@redhat.com>
	376
	377	* m32c-desc.c: Regenerate.
	378	* m32c-opc.c: Regenerate.
	379	* m32c-opc.h: Regenerate.
	380
54d46aca DD	381	2006-01-03 DJ Delorie <dj@redhat.com>
	382
	383	* cgen-ibld.in (extract_normal): Avoid memory range errors.
	384	* m32c-ibld.c: Regenerated.
	385
e88d958a	386	For older changes see ChangeLog-2005
252b5132 RH	387	\f
252b5132 RH	388	Local Variables:
2f6d2f85 NC	389	mode: change-log
	390	left-margin: 8
	391	fill-column: 74
252b5132 RH	392	version-control: never
252b5132 RH	393	End: