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Add range changing to STABS parsing functions, in order to prevent buffer overruns.
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
d3d50934
L		 12018-03-08 H.J. Lu <hongjiu.lu@intel.com>
2
3 * i386-opc.tbl: Add Optimize to clr.
4 * i386-tbl.h: Regenerated.
5
bd5dea88
L		 62018-03-08 H.J. Lu <hongjiu.lu@intel.com>
7
8 * i386-gen.c (opcode_modifiers): Remove OldGcc.
9 * i386-opc.h (OldGcc): Removed.
10 (i386_opcode_modifier): Remove oldgcc.
11 * i386-opc.tbl: Remove fsubp, fsubrp, fdivp and fdivrp
12 instructions for old (<= 2.8.1) versions of gcc.
13 * i386-tbl.h: Regenerated.
14
e771e7c9
JB		 152018-03-08 Jan Beulich <jbeulich@suse.com>
16
17 * i386-opc.h (EVEXDYN): New.
18 * i386-opc.tbl: Fold various AVX512VL templates.
19 * i386-tlb.h: Re-generate.
20
ed438a93
JB		 212018-03-08 Jan Beulich <jbeulich@suse.com>
22
23 * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
24 vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
25 vpexpandd, vpexpandq): Fold AFX512VF templates.
26 * i386-tlb.h: Re-generate.
27
454172a9
JB		 282018-03-08 Jan Beulich <jbeulich@suse.com>
29
30 * i386-opc.tbl (vgf2p8affineinvqb, vgf2p8affineqb, vgf2p8mulb):
31 Fold 128- and 256-bit VEX-encoded templates.
32 * i386-tlb.h: Re-generate.
33
36824150
JB		 342018-03-08 Jan Beulich <jbeulich@suse.com>
35
36 * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
37 vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
38 vpexpandd, vpexpandq): Fold AVX512F templates.
39 * i386-tlb.h: Re-generate.
40
e7f5c0a9
JB		 412018-03-08 Jan Beulich <jbeulich@suse.com>
42
43 * i386-opc.tbl (llwpcb, slwpcb, lwpval, lwpins): Fold 32- and
44 64-bit templates. Drop Disp<N>.
45 * i386-tlb.h: Re-generate.
46
25a4277f
JB		 472018-03-08 Jan Beulich <jbeulich@suse.com>
48
49 * i386-opc.tbl (vfmadd*, vfmsub*, vfnmadd*, vfnmsub*): Fold 128-
50 and 256-bit templates.
51 * i386-tlb.h: Re-generate.
52
d2224064
JB		 532018-03-08 Jan Beulich <jbeulich@suse.com>
54
55 * i386-opc.tbl (cmpxchg8b): Add NoRex64.
56 * i386-tlb.h: Re-generate.
57
1b193f0b
JB		 582018-03-08 Jan Beulich <jbeulich@suse.com>
59
60 * i386-opc.tbl (cmpxchg16b, fisttp, fisttpll, bndmov, mwaitx):
61 Drop NoAVX.
62 * i386-tlb.h: Re-generate.
63
f2f6a710
JB		 642018-03-08 Jan Beulich <jbeulich@suse.com>
65
66 * i386-opc.tbl (ldmxcsr, stmxcsr): Add NoAVX.
67 * i386-tlb.h: Re-generate.
68
38e314eb
JB		 692018-03-08 Jan Beulich <jbeulich@suse.com>
70
71 * i386-gen.c (opcode_modifiers): Delete FloatD.
72 * i386-opc.h (FloatD): Delete.
73 (struct i386_opcode_modifier): Delete floatd.
74 * i386-opc.tbl (fadd, fsub, fsubr, fmul, fdiv, fdivr): Replace
75 FloatD by D.
76 * i386-tlb.h: Re-generate.
77
d53e6b98
JB		 782018-03-08 Jan Beulich <jbeulich@suse.com>
79
80 * i386-dis.c (float_reg): Adjust DC and DE fsub*/fdiv* patterns.
81
2907c2f5
JB		 822018-03-08 Jan Beulich <jbeulich@suse.com>
83
84 * i386-opc.tbl (vmovd): Disallow Qword memory operands.
85 * i386-tlb.h: Re-generate.
86
73053c1f
JB		 872018-03-08 Jan Beulich <jbeulich@suse.com>
88
89 * i386-opc.tbl (vcvtpd2ps): Fold AVX 128- and 256-bit memory
90 forms.
91 * i386-tlb.h: Re-generate.
92
52fe4420
AM		 932018-03-07 Alan Modra <amodra@gmail.com>
94
95 * disassemble.c (disassembler): Use bfd_arch_powerpc entry for
96 bfd_arch_rs6000.
97 * disassemble.h (print_insn_rs6000): Delete.
98 * ppc-dis.c (powerpc_init_dialect): Handle rs6000.
99 (disassemble_init_powerpc): Call powerpc_init_dialect for rs6000.
100 (print_insn_rs6000): Delete.
101
a6743a54
AM		 1022018-03-03 Alan Modra <amodra@gmail.com>
103
104 * sysdep.h (opcodes_error_handler): Define.
105 (_bfd_error_handler): Declare.
106 * Makefile.am: Remove stray #.
107 * opc2c.c (main): Remove bogus -l arg handling. Print "DO NOT
108 EDIT" comment.
109 * aarch64-dis.c, * arc-dis.c, * arm-dis.c, * avr-dis.c,
110 * d30v-dis.c, * h8300-dis.c, * mmix-dis.c, * ppc-dis.c,
111 * riscv-dis.c, * s390-dis.c, * sparc-dis.c, * v850-dis.c: Use
112 opcodes_error_handler to print errors. Standardize error messages.
113 * msp430-decode.opc, * nios2-dis.c, * rl78-decode.opc: Likewise,
114 and include opintl.h.
115 * nds32-asm.c: Likewise, and include sysdep.h and opintl.h.
116 * i386-gen.c: Standardize error messages.
117 * msp430-decode.c, * rl78-decode.c, rx-decode.c: Regenerate.
118 * Makefile.in: Regenerate.
119 * epiphany-asm.c, * epiphany-desc.c, * epiphany-dis.c,
120 * epiphany-ibld.c, * fr30-asm.c, * fr30-desc.c, * fr30-dis.c,
121 * fr30-ibld.c, * frv-asm.c, * frv-desc.c, * frv-dis.c, * frv-ibld.c,
122 * frv-opc.c, * ip2k-asm.c, * ip2k-desc.c, * ip2k-dis.c, * ip2k-ibld.c,
123 * iq2000-asm.c, * iq2000-desc.c, * iq2000-dis.c, * iq2000-ibld.c,
124 * lm32-asm.c, * lm32-desc.c, * lm32-dis.c, * lm32-ibld.c,
125 * m32c-asm.c, * m32c-desc.c, * m32c-dis.c, * m32c-ibld.c,
126 * m32r-asm.c, * m32r-desc.c, * m32r-dis.c, * m32r-ibld.c,
127 * mep-asm.c, * mep-desc.c, * mep-dis.c, * mep-ibld.c, * mt-asm.c,
128 * mt-desc.c, * mt-dis.c, * mt-ibld.c, * or1k-asm.c, * or1k-desc.c,
129 * or1k-dis.c, * or1k-ibld.c, * xc16x-asm.c, * xc16x-desc.c,
130 * xc16x-dis.c, * xc16x-ibld.c, * xstormy16-asm.c, * xstormy16-desc.c,
131 * xstormy16-dis.c, * xstormy16-ibld.c: Regenerate.
132
8305403a
L		 1332018-03-01 H.J. Lu <hongjiu.lu@intel.com>
134
135 * * i386-opc.tbl: Add "Optimize" to AVX256 and AVX512
136 vpsub[bwdq] instructions.
137 * i386-tbl.h: Regenerated.
138
e184813f
AM		 1392018-03-01 Alan Modra <amodra@gmail.com>
140
141 * configure.ac (ALL_LINGUAS): Sort.
142 * configure: Regenerate.
143
5b616bef
TP		 1442018-02-27 Thomas Preud'homme <thomas.preudhomme@arm.com>
145
146 * arm-dis.c (print_insn_coprocessor): Replace uses of ARM_FEATURE_COPY
147 macro by assignements.
148
b6f8c7c4
L		 1492018-02-27 H.J. Lu <hongjiu.lu@intel.com>
150
151 PR gas/22871
152 * i386-gen.c (opcode_modifiers): Add Optimize.
153 * i386-opc.h (Optimize): New enum.
154 (i386_opcode_modifier): Add optimize.
155 * i386-opc.tbl: Add "Optimize" to "mov $imm, reg",
156 "sub reg, reg/mem", "test $imm, acc", "test $imm, reg/mem",
157 "and $imm, acc", "and $imm, reg/mem", "xor reg, reg/mem",
158 "movq $imm, reg" and AVX256 and AVX512 versions of vandnps,
159 vandnpd, vpandn, vpandnd, vpandnq, vxorps, vxorpd, vpxor,
160 vpxord and vpxorq.
161 * i386-tbl.h: Regenerated.
162
e95b887f
AM		 1632018-02-26 Alan Modra <amodra@gmail.com>
164
165 * crx-dis.c (getregliststring): Allocate a large enough buffer
166 to silence false positive gcc8 warning.
167
0bccfb29
JW		 1682018-02-22 Shea Levy <shea@shealevy.com>
169
170 * disassemble.c (ARCH_riscv): Define if ARCH_all.
171
6b6b6807
L		 1722018-02-22 H.J. Lu <hongjiu.lu@intel.com>
173
174 * i386-opc.tbl: Add {rex},
175 * i386-tbl.h: Regenerated.
176
75f31665
MR		 1772018-02-20 Maciej W. Rozycki <macro@mips.com>
178
179 * mips16-opc.c (decode_mips16_operand) <'M'>: Remove case.
180 (mips16_opcodes): Replace `M' with `m' for "restore".
181
e207bc53
TP		 1822018-02-19 Thomas Preud'homme <thomas.preudhomme@arm.com>
183
184 * arm-dis.c (thumb_opcodes): Fix BXNS mask.
185
87993319
MR		 1862018-02-13 Maciej W. Rozycki <macro@mips.com>
187
188 * wasm32-dis.c (print_insn_wasm32): Rename `index' local
189 variable to `function_index'.
190
68d20676
NC		 1912018-02-13 Nick Clifton <nickc@redhat.com>
192
193 PR 22823
194 * metag-dis.c (print_fmmov): Double buffer size to avoid warning
195 about truncation of printing.
196
d2159fdc
HW		 1972018-02-12 Henry Wong <henry@stuffedcow.net>
198
199 * mips-opc.c (mips_builtin_opcodes): Correct "sigrie" encoding.
200
f174ef9f
NC		 2012018-02-05 Nick Clifton <nickc@redhat.com>
202
203 * po/pt_BR.po: Updated Brazilian Portuguese translation.
204
be3a8dca
IT		 2052018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
206
207 * i386-dis.c (enum): Add pconfig.
208 * i386-gen.c (cpu_flag_init): Add CPU_PCONFIG_FLAGS.
209 (cpu_flags): Add CpuPCONFIG.
210 * i386-opc.h (enum): Add CpuPCONFIG.
211 (i386_cpu_flags): Add cpupconfig.
212 * i386-opc.tbl: Add PCONFIG instruction.
213 * i386-init.h: Regenerate.
214 * i386-tbl.h: Likewise.
215
3233d7d0
IT		 2162018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
217
218 * i386-dis.c (enum): Add PREFIX_0F09.
219 * i386-gen.c (cpu_flag_init): Add CPU_WBNOINVD_FLAGS.
220 (cpu_flags): Add CpuWBNOINVD.
221 * i386-opc.h (enum): Add CpuWBNOINVD.
222 (i386_cpu_flags): Add cpuwbnoinvd.
223 * i386-opc.tbl: Add WBNOINVD instruction.
224 * i386-init.h: Regenerate.
225 * i386-tbl.h: Likewise.
226
e925c834
JW		 2272018-01-17 Jim Wilson <jimw@sifive.com>
228
229 * riscv-opc.c (riscv_opcodes) <addi>: Use z instead of 0.
230
d777820b
IT		 2312018-01-17 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
232
233 * i386-gen.c (cpu_flag_init): Delete CPU_CET_FLAGS, CpuCET.
234 Add CPU_IBT_FLAGS, CPU_SHSTK_FLAGS, CPY_ANY_IBT_FLAGS,
235 CPU_ANY_SHSTK_FLAGS, CpuIBT, CpuSHSTK.
236 (cpu_flags): Add CpuIBT, CpuSHSTK.
237 * i386-opc.h (enum): Add CpuIBT, CpuSHSTK.
238 (i386_cpu_flags): Add cpuibt, cpushstk.
239 * i386-opc.tbl: Change CpuCET to CpuSHSTK and CpuIBT.
240 * i386-init.h: Regenerate.
241 * i386-tbl.h: Likewise.
242
f6efed01
NC		 2432018-01-16 Nick Clifton <nickc@redhat.com>
244
245 * po/pt_BR.po: Updated Brazilian Portugese translation.
246 * po/de.po: Updated German translation.
247
2721d702
JW		 2482018-01-15 Jim Wilson <jimw@sifive.com>
249
250 * riscv-opc.c (match_c_nop): New.
251 (riscv_opcodes) <addi>: Handle an addi that compresses to c.nop.
252
616dcb87
NC		 2532018-01-15 Nick Clifton <nickc@redhat.com>
254
255 * po/uk.po: Updated Ukranian translation.
256
3957a496
NC		 2572018-01-13 Nick Clifton <nickc@redhat.com>
258
259 * po/opcodes.pot: Regenerated.
260
769c7ea5
NC		 2612018-01-13 Nick Clifton <nickc@redhat.com>
262
263 * configure: Regenerate.
264
faf766e3
NC		 2652018-01-13 Nick Clifton <nickc@redhat.com>
266
267 2.30 branch created.
268
888a89da
IT		 2692018-01-11 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
270
271 * i386-opc.tbl: Remove VL variants for 4FMAPS and 4VNNIW insns.
272 * i386-tbl.h: Regenerate.
273
cbda583a
JB		 2742018-01-10 Jan Beulich <jbeulich@suse.com>
275
276 * i386-opc.tbl (v4fmaddss, v4fnmaddss): Adjust Disp8MemShift.
277 * i386-tbl.h: Re-generate.
278
c9e92278
JB		 2792018-01-10 Jan Beulich <jbeulich@suse.com>
280
281 * i386-opc.tbl (vpcmpeqb, vpcmpleb, vpcmpltb, vpcmpneqb,
282 vpcmpnleb, vpcmpnltb, vpcmpequb, vpcmpleub, vpcmpltub,
283 vpcmpnequb, vpcmpnleub, vpcmpnltub, vpcmpeqw, vpcmplew,
284 vpcmpltw, vpcmpneqw, vpcmpnlew, vpcmpnltw, vpcmpequw, vpcmpleuw,
285 vpcmpltuw, vpcmpnequw, vpcmpnleuw, vpcmpnltuw): Adjust
286 Disp8MemShift of AVX512VL forms.
287 * i386-tbl.h: Re-generate.
288
35fd2b2b
JW		 2892018-01-09 Jim Wilson <jimw@sifive.com>
290
291 * riscv-dis.c (maybe_print_address): If base_reg is zero,
292 then the hi_addr value is zero.
293
91d8b670
JG		 2942018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
295
296 * arm-dis.c (arm_opcodes): Add csdb.
297 (thumb32_opcodes): Add csdb.
298
be2e7d95
JG		 2992018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
300
301 * aarch64-tbl.h (aarch64_opcode_table): Add "csdb".
302 * aarch64-asm-2.c: Regenerate.
303 * aarch64-dis-2.c: Regenerate.
304 * aarch64-opc-2.c: Regenerate.
305
704a705d
L		 3062018-01-08 H.J. Lu <hongjiu.lu@intel.com>
307
308 PR gas/22681
309 * i386-opc.tbl: Properly encode vmovd with Qword memeory operand.
310 Remove AVX512 vmovd with 64-bit operands.
311 * i386-tbl.h: Regenerated.
312
35eeb78f
JW		 3132018-01-05 Jim Wilson <jimw@sifive.com>
314
315 * riscv-dis.c (print_insn_args) <'s'>: Call maybe_print_address for a
316 jalr.
317
219d1afa
AM		 3182018-01-03 Alan Modra <amodra@gmail.com>
319
320 Update year range in copyright notice of all files.
321
1508bbf5
JB		 3222018-01-02 Jan Beulich <jbeulich@suse.com>
323
324 * i386-gen.c (operand_type_init): Restore OPERAND_TYPE_REGYMM
325 and OPERAND_TYPE_REGZMM entries.
326
1e563868 327For older changes see ChangeLog-2017
3499769a 328\f
1e563868 329Copyright (C) 2018 Free Software Foundation, Inc.
3499769a
AM		 330
331Copying and distribution of this file, with or without modification,
332are permitted in any medium without royalty provided the copyright
333notice and this notice are preserved.
334
335Local Variables:
336mode: change-log
337left-margin: 8
338fill-column: 74
339version-control: never
340End:
GDB Binutils - Deliverables
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