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[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
514e58b7
AM
12016-05-19 Alan Modra <amodra@gmail.com>
2
3 * ppc-opc.c (NSISIGNOPT): Use insert_nsi and extract_nsi.
4
e43de63c
AM
52016-05-19 Alan Modra <amodra@gmail.com>
6
7 * ppc-opc.c: Formatting.
8 (NSISIGNOPT): Define.
9 (powerpc_opcodes <subis>): Use NSISIGNOPT.
10
1401d2fe
MR
112016-05-18 Maciej W. Rozycki <macro@imgtec.com>
12
13 * mips-dis.c (is_compressed_mode_p): Add `micromips_p' operand,
14 replacing references to `micromips_ase' throughout.
15 (_print_insn_mips): Don't use file-level microMIPS annotation to
16 determine the disassembly mode with the symbol table.
17
1178da44
PB
182016-05-13 Peter Bergner <bergner@vnet.ibm.com>
19
20 * ppc-opc.c (IMM8): Use PPC_OPERAND_SIGNOPT.
21
8f4f9071
MF
222016-05-11 Andrew Bennett <andrew.bennett@imgtec.com>
23
24 * mips-dis.c (mips_arch_choices): Add ASE_DSPR3 to mips32r6 and
25 mips64r6.
26 * mips-opc.c (D34): New macro.
27 (mips_builtin_opcodes): Define bposge32c for DSPr3.
28
8bc52696
AF
292016-05-10 Alexander Fomin <alexander.fomin@intel.com>
30
31 * i386-dis.c (prefix_table): Add RDPID instruction.
32 * i386-gen.c (cpu_flag_init): Add RDPID flag.
33 (cpu_flags): Add RDPID bitfield.
34 * i386-opc.h (enum): Add RDPID element.
35 (i386_cpu_flags): Add RDPID field.
36 * i386-opc.tbl: Add RDPID instruction.
37 * i386-init.h: Regenerate.
38 * i386-tbl.h: Regenerate.
39
39d911fc
TP
402016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
41
42 * arm-dis.c (get_sym_code_type): Use ARM_GET_SYM_BRANCH_TYPE to get
43 branch type of a symbol.
44 (print_insn): Likewise.
45
16a1fa25
TP
462016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
47
48 * arm-dis.c (coprocessor_opcodes): Add entries for VFP ARMv8-M
49 Mainline Security Extensions instructions.
50 (thumb_opcodes): Add entries for narrow ARMv8-M Security
51 Extensions instructions.
52 (thumb32_opcodes): Add entries for wide ARMv8-M Security Extensions
53 instructions.
54 (psr_name): Add new MSP_NS and PSP_NS ARMv8-M Security Extensions
55 special registers.
56
d751b79e
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572016-05-09 Jose E. Marchesi <jose.marchesi@oracle.com>
58
59 * sparc-opc.c (sparc_opcodes): Fix mnemonic of faligndatai.
60
945e0f82
CZ
612016-05-03 Claudiu Zissulescu <claziss@synopsys.com>
62
63 * arc-ext.c (dump_ARC_extmap): Handle SYNATX_NOP and SYNTAX_1OP.
64 (arcExtMap_genOpcode): Likewise.
65 * arc-opc.c (arg_32bit_rc): Define new variable.
66 (arg_32bit_u6): Likewise.
67 (arg_32bit_limm): Likewise.
68
20f55f38
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692016-05-03 Szabolcs Nagy <szabolcs.nagy@arm.com>
70
71 * aarch64-gen.c (VERIFIER): Define.
72 * aarch64-opc.c (VERIFIER): Define.
73 (verify_ldpsw): Use static linkage.
74 * aarch64-opc.h (verify_ldpsw): Remove.
75 * aarch64-tbl.h: Use VERIFIER for verifiers.
76
4bd13cde
NC
772016-04-28 Nick Clifton <nickc@redhat.com>
78
79 PR target/19722
80 * aarch64-dis.c (aarch64_opcode_decode): Run verifier if present.
81 * aarch64-opc.c (verify_ldpsw): New function.
82 * aarch64-opc.h (verify_ldpsw): New prototype.
83 * aarch64-tbl.h: Add initialiser for verifier field.
84 (LDPSW): Set verifier to verify_ldpsw.
85
c0f92bf9
L
862016-04-23 H.J. Lu <hongjiu.lu@intel.com>
87
88 PR binutils/19983
89 PR binutils/19984
90 * i386-dis.c (print_insn): Return -1 if size of bfd_vma is
91 smaller than address size.
92
e6c7cdec
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932016-04-20 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
94
95 * alpha-dis.c: Regenerate.
96 * crx-dis.c: Likewise.
97 * disassemble.c: Likewise.
98 * epiphany-opc.c: Likewise.
99 * fr30-opc.c: Likewise.
100 * frv-opc.c: Likewise.
101 * ip2k-opc.c: Likewise.
102 * iq2000-opc.c: Likewise.
103 * lm32-opc.c: Likewise.
104 * lm32-opinst.c: Likewise.
105 * m32c-opc.c: Likewise.
106 * m32r-opc.c: Likewise.
107 * m32r-opinst.c: Likewise.
108 * mep-opc.c: Likewise.
109 * mt-opc.c: Likewise.
110 * or1k-opc.c: Likewise.
111 * or1k-opinst.c: Likewise.
112 * tic80-opc.c: Likewise.
113 * xc16x-opc.c: Likewise.
114 * xstormy16-opc.c: Likewise.
115
537aefaf
AB
1162016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
117
118 * arc-nps400-tbl.h: Add addb, subb, adcb, sbcb, andb, xorb, orb,
119 fxorb, wxorb, shlb, shrb, notb, cntbb, div, mod, divm, qcmp,
120 calcsd, and calcxd instructions.
121 * arc-opc.c (insert_nps_bitop_size): Delete.
122 (extract_nps_bitop_size): Delete.
123 (MAKE_SRC_POS_INSERT_EXTRACT_FUNCS): Define, and use.
124 (extract_nps_qcmp_m3): Define.
125 (extract_nps_qcmp_m2): Define.
126 (extract_nps_qcmp_m1): Define.
127 (arc_flag_operands): Add F_NPS_SX, F_NPS_AR, F_NPS_AL.
128 (arc_flag_classes): Add C_NPS_SX, C_NPS_AR_AL
129 (arc_operands): Add NPS_SRC2_POS, NPS_SRC1_POS, NPS_ADDB_SIZE,
130 NPS_ANDB_SIZE, NPS_FXORB_SIZ, NPS_WXORB_SIZ, NPS_R_XLDST,
131 NPS_DIV_UIMM4, NPS_QCMP_SIZE, NPS_QCMP_M1, NPS_QCMP_M2, and
132 NPS_QCMP_M3.
133
c8f785f2
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1342016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
135
136 * arc-nps400-tbl.h: Add dctcp, dcip, dcet, and dcacl instructions.
137
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1382016-04-15 H.J. Lu <hongjiu.lu@intel.com>
139
140 * Makefile.in: Regenerated with automake 1.11.6.
141 * aclocal.m4: Likewise.
142
4b0c052e
AB
1432016-04-14 Andrew Burgess <andrew.burgess@embecosm.com>
144
145 * arc-nps400-tbl.h: Add xldb, xldw, xld, xstb, xstw, and xst
146 instructions.
147 * arc-opc.c (insert_nps_cmem_uimm16): New function.
148 (extract_nps_cmem_uimm16): New function.
149 (arc_operands): Add NPS_XLDST_UIMM16 operand.
150
cb040366
AB
1512016-04-14 Andrew Burgess <andrew.burgess@embecosm.com>
152
153 * arc-dis.c (arc_insn_length): New function.
154 (print_insn_arc): Use arc_insn_length, change insnLen to unsigned.
155 (find_format): Change insnLen parameter to unsigned.
156
accc0180
NC
1572016-04-13 Nick Clifton <nickc@redhat.com>
158
159 PR target/19937
160 * v850-opc.c (v850_opcodes): Correct masks for long versions of
161 the LD.B and LD.BU instructions.
162
f36e33da
CZ
1632016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
164
165 * arc-dis.c (find_format): Check for extension flags.
166 (print_flags): New function.
167 (print_insn_arc): Update for .extCondCode, .extCoreRegister and
168 .extAuxRegister.
169 * arc-ext.c (arcExtMap_coreRegName): Use
170 LAST_EXTENSION_CORE_REGISTER.
171 (arcExtMap_coreReadWrite): Likewise.
172 (dump_ARC_extmap): Update printing.
173 * arc-opc.c (arc_flag_classes): Add F_CLASS_EXTEND flag.
174 (arc_aux_regs): Add cpu field.
175 * arc-regs.h: Add cpu field, lower case name aux registers.
176
1c2e355e
CZ
1772016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
178
179 * arc-tbl.h: Add rtsc, sleep with no arguments.
180
b99747ae
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1812016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
182
183 * arc-opc.c (flags_none, flags_f, flags_cc, flags_ccf):
184 Initialize.
185 (arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
186 (arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
187 (arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
188 (arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
189 (arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
190 (arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
191 (arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
192 (arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
193 (arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
194 (arc_opcode arc_opcodes): Null terminate the array.
195 (arc_num_opcodes): Remove.
196 * arc-ext.h (INSERT_XOP): Define.
197 (extInstruction_t): Likewise.
198 (arcExtMap_instName): Delete.
199 (arcExtMap_insn): New function.
200 (arcExtMap_genOpcode): Likewise.
201 * arc-ext.c (ExtInstruction): Remove.
202 (create_map): Zero initialize instruction fields.
203 (arcExtMap_instName): Remove.
204 (arcExtMap_insn): New function.
205 (dump_ARC_extmap): More info while debuging.
206 (arcExtMap_genOpcode): New function.
207 * arc-dis.c (find_format): New function.
208 (print_insn_arc): Use find_format.
209 (arc_get_disassembler): Enable dump_ARC_extmap only when
210 debugging.
211
92708cec
MR
2122016-04-11 Maciej W. Rozycki <macro@imgtec.com>
213
214 * mips-dis.c (print_mips16_insn_arg): Mask unused extended
215 instruction bits out.
216
a42a4f84
AB
2172016-04-07 Andrew Burgess <andrew.burgess@embecosm.com>
218
219 * arc-nps400-tbl.h: Add schd, sync, and hwschd instructions.
220 * arc-opc.c (arc_flag_operands): Add new flags.
221 (arc_flag_classes): Add new classes.
222
1328504b
AB
2232016-04-07 Andrew Burgess <andrew.burgess@embecosm.com>
224
225 * arc-opc.c (arc_opcodes): Extend comment to discus table layout.
226
820f03ff
AB
2272016-04-05 Andrew Burgess <andrew.burgess@embecosm.com>
228
229 * arc-nps400-tbl.h: Add movbi, decode1, fbset, fbclear, encode0,
230 encode1, rflt, crc16, and crc32 instructions.
231 * arc-opc.c (arc_flag_operands): Add F_NPS_R.
232 (arc_flag_classes): Add C_NPS_R.
233 (insert_nps_bitop_size_2b): New function.
234 (extract_nps_bitop_size_2b): Likewise.
235 (insert_nps_bitop_uimm8): Likewise.
236 (extract_nps_bitop_uimm8): Likewise.
237 (arc_operands): Add new operand entries.
238
8ddf6b2a
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2392016-04-05 Claudiu Zissulescu <claziss@synopsys.com>
240
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241 * arc-regs.h: Add a new subclass field. Add double assist
242 accumulator register values.
243 * arc-tbl.h: Use DPA subclass to mark the double assist
244 instructions. Use DPX/SPX subclas to mark the FPX instructions.
245 * arc-opc.c (RSP): Define instead of SP.
246 (arc_aux_regs): Add the subclass field.
8ddf6b2a 247
589a7d88
JW
2482016-04-05 Jiong Wang <jiong.wang@arm.com>
249
250 * arm-dis.c: Support FP16 vmul, vmla, vmls (by scalar).
251
0a191de9 2522016-03-31 Andrew Burgess <andrew.burgess@embecosm.com>
2cce10e7
AB
253
254 * arc-opc.c (arc_operands): Fix operand flags for NPS_R_DST, and
255 NPS_R_SRC1.
256
0a106562
AB
2572016-03-30 Andrew Burgess <andrew.burgess@embecosm.com>
258
259 * arc-nps400-tbl.h: Add a header comment, and fix some whitespace
260 issues. No functional changes.
261
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2622016-03-30 Claudiu Zissulescu <claziss@synopsys.com>
263
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264 * arc-regs.h (IC_RAM_ADDRESS, IC_TAG, IC_WP, IC_DATA, CONTROL0)
265 (AX2, AY2, MX2, MY2, AY0, AY1, DC_RAM_ADDR, DC_TAG, CONTROL1)
266 (RTT): Remove duplicate.
267 (LCDINSTR, LCDDATA, LCDSTAT, CC_*, PCT_COUNT*, PCT_SNAP*)
268 (PCT_CONFIG*): Remove.
269 (D1L, D1H, D2H, D2L): Define.
bd05ac5f 270
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2712016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
272
b99747ae 273 * arc-ext-tbl.h (dsp_fp_i2flt): Fix typo.
9885948f 274
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2752016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
276
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277 * arc-tbl.h (invld07): Remove.
278 * arc-ext-tbl.h: New file.
279 * arc-dis.c (FIELDA, FIELDB, FIELDC): Remove.
280 * arc-opc.c (arc_opcodes): Add ext-tbl include.
f2dd8838 281
0d2f91fe
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2822016-03-24 Jan Kratochvil <jan.kratochvil@redhat.com>
283
284 Fix -Wstack-usage warnings.
285 * aarch64-dis.c (print_operands): Substitute size.
286 * aarch64-opc.c (print_register_offset_address): Substitute tblen.
287
a6b71f42
JM
2882016-03-22 Jose E. Marchesi <jose.marchesi@oracle.com>
289
290 * sparc-opc.c (sparc_opcodes): Reorder entries for `rd' in order
291 to get a proper diagnostic when an invalid ASR register is used.
292
9780e045
NC
2932016-03-22 Nick Clifton <nickc@redhat.com>
294
295 * configure: Regenerate.
296
e23e8ebe
AB
2972016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
298
299 * arc-nps400-tbl.h: New file.
300 * arc-opc.c: Add top level comment.
301 (insert_nps_3bit_dst): New function.
302 (extract_nps_3bit_dst): New function.
303 (insert_nps_3bit_src2): New function.
304 (extract_nps_3bit_src2): New function.
305 (insert_nps_bitop_size): New function.
306 (extract_nps_bitop_size): New function.
307 (arc_flag_operands): Add nps400 entries.
308 (arc_flag_classes): Add nps400 entries.
309 (arc_operands): Add nps400 entries.
310 (arc_opcodes): Add nps400 include.
311
1ae8ab47
AB
3122016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
313
314 * arc-opc.c (arc_flag_classes): Convert all flag classes to use
315 the new class enum values.
316
8699fc3e
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3172016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
318
319 * arc-dis.c (print_insn_arc): Handle nps400.
320
24740d83
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3212016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
322
323 * arc-opc.c (BASE): Delete.
324
8678914f
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3252016-03-18 Nick Clifton <nickc@redhat.com>
326
327 PR target/19721
328 * aarch64-tbl.h (aarch64_opcode_table): Fix type of second operand
329 of MOV insn that aliases an ORR insn.
330
cc933301
JW
3312016-03-16 Jiong Wang <jiong.wang@arm.com>
332
333 * arm-dis.c (neon_opcodes): Support new FP16 instructions.
334
f86f5863
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3352016-03-07 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
336
337 * mcore-opc.h: Add const qualifiers.
338 * microblaze-opc.h (struct op_code_struct): Likewise.
339 * sh-opc.h: Likewise.
340 * tic4x-dis.c (tic4x_print_indirect): Likewise.
341 (tic4x_print_op): Likewise.
342
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AM
3432016-03-02 Alan Modra <amodra@gmail.com>
344
d11698cd 345 * or1k-desc.h: Regenerate.
62de1c63 346 * fr30-ibld.c: Regenerate.
c697cf0b 347 * rl78-decode.c: Regenerate.
62de1c63 348
020efce5
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3492016-03-01 Nick Clifton <nickc@redhat.com>
350
351 PR target/19747
352 * rl78-dis.c (print_insn_rl78_common): Fix typo.
353
b0c11777
RL
3542016-02-24 Renlin Li <renlin.li@arm.com>
355
356 * arm-dis.c (coprocessor_opcodes): Add fp16 instruction entries.
357 (print_insn_coprocessor): Support fp16 instructions.
358
3e309328
RL
3592016-02-24 Renlin Li <renlin.li@arm.com>
360
361 * arm-dis.c (print_insn_coprocessor): Fix mask for vsel, vmaxnm,
362 vminnm, vrint(mpna).
363
8afc7bea
RL
3642016-02-24 Renlin Li <renlin.li@arm.com>
365
366 * arm-dis.c (print_insn_coprocessor): Check co-processor number for
367 cpd/cpd2, mcr/mcr2, mrc/mrc2, ldc/ldc2, stc/stc2.
368
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L
3692016-02-15 H.J. Lu <hongjiu.lu@intel.com>
370
371 * i386-dis.c (print_insn): Parenthesize expression to prevent
372 truncated addresses.
373 (OP_J): Likewise.
374
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3752016-02-10 Claudiu Zissulescu <claziss@synopsys.com>
376 Janek van Oirschot <jvanoirs@synopsys.com>
377
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378 * arc-opc.c (arc_relax_opcodes, arc_num_relax_opcodes): New
379 variable.
4670103e 380
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3812016-02-04 Nick Clifton <nickc@redhat.com>
382
383 PR target/19561
384 * msp430-dis.c (print_insn_msp430): Add a special case for
385 decoding an RRC instruction with the ZC bit set in the extension
386 word.
387
a143b004
AB
3882016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
389
390 * cgen-ibld.in (insert_normal): Rework calculation of shift.
391 * epiphany-ibld.c: Regenerate.
392 * fr30-ibld.c: Regenerate.
393 * frv-ibld.c: Regenerate.
394 * ip2k-ibld.c: Regenerate.
395 * iq2000-ibld.c: Regenerate.
396 * lm32-ibld.c: Regenerate.
397 * m32c-ibld.c: Regenerate.
398 * m32r-ibld.c: Regenerate.
399 * mep-ibld.c: Regenerate.
400 * mt-ibld.c: Regenerate.
401 * or1k-ibld.c: Regenerate.
402 * xc16x-ibld.c: Regenerate.
403 * xstormy16-ibld.c: Regenerate.
404
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4052016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
406
407 * epiphany-dis.c: Regenerated from latest cpu files.
408
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MM
4092016-02-01 Michael McConville <mmcco@mykolab.com>
410
411 * cgen-dis.c (count_decodable_bits): Use unsigned value for mask
412 test bit.
413
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RL
4142016-01-25 Renlin Li <renlin.li@arm.com>
415
416 * arm-dis.c (mapping_symbol_for_insn): New function.
417 (find_ifthen_state): Call mapping_symbol_for_insn().
418
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4192016-01-20 Matthew Wahab <matthew.wahab@arm.com>
420
421 * aarch64-opc.c (operand_general_constraint_met_p): Check validity
422 of MSR UAO immediate operand.
423
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4242016-01-18 Maciej W. Rozycki <macro@imgtec.com>
425
426 * mips-dis.c (print_insn_micromips): Remove 48-bit microMIPS
427 instruction support.
428
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4292016-01-17 Alan Modra <amodra@gmail.com>
430
431 * configure: Regenerate.
432
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4332016-01-14 Nick Clifton <nickc@redhat.com>
434
435 * rl78-decode.opc (rl78_decode_opcode): Add 's' operand to movw
436 instructions that can support stack pointer operations.
437 * rl78-decode.c: Regenerate.
438 * rl78-dis.c: Fix display of stack pointer in MOVW based
439 instructions.
440
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MW
4412016-01-14 Matthew Wahab <matthew.wahab@arm.com>
442
443 * aarch64-opc.c (aarch64_sys_reg_supported_p): Merge conditionals
444 testing for RAS support. Add checks for erxfr_el1, erxctlr_el1,
445 erxtatus_el1 and erxaddr_el1.
446
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4472016-01-12 Matthew Wahab <matthew.wahab@arm.com>
448
449 * arm-dis.c (arm_opcodes): Add "esb".
450 (thumb_opcodes): Likewise.
451
afa8d405
PB
4522016-01-11 Peter Bergner <bergner@vnet.ibm.com>
453
454 * ppc-opc.c <xscmpnedp>: Delete.
455 <xvcmpnedp>: Likewise.
456 <xvcmpnedp.>: Likewise.
457 <xvcmpnesp>: Likewise.
458 <xvcmpnesp.>: Likewise.
459
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AS
4602016-01-08 Andreas Schwab <schwab@linux-m68k.org>
461
462 PR gas/13050
463 * m68k-opc.c (moveb, movew): For ISA_B/C only allow #,d(An) in
464 addition to ISA_A.
465
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4662016-01-01 Alan Modra <amodra@gmail.com>
467
468 Update year range in copyright notice of all files.
469
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470For older changes see ChangeLog-2015
471\f
472Copyright (C) 2016 Free Software Foundation, Inc.
473
474Copying and distribution of this file, with or without modification,
475are permitted in any medium without royalty provided the copyright
476notice and this notice are preserved.
477
478Local Variables:
479mode: change-log
480left-margin: 8
481fill-column: 74
482version-control: never
483End:
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