[deliverable/binutils-gdb.git] / opcodes / ChangeLog

2016-05-18  Maciej W. Rozycki  <macro@imgtec.com>

	* mips-dis.c (is_compressed_mode_p): Add `micromips_p' operand,
	replacing references to `micromips_ase' throughout.
	(_print_insn_mips): Don't use file-level microMIPS annotation to
	determine the disassembly mode with the symbol table.

2016-05-13  Peter Bergner <bergner@vnet.ibm.com>

	* ppc-opc.c (IMM8): Use PPC_OPERAND_SIGNOPT.

2016-05-11  Andrew Bennett  <andrew.bennett@imgtec.com>

	* mips-dis.c (mips_arch_choices): Add ASE_DSPR3 to mips32r6 and
	mips64r6.
	* mips-opc.c (D34): New macro.
	(mips_builtin_opcodes): Define bposge32c for DSPr3.

2016-05-10  Alexander Fomin  <alexander.fomin@intel.com>

	* i386-dis.c (prefix_table): Add RDPID instruction.
	* i386-gen.c (cpu_flag_init): Add RDPID flag.
	(cpu_flags): Add RDPID bitfield.
	* i386-opc.h (enum): Add RDPID element.
	(i386_cpu_flags): Add RDPID field.
	* i386-opc.tbl: Add RDPID instruction.
	* i386-init.h: Regenerate.
	* i386-tbl.h: Regenerate.

2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>

	* arm-dis.c (get_sym_code_type): Use ARM_GET_SYM_BRANCH_TYPE to get
	branch type of a symbol.
	(print_insn): Likewise.

2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>

	* arm-dis.c (coprocessor_opcodes): Add entries for VFP ARMv8-M
	Mainline Security Extensions instructions.
	(thumb_opcodes): Add entries for narrow ARMv8-M Security
	Extensions instructions.
	(thumb32_opcodes): Add entries for wide ARMv8-M Security Extensions
	instructions.
	(psr_name): Add new MSP_NS and PSP_NS ARMv8-M Security Extensions
	special registers.

2016-05-09  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* sparc-opc.c (sparc_opcodes): Fix mnemonic of faligndatai.

2016-05-03  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-ext.c (dump_ARC_extmap): Handle SYNATX_NOP and SYNTAX_1OP.
	(arcExtMap_genOpcode): Likewise.
	* arc-opc.c (arg_32bit_rc): Define new variable.
	(arg_32bit_u6): Likewise.
	(arg_32bit_limm): Likewise.

2016-05-03  Szabolcs Nagy  <szabolcs.nagy@arm.com>

	* aarch64-gen.c (VERIFIER): Define.
	* aarch64-opc.c (VERIFIER): Define.
	(verify_ldpsw): Use static linkage.
	* aarch64-opc.h (verify_ldpsw): Remove.
	* aarch64-tbl.h: Use VERIFIER for verifiers.

2016-04-28  Nick Clifton  <nickc@redhat.com>

	PR target/19722
	* aarch64-dis.c (aarch64_opcode_decode): Run verifier if present.
	* aarch64-opc.c (verify_ldpsw): New function.
	* aarch64-opc.h (verify_ldpsw): New prototype.
	* aarch64-tbl.h: Add initialiser for verifier field.
	(LDPSW): Set verifier to verify_ldpsw.

2016-04-23  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/19983
	PR binutils/19984
	* i386-dis.c (print_insn): Return -1 if size of bfd_vma is
	smaller than address size.

2016-04-20  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>

	* alpha-dis.c: Regenerate.
	* crx-dis.c: Likewise.
	* disassemble.c: Likewise.
	* epiphany-opc.c: Likewise.
	* fr30-opc.c: Likewise.
	* frv-opc.c: Likewise.
	* ip2k-opc.c: Likewise.
	* iq2000-opc.c: Likewise.
	* lm32-opc.c: Likewise.
	* lm32-opinst.c: Likewise.
	* m32c-opc.c: Likewise.
	* m32r-opc.c: Likewise.
	* m32r-opinst.c: Likewise.
	* mep-opc.c: Likewise.
	* mt-opc.c: Likewise.
	* or1k-opc.c: Likewise.
	* or1k-opinst.c: Likewise.
	* tic80-opc.c: Likewise.
	* xc16x-opc.c: Likewise.
	* xstormy16-opc.c: Likewise.

2016-04-19  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add addb, subb, adcb, sbcb, andb, xorb, orb,
	fxorb, wxorb, shlb, shrb, notb, cntbb, div, mod, divm, qcmp,
	calcsd, and calcxd instructions.
	* arc-opc.c (insert_nps_bitop_size): Delete.
	(extract_nps_bitop_size): Delete.
	(MAKE_SRC_POS_INSERT_EXTRACT_FUNCS): Define, and use.
	(extract_nps_qcmp_m3): Define.
	(extract_nps_qcmp_m2): Define.
	(extract_nps_qcmp_m1): Define.
	(arc_flag_operands): Add F_NPS_SX, F_NPS_AR, F_NPS_AL.
	(arc_flag_classes): Add C_NPS_SX, C_NPS_AR_AL
	(arc_operands): Add NPS_SRC2_POS, NPS_SRC1_POS, NPS_ADDB_SIZE,
	NPS_ANDB_SIZE, NPS_FXORB_SIZ, NPS_WXORB_SIZ, NPS_R_XLDST,
	NPS_DIV_UIMM4, NPS_QCMP_SIZE, NPS_QCMP_M1, NPS_QCMP_M2, and
	NPS_QCMP_M3.

2016-04-19  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add dctcp, dcip, dcet, and dcacl instructions.

2016-04-15  H.J. Lu  <hongjiu.lu@intel.com>

	* Makefile.in: Regenerated with automake 1.11.6.
	* aclocal.m4: Likewise.

2016-04-14  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add xldb, xldw, xld, xstb, xstw, and xst
	instructions.
	* arc-opc.c (insert_nps_cmem_uimm16): New function.
	(extract_nps_cmem_uimm16): New function.
	(arc_operands): Add NPS_XLDST_UIMM16 operand.

2016-04-14  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-dis.c (arc_insn_length): New function.
	(print_insn_arc): Use arc_insn_length, change insnLen to unsigned.
	(find_format): Change insnLen parameter to unsigned.

2016-04-13  Nick Clifton  <nickc@redhat.com>

	PR target/19937
	* v850-opc.c (v850_opcodes): Correct masks for long versions of
	the LD.B and LD.BU instructions.

2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-dis.c (find_format): Check for extension flags.
	(print_flags): New function.
	(print_insn_arc): Update for .extCondCode, .extCoreRegister and
	.extAuxRegister.
	* arc-ext.c (arcExtMap_coreRegName): Use
	LAST_EXTENSION_CORE_REGISTER.
	(arcExtMap_coreReadWrite): Likewise.
	(dump_ARC_extmap): Update printing.
	* arc-opc.c (arc_flag_classes): Add F_CLASS_EXTEND flag.
	(arc_aux_regs): Add cpu field.
	* arc-regs.h: Add cpu field, lower case name aux registers.

2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-tbl.h: Add rtsc, sleep with no arguments.

2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-opc.c (flags_none, flags_f, flags_cc, flags_ccf):
	Initialize.
	(arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
	(arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
	(arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
	(arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
	(arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
	(arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
	(arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
	(arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
	(arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
	(arc_opcode arc_opcodes): Null terminate the array.
	(arc_num_opcodes): Remove.
	* arc-ext.h (INSERT_XOP): Define.
	(extInstruction_t): Likewise.
	(arcExtMap_instName): Delete.
	(arcExtMap_insn): New function.
	(arcExtMap_genOpcode): Likewise.
	* arc-ext.c (ExtInstruction): Remove.
	(create_map): Zero initialize instruction fields.
	(arcExtMap_instName): Remove.
	(arcExtMap_insn): New function.
	(dump_ARC_extmap): More info while debuging.
	(arcExtMap_genOpcode): New function.
	* arc-dis.c (find_format): New function.
	(print_insn_arc): Use find_format.
	(arc_get_disassembler): Enable dump_ARC_extmap only when
	debugging.

2016-04-11  Maciej W. Rozycki  <macro@imgtec.com>

	* mips-dis.c (print_mips16_insn_arg): Mask unused extended
	instruction bits out.

2016-04-07  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add schd, sync, and hwschd instructions.
	* arc-opc.c (arc_flag_operands): Add new flags.
	(arc_flag_classes): Add new classes.

2016-04-07  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-opc.c (arc_opcodes): Extend comment to discus table layout.

2016-04-05  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add movbi, decode1, fbset, fbclear, encode0,
	encode1, rflt, crc16, and crc32 instructions.
	* arc-opc.c (arc_flag_operands): Add F_NPS_R.
	(arc_flag_classes): Add C_NPS_R.
	(insert_nps_bitop_size_2b): New function.
	(extract_nps_bitop_size_2b): Likewise.
	(insert_nps_bitop_uimm8): Likewise.
	(extract_nps_bitop_uimm8): Likewise.
	(arc_operands): Add new operand entries.

2016-04-05  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-regs.h: Add a new subclass field.  Add double assist
	accumulator register values.
	* arc-tbl.h: Use DPA subclass to mark the double assist
	instructions.  Use DPX/SPX subclas to mark the FPX instructions.
	* arc-opc.c (RSP): Define instead of SP.
	(arc_aux_regs): Add the subclass field.

2016-04-05  Jiong Wang  <jiong.wang@arm.com>

	* arm-dis.c: Support FP16 vmul, vmla, vmls (by scalar).

2016-03-31  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-opc.c (arc_operands): Fix operand flags for NPS_R_DST, and
	NPS_R_SRC1.

2016-03-30  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add a header comment, and fix some whitespace
	issues.  No functional changes.

2016-03-30  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-regs.h (IC_RAM_ADDRESS, IC_TAG, IC_WP, IC_DATA, CONTROL0)
	(AX2, AY2, MX2, MY2, AY0, AY1, DC_RAM_ADDR, DC_TAG, CONTROL1)
	(RTT): Remove duplicate.
	(LCDINSTR, LCDDATA, LCDSTAT, CC_*, PCT_COUNT*, PCT_SNAP*)
	(PCT_CONFIG*): Remove.
	(D1L, D1H, D2H, D2L): Define.

2016-03-29  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-ext-tbl.h (dsp_fp_i2flt): Fix typo.

2016-03-29  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-tbl.h (invld07): Remove.
	* arc-ext-tbl.h: New file.
	* arc-dis.c (FIELDA, FIELDB, FIELDC): Remove.
	* arc-opc.c (arc_opcodes): Add ext-tbl include.

2016-03-24  Jan Kratochvil  <jan.kratochvil@redhat.com>

	Fix -Wstack-usage warnings.
	* aarch64-dis.c (print_operands): Substitute size.
	* aarch64-opc.c (print_register_offset_address): Substitute tblen.

2016-03-22  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* sparc-opc.c (sparc_opcodes): Reorder entries for `rd' in order
	to get a proper diagnostic when an invalid ASR register is used.

2016-03-22  Nick Clifton  <nickc@redhat.com>

	* configure: Regenerate.

2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: New file.
	* arc-opc.c: Add top level comment.
	(insert_nps_3bit_dst): New function.
	(extract_nps_3bit_dst): New function.
	(insert_nps_3bit_src2): New function.
	(extract_nps_3bit_src2): New function.
	(insert_nps_bitop_size): New function.
	(extract_nps_bitop_size): New function.
	(arc_flag_operands): Add nps400 entries.
	(arc_flag_classes): Add nps400 entries.
	(arc_operands): Add nps400 entries.
	(arc_opcodes): Add nps400 include.

2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-opc.c (arc_flag_classes): Convert all flag classes to use
	the new class enum values.

2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-dis.c (print_insn_arc): Handle nps400.

2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-opc.c (BASE): Delete.

2016-03-18  Nick Clifton  <nickc@redhat.com>

	PR target/19721
	* aarch64-tbl.h (aarch64_opcode_table): Fix type of second operand
	of MOV insn that aliases an ORR insn.

2016-03-16  Jiong Wang  <jiong.wang@arm.com>

	* arm-dis.c (neon_opcodes): Support new FP16 instructions.

2016-03-07  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>

	* mcore-opc.h: Add const qualifiers.
	* microblaze-opc.h (struct op_code_struct): Likewise.
	* sh-opc.h: Likewise.
	* tic4x-dis.c (tic4x_print_indirect): Likewise.
	(tic4x_print_op): Likewise.

2016-03-02  Alan Modra  <amodra@gmail.com>

	* or1k-desc.h: Regenerate.
	* fr30-ibld.c: Regenerate.
	* rl78-decode.c: Regenerate.

2016-03-01  Nick Clifton  <nickc@redhat.com>

	PR target/19747
	* rl78-dis.c (print_insn_rl78_common): Fix typo.

2016-02-24  Renlin Li  <renlin.li@arm.com>

	* arm-dis.c (coprocessor_opcodes): Add fp16 instruction entries.
	(print_insn_coprocessor): Support fp16 instructions.

2016-02-24  Renlin Li  <renlin.li@arm.com>

	* arm-dis.c (print_insn_coprocessor): Fix mask for vsel, vmaxnm,
	vminnm, vrint(mpna).

2016-02-24  Renlin Li  <renlin.li@arm.com>

	* arm-dis.c (print_insn_coprocessor): Check co-processor number for
	cpd/cpd2, mcr/mcr2, mrc/mrc2, ldc/ldc2, stc/stc2.

2016-02-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (print_insn): Parenthesize expression to prevent
	truncated addresses.
	(OP_J): Likewise.

2016-02-10  Claudiu Zissulescu  <claziss@synopsys.com>
	    Janek van Oirschot  <jvanoirs@synopsys.com>

	* arc-opc.c (arc_relax_opcodes, arc_num_relax_opcodes): New
	variable.

2016-02-04  Nick Clifton  <nickc@redhat.com>

	PR target/19561
	* msp430-dis.c (print_insn_msp430): Add a special case for
	decoding an RRC instruction with the ZC bit set in the extension
	word.

2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>

	* cgen-ibld.in (insert_normal): Rework calculation of shift.
	* epiphany-ibld.c: Regenerate.
	* fr30-ibld.c: Regenerate.
	* frv-ibld.c: Regenerate.
	* ip2k-ibld.c: Regenerate.
	* iq2000-ibld.c: Regenerate.
	* lm32-ibld.c: Regenerate.
	* m32c-ibld.c: Regenerate.
	* m32r-ibld.c: Regenerate.
	* mep-ibld.c: Regenerate.
	* mt-ibld.c: Regenerate.
	* or1k-ibld.c: Regenerate.
	* xc16x-ibld.c: Regenerate.
	* xstormy16-ibld.c: Regenerate.

2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>

	* epiphany-dis.c: Regenerated from latest cpu files.

2016-02-01  Michael McConville  <mmcco@mykolab.com>

	* cgen-dis.c (count_decodable_bits): Use unsigned value for mask
	test bit.

2016-01-25  Renlin Li  <renlin.li@arm.com>

	* arm-dis.c (mapping_symbol_for_insn): New function.
	(find_ifthen_state): Call mapping_symbol_for_insn().

2016-01-20  Matthew Wahab  <matthew.wahab@arm.com>

	* aarch64-opc.c (operand_general_constraint_met_p): Check validity
	of MSR UAO immediate operand.

2016-01-18  Maciej W. Rozycki  <macro@imgtec.com>

	* mips-dis.c (print_insn_micromips): Remove 48-bit microMIPS
	instruction support.

2016-01-17  Alan Modra  <amodra@gmail.com>

	* configure: Regenerate.

2016-01-14  Nick Clifton  <nickc@redhat.com>

	* rl78-decode.opc (rl78_decode_opcode): Add 's' operand to movw
	instructions that can support stack pointer operations.
	* rl78-decode.c: Regenerate.
	* rl78-dis.c: Fix display of stack pointer in MOVW based
	instructions.

2016-01-14  Matthew Wahab  <matthew.wahab@arm.com>

	* aarch64-opc.c (aarch64_sys_reg_supported_p): Merge conditionals
	testing for RAS support.  Add checks for erxfr_el1, erxctlr_el1,
	erxtatus_el1 and erxaddr_el1.

2016-01-12  Matthew Wahab  <matthew.wahab@arm.com>

	* arm-dis.c (arm_opcodes): Add "esb".
	(thumb_opcodes): Likewise.

2016-01-11  Peter Bergner <bergner@vnet.ibm.com>

	* ppc-opc.c <xscmpnedp>: Delete.
	<xvcmpnedp>: Likewise.
	<xvcmpnedp.>: Likewise.
	<xvcmpnesp>: Likewise.
	<xvcmpnesp.>: Likewise.

2016-01-08  Andreas Schwab  <schwab@linux-m68k.org>

	PR gas/13050
	* m68k-opc.c (moveb, movew): For ISA_B/C only allow #,d(An) in
	addition to ISA_A.

2016-01-01  Alan Modra  <amodra@gmail.com>

	Update year range in copyright notice of all files.

For older changes see ChangeLog-2015
\f
Copyright (C) 2016 Free Software Foundation, Inc.

Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved.

Local Variables:
mode: change-log
left-margin: 8
fill-column: 74
version-control: never
End:
Commit	Line	Data
1401d2fe MR	1	2016-05-18 Maciej W. Rozycki <macro@imgtec.com>
	2
	3	* mips-dis.c (is_compressed_mode_p): Add `micromips_p' operand,
	4	replacing references to `micromips_ase' throughout.
	5	(_print_insn_mips): Don't use file-level microMIPS annotation to
	6	determine the disassembly mode with the symbol table.
	7
1178da44 PB	8	2016-05-13 Peter Bergner <bergner@vnet.ibm.com>
	9
	10	* ppc-opc.c (IMM8): Use PPC_OPERAND_SIGNOPT.
	11
8f4f9071 MF	12	2016-05-11 Andrew Bennett <andrew.bennett@imgtec.com>
	13
	14	* mips-dis.c (mips_arch_choices): Add ASE_DSPR3 to mips32r6 and
	15	mips64r6.
	16	* mips-opc.c (D34): New macro.
	17	(mips_builtin_opcodes): Define bposge32c for DSPr3.
	18
8bc52696 AF	19	2016-05-10 Alexander Fomin <alexander.fomin@intel.com>
	20
	21	* i386-dis.c (prefix_table): Add RDPID instruction.
	22	* i386-gen.c (cpu_flag_init): Add RDPID flag.
	23	(cpu_flags): Add RDPID bitfield.
	24	* i386-opc.h (enum): Add RDPID element.
	25	(i386_cpu_flags): Add RDPID field.
	26	* i386-opc.tbl: Add RDPID instruction.
	27	* i386-init.h: Regenerate.
	28	* i386-tbl.h: Regenerate.
	29
39d911fc TP	30	2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
	31
	32	* arm-dis.c (get_sym_code_type): Use ARM_GET_SYM_BRANCH_TYPE to get
	33	branch type of a symbol.
	34	(print_insn): Likewise.
	35
16a1fa25 TP	36	2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
	37
	38	* arm-dis.c (coprocessor_opcodes): Add entries for VFP ARMv8-M
	39	Mainline Security Extensions instructions.
	40	(thumb_opcodes): Add entries for narrow ARMv8-M Security
	41	Extensions instructions.
	42	(thumb32_opcodes): Add entries for wide ARMv8-M Security Extensions
	43	instructions.
	44	(psr_name): Add new MSP_NS and PSP_NS ARMv8-M Security Extensions
	45	special registers.
	46
d751b79e JM	47	2016-05-09 Jose E. Marchesi <jose.marchesi@oracle.com>
	48
	49	* sparc-opc.c (sparc_opcodes): Fix mnemonic of faligndatai.
	50
945e0f82 CZ	51	2016-05-03 Claudiu Zissulescu <claziss@synopsys.com>
	52
	53	* arc-ext.c (dump_ARC_extmap): Handle SYNATX_NOP and SYNTAX_1OP.
	54	(arcExtMap_genOpcode): Likewise.
	55	* arc-opc.c (arg_32bit_rc): Define new variable.
	56	(arg_32bit_u6): Likewise.
	57	(arg_32bit_limm): Likewise.
	58
20f55f38 SN	59	2016-05-03 Szabolcs Nagy <szabolcs.nagy@arm.com>
	60
	61	* aarch64-gen.c (VERIFIER): Define.
	62	* aarch64-opc.c (VERIFIER): Define.
	63	(verify_ldpsw): Use static linkage.
	64	* aarch64-opc.h (verify_ldpsw): Remove.
	65	* aarch64-tbl.h: Use VERIFIER for verifiers.
	66
4bd13cde NC	67	2016-04-28 Nick Clifton <nickc@redhat.com>
	68
	69	PR target/19722
	70	* aarch64-dis.c (aarch64_opcode_decode): Run verifier if present.
	71	* aarch64-opc.c (verify_ldpsw): New function.
	72	* aarch64-opc.h (verify_ldpsw): New prototype.
	73	* aarch64-tbl.h: Add initialiser for verifier field.
	74	(LDPSW): Set verifier to verify_ldpsw.
	75
c0f92bf9 L	76	2016-04-23 H.J. Lu <hongjiu.lu@intel.com>
	77
	78	PR binutils/19983
	79	PR binutils/19984
	80	* i386-dis.c (print_insn): Return -1 if size of bfd_vma is
	81	smaller than address size.
	82
e6c7cdec TS	83	2016-04-20 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
	84
	85	* alpha-dis.c: Regenerate.
	86	* crx-dis.c: Likewise.
	87	* disassemble.c: Likewise.
	88	* epiphany-opc.c: Likewise.
	89	* fr30-opc.c: Likewise.
	90	* frv-opc.c: Likewise.
	91	* ip2k-opc.c: Likewise.
	92	* iq2000-opc.c: Likewise.
	93	* lm32-opc.c: Likewise.
	94	* lm32-opinst.c: Likewise.
	95	* m32c-opc.c: Likewise.
	96	* m32r-opc.c: Likewise.
	97	* m32r-opinst.c: Likewise.
	98	* mep-opc.c: Likewise.
	99	* mt-opc.c: Likewise.
	100	* or1k-opc.c: Likewise.
	101	* or1k-opinst.c: Likewise.
	102	* tic80-opc.c: Likewise.
	103	* xc16x-opc.c: Likewise.
	104	* xstormy16-opc.c: Likewise.
	105
537aefaf AB	106	2016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
	107
	108	* arc-nps400-tbl.h: Add addb, subb, adcb, sbcb, andb, xorb, orb,
	109	fxorb, wxorb, shlb, shrb, notb, cntbb, div, mod, divm, qcmp,
	110	calcsd, and calcxd instructions.
	111	* arc-opc.c (insert_nps_bitop_size): Delete.
	112	(extract_nps_bitop_size): Delete.
	113	(MAKE_SRC_POS_INSERT_EXTRACT_FUNCS): Define, and use.
	114	(extract_nps_qcmp_m3): Define.
	115	(extract_nps_qcmp_m2): Define.
	116	(extract_nps_qcmp_m1): Define.
	117	(arc_flag_operands): Add F_NPS_SX, F_NPS_AR, F_NPS_AL.
	118	(arc_flag_classes): Add C_NPS_SX, C_NPS_AR_AL
	119	(arc_operands): Add NPS_SRC2_POS, NPS_SRC1_POS, NPS_ADDB_SIZE,
	120	NPS_ANDB_SIZE, NPS_FXORB_SIZ, NPS_WXORB_SIZ, NPS_R_XLDST,
	121	NPS_DIV_UIMM4, NPS_QCMP_SIZE, NPS_QCMP_M1, NPS_QCMP_M2, and
	122	NPS_QCMP_M3.
	123
c8f785f2 AB	124	2016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
	125
	126	* arc-nps400-tbl.h: Add dctcp, dcip, dcet, and dcacl instructions.
	127
6fd8e7c2 L	128	2016-04-15 H.J. Lu <hongjiu.lu@intel.com>
	129
	130	* Makefile.in: Regenerated with automake 1.11.6.
	131	* aclocal.m4: Likewise.
	132
4b0c052e AB	133	2016-04-14 Andrew Burgess <andrew.burgess@embecosm.com>
	134
	135	* arc-nps400-tbl.h: Add xldb, xldw, xld, xstb, xstw, and xst
	136	instructions.
	137	* arc-opc.c (insert_nps_cmem_uimm16): New function.
	138	(extract_nps_cmem_uimm16): New function.
	139	(arc_operands): Add NPS_XLDST_UIMM16 operand.
	140
cb040366 AB	141	2016-04-14 Andrew Burgess <andrew.burgess@embecosm.com>
	142
	143	* arc-dis.c (arc_insn_length): New function.
	144	(print_insn_arc): Use arc_insn_length, change insnLen to unsigned.
	145	(find_format): Change insnLen parameter to unsigned.
	146
accc0180 NC	147	2016-04-13 Nick Clifton <nickc@redhat.com>
	148
	149	PR target/19937
	150	* v850-opc.c (v850_opcodes): Correct masks for long versions of
	151	the LD.B and LD.BU instructions.
	152
f36e33da CZ	153	2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
	154
	155	* arc-dis.c (find_format): Check for extension flags.
	156	(print_flags): New function.
	157	(print_insn_arc): Update for .extCondCode, .extCoreRegister and
	158	.extAuxRegister.
	159	* arc-ext.c (arcExtMap_coreRegName): Use
	160	LAST_EXTENSION_CORE_REGISTER.
	161	(arcExtMap_coreReadWrite): Likewise.
	162	(dump_ARC_extmap): Update printing.
	163	* arc-opc.c (arc_flag_classes): Add F_CLASS_EXTEND flag.
	164	(arc_aux_regs): Add cpu field.
	165	* arc-regs.h: Add cpu field, lower case name aux registers.
	166
1c2e355e CZ	167	2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
	168
	169	* arc-tbl.h: Add rtsc, sleep with no arguments.
	170
b99747ae CZ	171	2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
	172
	173	* arc-opc.c (flags_none, flags_f, flags_cc, flags_ccf):
	174	Initialize.
	175	(arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
	176	(arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
	177	(arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
	178	(arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
	179	(arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
	180	(arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
	181	(arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
	182	(arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
	183	(arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
	184	(arc_opcode arc_opcodes): Null terminate the array.
	185	(arc_num_opcodes): Remove.
	186	* arc-ext.h (INSERT_XOP): Define.
	187	(extInstruction_t): Likewise.
	188	(arcExtMap_instName): Delete.
	189	(arcExtMap_insn): New function.
	190	(arcExtMap_genOpcode): Likewise.
	191	* arc-ext.c (ExtInstruction): Remove.
	192	(create_map): Zero initialize instruction fields.
	193	(arcExtMap_instName): Remove.
	194	(arcExtMap_insn): New function.
	195	(dump_ARC_extmap): More info while debuging.
	196	(arcExtMap_genOpcode): New function.
	197	* arc-dis.c (find_format): New function.
	198	(print_insn_arc): Use find_format.
	199	(arc_get_disassembler): Enable dump_ARC_extmap only when
	200	debugging.
	201
92708cec MR	202	2016-04-11 Maciej W. Rozycki <macro@imgtec.com>
	203
	204	* mips-dis.c (print_mips16_insn_arg): Mask unused extended
	205	instruction bits out.
	206
a42a4f84 AB	207	2016-04-07 Andrew Burgess <andrew.burgess@embecosm.com>
	208
	209	* arc-nps400-tbl.h: Add schd, sync, and hwschd instructions.
	210	* arc-opc.c (arc_flag_operands): Add new flags.
	211	(arc_flag_classes): Add new classes.
	212
1328504b AB	213	2016-04-07 Andrew Burgess <andrew.burgess@embecosm.com>
	214
	215	* arc-opc.c (arc_opcodes): Extend comment to discus table layout.
	216
820f03ff AB	217	2016-04-05 Andrew Burgess <andrew.burgess@embecosm.com>
	218
	219	* arc-nps400-tbl.h: Add movbi, decode1, fbset, fbclear, encode0,
	220	encode1, rflt, crc16, and crc32 instructions.
	221	* arc-opc.c (arc_flag_operands): Add F_NPS_R.
	222	(arc_flag_classes): Add C_NPS_R.
	223	(insert_nps_bitop_size_2b): New function.
	224	(extract_nps_bitop_size_2b): Likewise.
	225	(insert_nps_bitop_uimm8): Likewise.
	226	(extract_nps_bitop_uimm8): Likewise.
	227	(arc_operands): Add new operand entries.
	228
8ddf6b2a CZ	229	2016-04-05 Claudiu Zissulescu <claziss@synopsys.com>
8ddf6b2a CZ	230
b99747ae CZ	231	* arc-regs.h: Add a new subclass field. Add double assist
	232	accumulator register values.
	233	* arc-tbl.h: Use DPA subclass to mark the double assist
	234	instructions. Use DPX/SPX subclas to mark the FPX instructions.
	235	* arc-opc.c (RSP): Define instead of SP.
	236	(arc_aux_regs): Add the subclass field.
8ddf6b2a	237
589a7d88 JW	238	2016-04-05 Jiong Wang <jiong.wang@arm.com>
	239
	240	* arm-dis.c: Support FP16 vmul, vmla, vmls (by scalar).
	241
0a191de9	242	2016-03-31 Andrew Burgess <andrew.burgess@embecosm.com>
2cce10e7 AB	243
	244	* arc-opc.c (arc_operands): Fix operand flags for NPS_R_DST, and
	245	NPS_R_SRC1.
	246
0a106562 AB	247	2016-03-30 Andrew Burgess <andrew.burgess@embecosm.com>
	248
	249	* arc-nps400-tbl.h: Add a header comment, and fix some whitespace
	250	issues. No functional changes.
	251
bd05ac5f CZ	252	2016-03-30 Claudiu Zissulescu <claziss@synopsys.com>
bd05ac5f CZ	253
b99747ae CZ	254	* arc-regs.h (IC_RAM_ADDRESS, IC_TAG, IC_WP, IC_DATA, CONTROL0)
	255	(AX2, AY2, MX2, MY2, AY0, AY1, DC_RAM_ADDR, DC_TAG, CONTROL1)
	256	(RTT): Remove duplicate.
	257	(LCDINSTR, LCDDATA, LCDSTAT, CC_, PCT_COUNT, PCT_SNAP*)
	258	(PCT_CONFIG*): Remove.
	259	(D1L, D1H, D2H, D2L): Define.
bd05ac5f	260
9885948f CZ	261	2016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
9885948f CZ	262
b99747ae	263	* arc-ext-tbl.h (dsp_fp_i2flt): Fix typo.
9885948f	264
f2dd8838 CZ	265	2016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
f2dd8838 CZ	266
b99747ae CZ	267	* arc-tbl.h (invld07): Remove.
	268	* arc-ext-tbl.h: New file.
	269	* arc-dis.c (FIELDA, FIELDB, FIELDC): Remove.
	270	* arc-opc.c (arc_opcodes): Add ext-tbl include.
f2dd8838	271
0d2f91fe JK	272	2016-03-24 Jan Kratochvil <jan.kratochvil@redhat.com>
	273
	274	Fix -Wstack-usage warnings.
	275	* aarch64-dis.c (print_operands): Substitute size.
	276	* aarch64-opc.c (print_register_offset_address): Substitute tblen.
	277
a6b71f42 JM	278	2016-03-22 Jose E. Marchesi <jose.marchesi@oracle.com>
	279
	280	* sparc-opc.c (sparc_opcodes): Reorder entries for `rd' in order
	281	to get a proper diagnostic when an invalid ASR register is used.
	282
9780e045 NC	283	2016-03-22 Nick Clifton <nickc@redhat.com>
	284
	285	* configure: Regenerate.
	286
e23e8ebe AB	287	2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
	288
	289	* arc-nps400-tbl.h: New file.
	290	* arc-opc.c: Add top level comment.
	291	(insert_nps_3bit_dst): New function.
	292	(extract_nps_3bit_dst): New function.
	293	(insert_nps_3bit_src2): New function.
	294	(extract_nps_3bit_src2): New function.
	295	(insert_nps_bitop_size): New function.
	296	(extract_nps_bitop_size): New function.
	297	(arc_flag_operands): Add nps400 entries.
	298	(arc_flag_classes): Add nps400 entries.
	299	(arc_operands): Add nps400 entries.
	300	(arc_opcodes): Add nps400 include.
	301
1ae8ab47 AB	302	2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
	303
	304	* arc-opc.c (arc_flag_classes): Convert all flag classes to use
	305	the new class enum values.
	306
8699fc3e AB	307	2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
	308
	309	* arc-dis.c (print_insn_arc): Handle nps400.
	310
24740d83 AB	311	2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
	312
	313	* arc-opc.c (BASE): Delete.
	314
8678914f NC	315	2016-03-18 Nick Clifton <nickc@redhat.com>
	316
	317	PR target/19721
	318	* aarch64-tbl.h (aarch64_opcode_table): Fix type of second operand
	319	of MOV insn that aliases an ORR insn.
	320
cc933301 JW	321	2016-03-16 Jiong Wang <jiong.wang@arm.com>
	322
	323	* arm-dis.c (neon_opcodes): Support new FP16 instructions.
	324
f86f5863 TS	325	2016-03-07 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
	326
	327	* mcore-opc.h: Add const qualifiers.
	328	* microblaze-opc.h (struct op_code_struct): Likewise.
	329	* sh-opc.h: Likewise.
	330	* tic4x-dis.c (tic4x_print_indirect): Likewise.
	331	(tic4x_print_op): Likewise.
	332
62de1c63 AM	333	2016-03-02 Alan Modra <amodra@gmail.com>
62de1c63 AM	334
d11698cd	335	* or1k-desc.h: Regenerate.
62de1c63	336	* fr30-ibld.c: Regenerate.
c697cf0b	337	* rl78-decode.c: Regenerate.
62de1c63	338
020efce5 NC	339	2016-03-01 Nick Clifton <nickc@redhat.com>
	340
	341	PR target/19747
	342	* rl78-dis.c (print_insn_rl78_common): Fix typo.
	343
b0c11777 RL	344	2016-02-24 Renlin Li <renlin.li@arm.com>
	345
	346	* arm-dis.c (coprocessor_opcodes): Add fp16 instruction entries.
	347	(print_insn_coprocessor): Support fp16 instructions.
	348
3e309328 RL	349	2016-02-24 Renlin Li <renlin.li@arm.com>
	350
	351	* arm-dis.c (print_insn_coprocessor): Fix mask for vsel, vmaxnm,
	352	vminnm, vrint(mpna).
	353
8afc7bea RL	354	2016-02-24 Renlin Li <renlin.li@arm.com>
	355
	356	* arm-dis.c (print_insn_coprocessor): Check co-processor number for
	357	cpd/cpd2, mcr/mcr2, mrc/mrc2, ldc/ldc2, stc/stc2.
	358
4fd7268a L	359	2016-02-15 H.J. Lu <hongjiu.lu@intel.com>
	360
	361	* i386-dis.c (print_insn): Parenthesize expression to prevent
	362	truncated addresses.
	363	(OP_J): Likewise.
	364
4670103e CZ	365	2016-02-10 Claudiu Zissulescu <claziss@synopsys.com>
	366	Janek van Oirschot <jvanoirs@synopsys.com>
	367
b99747ae CZ	368	* arc-opc.c (arc_relax_opcodes, arc_num_relax_opcodes): New
b99747ae CZ	369	variable.
4670103e	370
c1d9289f NC	371	2016-02-04 Nick Clifton <nickc@redhat.com>
	372
	373	PR target/19561
	374	* msp430-dis.c (print_insn_msp430): Add a special case for
	375	decoding an RRC instruction with the ZC bit set in the extension
	376	word.
	377
a143b004 AB	378	2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
	379
	380	* cgen-ibld.in (insert_normal): Rework calculation of shift.
	381	* epiphany-ibld.c: Regenerate.
	382	* fr30-ibld.c: Regenerate.
	383	* frv-ibld.c: Regenerate.
	384	* ip2k-ibld.c: Regenerate.
	385	* iq2000-ibld.c: Regenerate.
	386	* lm32-ibld.c: Regenerate.
	387	* m32c-ibld.c: Regenerate.
	388	* m32r-ibld.c: Regenerate.
	389	* mep-ibld.c: Regenerate.
	390	* mt-ibld.c: Regenerate.
	391	* or1k-ibld.c: Regenerate.
	392	* xc16x-ibld.c: Regenerate.
	393	* xstormy16-ibld.c: Regenerate.
	394
b89807c6 AB	395	2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
	396
	397	* epiphany-dis.c: Regenerated from latest cpu files.
	398
d8c823c8 MM	399	2016-02-01 Michael McConville <mmcco@mykolab.com>
	400
	401	* cgen-dis.c (count_decodable_bits): Use unsigned value for mask
	402	test bit.
	403
5bc5ae88 RL	404	2016-01-25 Renlin Li <renlin.li@arm.com>
	405
	406	* arm-dis.c (mapping_symbol_for_insn): New function.
	407	(find_ifthen_state): Call mapping_symbol_for_insn().
	408
0bff6e2d MW	409	2016-01-20 Matthew Wahab <matthew.wahab@arm.com>
	410
	411	* aarch64-opc.c (operand_general_constraint_met_p): Check validity
	412	of MSR UAO immediate operand.
	413
100b4f2e MR	414	2016-01-18 Maciej W. Rozycki <macro@imgtec.com>
	415
	416	* mips-dis.c (print_insn_micromips): Remove 48-bit microMIPS
	417	instruction support.
	418
5c14705f AM	419	2016-01-17 Alan Modra <amodra@gmail.com>
	420
	421	* configure: Regenerate.
	422
4d82fe66 NC	423	2016-01-14 Nick Clifton <nickc@redhat.com>
	424
	425	* rl78-decode.opc (rl78_decode_opcode): Add 's' operand to movw
	426	instructions that can support stack pointer operations.
	427	* rl78-decode.c: Regenerate.
	428	* rl78-dis.c: Fix display of stack pointer in MOVW based
	429	instructions.
	430
651657fa MW	431	2016-01-14 Matthew Wahab <matthew.wahab@arm.com>
	432
	433	* aarch64-opc.c (aarch64_sys_reg_supported_p): Merge conditionals
	434	testing for RAS support. Add checks for erxfr_el1, erxctlr_el1,
	435	erxtatus_el1 and erxaddr_el1.
	436
105bde57 MW	437	2016-01-12 Matthew Wahab <matthew.wahab@arm.com>
	438
	439	* arm-dis.c (arm_opcodes): Add "esb".
	440	(thumb_opcodes): Likewise.
	441
afa8d405 PB	442	2016-01-11 Peter Bergner <bergner@vnet.ibm.com>
	443
	444	* ppc-opc.c <xscmpnedp>: Delete.
	445	<xvcmpnedp>: Likewise.
	446	<xvcmpnedp.>: Likewise.
	447	<xvcmpnesp>: Likewise.
	448	<xvcmpnesp.>: Likewise.
	449
83c3256e AS	450	2016-01-08 Andreas Schwab <schwab@linux-m68k.org>
	451
	452	PR gas/13050
	453	* m68k-opc.c (moveb, movew): For ISA_B/C only allow #,d(An) in
	454	addition to ISA_A.
	455
6f2750fe AM	456	2016-01-01 Alan Modra <amodra@gmail.com>
	457
	458	Update year range in copyright notice of all files.
	459
3499769a AM	460	For older changes see ChangeLog-2015
	461	\f
	462	Copyright (C) 2016 Free Software Foundation, Inc.
	463
	464	Copying and distribution of this file, with or without modification,
	465	are permitted in any medium without royalty provided the copyright
	466	notice and this notice are preserved.
	467
	468	Local Variables:
	469	mode: change-log
	470	left-margin: 8
	471	fill-column: 74
	472	version-control: never
	473	End: