ARM/opcodes: Fix negative hexadecimal offset disassembly
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
84919466
MR
12014-08-21 Nathan Sidwell <nathan@codesourcery.com>
2 Maciej W. Rozycki <macro@codesourcery.com>
3
4 * arm-dis.c (print_arm_address): Negate the GPR-relative offset
5 returned if the U bit is set.
6
a6c70539
MR
72014-08-21 Maciej W. Rozycki <macro@codesourcery.com>
8
9 * micromips-opc.c (micromips_opcodes): Remove #ifdef-ed out
10 48-bit "li" encoding.
11
9ace48f3
AA
122014-08-19 Andreas Arnez <arnez@linux.vnet.ibm.com>
13
14 * s390-dis.c (s390_insn_length, s390_insn_matches_opcode)
15 (s390_print_insn_with_opcode, opcode_mask_more_specific): New
16 static functions, code was moved from...
17 (print_insn_s390): ...here.
18 (s390_extract_operand): Adjust comment. Change type of first
19 parameter from 'unsigned char *' to 'const bfd_byte *'.
20 (union operand_value): New.
21 (s390_extract_operand): Change return type to union operand_value.
22 Also avoid integer overflow in sign-extension.
23 (s390_print_insn_with_opcode): Adjust to changed return value from
24 s390_extract_operand(). Change "%i" printf format to "%u" for
25 unsigned values.
26 (init_disasm): Simplify initialization of opc_index[]. This also
27 fixes an access after the last element of s390_opcodes[].
28 (print_insn_s390): Simplify the opcode search loop.
29 Check architecture mask against all searched opcodes, not just the
30 first matching one.
31 (s390_print_insn_with_opcode): Drop function pointer dereferences
32 without effect.
33 (print_insn_s390): Likewise.
34 (s390_insn_length): Simplify formula for return value.
35 (s390_print_insn_with_opcode): Avoid special handling for the
36 separator before the first operand. Use new local variable
37 'flags' in place of 'operand->flags'.
38
60ac5798
MF
392014-08-14 Mike Frysinger <vapier@gentoo.org>
40
41 * bfin-dis.c (struct private): Change int's to bfd_boolean's.
42 (decode_LOGI2op_0, decode_COMPI2opD_0, decode_COMPI2opP_0,
43 decode_dagMODik_0, decode_LDIMMhalf_0, decode_linkage_0):
44 Change assignment of 1 to priv->comment to TRUE.
45 (print_insn_bfin): Change legal to a bfd_boolean. Change
46 assignment of 0/1 with priv comment and parallel and legal
47 to FALSE/TRUE.
48
b3f3b4b0
MF
492014-08-14 Mike Frysinger <vapier@gentoo.org>
50
51 * bfin-dis.c (OUT): Define.
52 (decode_CC2stat_0): Declare new op_names array.
53 Replace multiple if statements with a single one.
54
a4e600b2
MF
552014-08-14 Mike Frysinger <vapier@gentoo.org>
56
57 * bfin-dis.c (struct private): Add iw0.
58 (_print_insn_bfin): Assign iw0 to priv.iw0.
59 (print_insn_bfin): Drop ifetch and use priv.iw0.
60
703ec4e8
MF
612014-08-13 Mike Frysinger <vapier@gentoo.org>
62
63 * bfin-dis.c (comment, parallel): Move from global scope ...
64 (struct private): ... to this new struct.
65 (decode_ProgCtrl_0, decode_CaCTRL_0, decode_PushPopReg_0,
66 decode_PushPopMultiple_0, decode_ccMV_0, decode_CCflag_0,
67 decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0,
68 decode_LOGI2op_0, decode_COMPI2opD_0, decode_COMPI2opP_0,
69 decode_dagMODik_0, decode_LoopSetup_0, decode_LDIMMhalf_0,
70 decode_CALLa_0, decode_linkage_0, decode_pseudoDEBUG_0,
71 decode_pseudoOChar_0, decode_pseudodbg_assert_0, _print_insn_bfin,
72 print_insn_bfin): Declare private struct. Use priv's comment and
73 parallel members.
74
ed2c4879
MF
752014-08-13 Mike Frysinger <vapier@gentoo.org>
76
77 * bfin-dis.c (ifetch): Do not align pc to 2 bytes.
78 (_print_insn_bfin): Add check for unaligned pc.
79
ba329817
MF
802014-08-13 Mike Frysinger <vapier@gentoo.org>
81
82 * bfin-dis.c (ifetch): New function.
83 (_print_insn_bfin, print_insn_bfin): Call new ifetch and return
84 -1 when it errors.
85
43885403
MF
862014-07-29 Matthew Fortune <matthew.fortune@imgtec.com>
87
88 * micromips-opc.c (COD): Rename throughout to...
89 (CM): New define, update to use INSN_COPROC_MOVE.
90 (LCD): Rename throughout to...
91 (LC): New define, update to use INSN_LOAD_COPROC.
92 * mips-opc.c: Likewise.
93
351cdf24
MF
942014-07-29 Matthew Fortune <matthew.fortune@imgtec.com>
95
96 * micromips-opc.c (COD, LCD) New macros.
97 (cfc1, ctc1): Remove FP_S attribute.
98 (dmfc1, mfc1, mfhc1): Add LCD attribute.
99 (dmtc1, mtc1, mthc1): Add COD attribute.
100 * mips-opc.c (cfc1, cftc1, ctc, cttc1): Remove FP_S attribute.
101
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1022014-07-22 Sergey Guriev <sergey.s.guriev@intel.com>
103 Alexander Ivchenko <alexander.ivchenko@intel.com>
104 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
105 Sergey Lega <sergey.s.lega@intel.com>
106 Anna Tikhonova <anna.tikhonova@intel.com>
107 Ilya Tocar <ilya.tocar@intel.com>
108 Andrey Turetskiy <andrey.turetskiy@intel.com>
109 Ilya Verbin <ilya.verbin@intel.com>
110 Kirill Yukhin <kirill.yukhin@intel.com>
111 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
112
113 * i386-dis-evex.h: Updated.
114 * i386-dis.c (PREFIX enum): Add PREFIX_EVEX_0F54, PREFIX_EVEX_0F55,
115 PREFIX_EVEX_0F56, PREFIX_EVEX_0F57, PREFIX_EVEX_0F3A16,
116 PREFIX_EVEX_0F3A22, PREFIX_EVEX_0F3A50, PREFIX_EVEX_0F3A51,
117 PREFIX_EVEX_0F3A56, PREFIX_EVEX_0F3A57, PREFIX_EVEX_0F3A66,
118 PREFIX_EVEX_0F3A67.
119 (VEX_LEN enum): Add VEX_LEN_0F92_P_2, VEX_LEN_0F93_P_2,
120 VEX_W_0F92_P_2_LEN_0, VEX_W_0F93_P_2_LEN_0.
121 (VEX_W enum): Add EVEX_W_0F54_P_0, EVEX_W_0F54_P_2, EVEX_W_0F55_P_0,
122 EVEX_W_0F55_P_2, EVEX_W_0F56_P_0, EVEX_W_0F56_P_2, EVEX_W_0F57_P_0,
123 EVEX_W_0F57_P_2, EVEX_W_0F78_P_2, EVEX_W_0F79_P_2, EVEX_W_0F7A_P_2,
124 EVEX_W_0F7B_P_2, EVEX_W_0F3838_P_1, EVEX_W_0F3839_P_1,
125 EVEX_W_0F3A16_P_2, EVEX_W_0F3A22_P_2, EVEX_W_0F3A50_P_2,
126 EVEX_W_0F3A51_P_2, EVEX_W_0F3A56_P_2, EVEX_W_0F3A57_P_2,
127 EVEX_W_0F3A66_P_2, EVEX_W_0F3A67_P_2.
128 (prefix_table): Add entries for new instructions.
129 (vex_len_table): Ditto.
130 (vex_w_table): Ditto.
131 (OP_E_memory): Update xmmq_mode handling.
132 * i386-gen.c (cpu_flag_init): Add CPU_AVX512DQ_FLAGS.
133 (cpu_flags): Add CpuAVX512DQ.
134 * i386-init.h: Regenerared.
135 * i386-opc.h (CpuAVX512DQ): New.
136 (i386_cpu_flags): Add cpuavx512dq.
137 * i386-opc.tbl: Add AVX512DQ instructions.
138 * i386-tbl.h: Regenerate.
139
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1402014-07-22 Sergey Guriev <sergey.s.guriev@intel.com>
141 Alexander Ivchenko <alexander.ivchenko@intel.com>
142 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
143 Sergey Lega <sergey.s.lega@intel.com>
144 Anna Tikhonova <anna.tikhonova@intel.com>
145 Ilya Tocar <ilya.tocar@intel.com>
146 Andrey Turetskiy <andrey.turetskiy@intel.com>
147 Ilya Verbin <ilya.verbin@intel.com>
148 Kirill Yukhin <kirill.yukhin@intel.com>
149 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
150
151 * i386-dis-evex.h: Add new instructions (prefixes bellow).
152 * i386-dis.c (fetch_data): Add EdqwS, Edb, Edw, MaskBDE.
153 (enum): Add dqw_swap_mode, db_mode, dw_mode, mask_bd_mode, REG_EVEX_0F71.
154 (PREFIX enum): Add PREFIX_VEX_0F4A, PREFIX_VEX_0F99, PREFIX_VEX_0F3A31,
155 PREFIX_VEX_0F3A33, PREFIX_EVEX_0F60, PREFIX_EVEX_0F61, PREFIX_EVEX_0F63,
156 PREFIX_EVEX_0F64, PREFIX_EVEX_0F65, PREFIX_EVEX_0F67, PREFIX_EVEX_0F68,
157 PREFIX_EVEX_0F69, PREFIX_EVEX_0F6B, PREFIX_EVEX_0F71_REG_2, PREFIX_EVEX_0F71_REG_4,
158 PREFIX_EVEX_0F71_REG_6, PREFIX_EVEX_0F73_REG_3, PREFIX_EVEX_0F73_REG_7,
159 PREFIX_EVEX_0F74, PREFIX_EVEX_0F75, PREFIX_EVEX_0FC4, PREFIX_EVEX_0FC5,
160 PREFIX_EVEX_0FD1, PREFIX_EVEX_0FD5, PREFIX_EVEX_0FD8, PREFIX_EVEX_0FD9,
161 PREFIX_EVEX_0FDA, PREFIX_EVEX_0FDC, PREFIX_EVEX_0FDD, PREFIX_EVEX_0FDE,
162 PREFIX_EVEX_0FE0, PREFIX_EVEX_0FE1, PREFIX_EVEX_0FE3, PREFIX_EVEX_0FE4,
163 PREFIX_EVEX_0FE5, PREFIX_EVEX_0FE8, PREFIX_EVEX_0FE9, PREFIX_EVEX_0FEA,
164 PREFIX_EVEX_0FEC, PREFIX_EVEX_0FED, PREFIX_EVEX_0FEE, PREFIX_EVEX_0FF1,
165 PREFIX_EVEX_0FF5, PREFIX_EVEX_0FF6, PREFIX_EVEX_0FF8, PREFIX_EVEX_0FF9,
166 PREFIX_EVEX_0FFC, PREFIX_EVEX_0FFD, PREFIX_EVEX_0F3800, PREFIX_EVEX_0F3804,
167 PREFIX_EVEX_0F380B, PREFIX_EVEX_0F3810, PREFIX_EVEX_0F381C, PREFIX_EVEX_0F381D,
168 PREFIX_EVEX_0F3820, PREFIX_EVEX_0F3826, PREFIX_EVEX_0F382B, PREFIX_EVEX_0F3830,
169 PREFIX_EVEX_0F3838, PREFIX_EVEX_0F383C, PREFIX_EVEX_0F383E, PREFIX_EVEX_0F3866,
170 PREFIX_EVEX_0F3875, PREFIX_EVEX_0F3878, PREFIX_EVEX_0F3879, PREFIX_EVEX_0F387A,
171 PREFIX_EVEX_0F387B, PREFIX_EVEX_0F387D, PREFIX_EVEX_0F388D, PREFIX_EVEX_0F3A0F,
172 PREFIX_EVEX_0F3A14, PREFIX_EVEX_0F3A15, PREFIX_EVEX_0F3A20, PREFIX_EVEX_0F3A3E,
173 PREFIX_EVEX_0F3A3F, PREFIX_EVEX_0F3A42.
174 (VEX_LEN enum): Add VEX_LEN_0F41_P_2, VEX_LEN_0F42_P_2, VEX_LEN_0F44_P_2,
175 VEX_LEN_0F45_P_2, VEX_LEN_0F46_P_2, VEX_LEN_0F47_P_2, VEX_LEN_0F4A_P_0,
176 VEX_LEN_0F4A_P_2, VEX_LEN_0F4B_P_0, VEX_LEN_0F90_P_2, VEX_LEN_0F91_P_2,
177 VEX_LEN_0F92_P_3, VEX_LEN_0F93_P_3, VEX_LEN_0F98_P_2, VEX_LEN_0F99_P_0,
178 VEX_LEN_0F99_P_2, VEX_LEN_0F3A31_P_2, VEX_LEN_0F3A33_P_2, VEX_W_0F41_P_2_LEN_1,
179 VEX_W_0F42_P_2_LEN_1, VEX_W_0F44_P_2_LEN_0, VEX_W_0F45_P_2_LEN_1,
180 VEX_W_0F46_P_2_LEN_1, VEX_W_0F47_P_2_LEN_1, VEX_W_0F4A_P_0_LEN_1,
181 VEX_W_0F4A_P_2_LEN_1, VEX_W_0F4B_P_0_LEN_1, VEX_W_0F90_P_2_LEN_0,
182 VEX_W_0F91_P_2_LEN_0, VEX_W_0F92_P_3_LEN_0, VEX_W_0F93_P_3_LEN_0,
183 VEX_W_0F98_P_2_LEN_0, VEX_W_0F99_P_0_LEN_0, VEX_W_0F99_P_2_LEN_0,
184 VEX_W_0F3A31_P_2_LEN_0, VEX_W_0F3A33_P_2_LEN_0.
185 (VEX_W enum): Add EVEX_W_0F6B_P_2, EVEX_W_0F6F_P_3, EVEX_W_0F7F_P_3,
186 EVEX_W_0F3810_P_1, EVEX_W_0F3810_P_2, EVEX_W_0F3811_P_2, EVEX_W_0F3812_P_2,
187 EVEX_W_0F3820_P_1, EVEX_W_0F3826_P_1, EVEX_W_0F3826_P_2, EVEX_W_0F3828_P_1,
188 EVEX_W_0F3829_P_1, EVEX_W_0F382B_P_2, EVEX_W_0F3830_P_1, EVEX_W_0F3866_P_2,
189 EVEX_W_0F3875_P_2, EVEX_W_0F3878_P_2, EVEX_W_0F3879_P_2, EVEX_W_0F387A_P_2,
190 EVEX_W_0F387B_P_2, EVEX_W_0F387D_P_2, EVEX_W_0F388D_P_2, EVEX_W_0F3A3E_P_2,
191 EVEX_W_0F3A3F_P_2, EVEX_W_0F3A42_P_2.
192 (prefix_table): Add entries for new instructions.
193 (vex_table) : Ditto.
194 (vex_len_table): Ditto.
195 (vex_w_table): Ditto.
196 (intel_operand_size): Add db_mode, dw_mode, dqw_swap_mode,
197 mask_bd_mode handling.
198 (OP_E_register): Add dqw_swap_mode, dw_mode, db_mode, mask_bd_mode
199 handling.
200 (OP_E_memory): Add dqw_mode, dw_mode, dqw_swap_mode, dqb_mode, db_mode
201 handling.
202 (OP_G): Add db_mode, dw_mode, dqw_swap_mode, mask_bd_mode handling.
203 (OP_EX): Add dqw_swap_mode handling.
204 (OP_VEX): Add mask_bd_mode handling.
205 (OP_Mask): Add mask_bd_mode handling.
206 * i386-gen.c (cpu_flag_init): Add CPU_AVX512BW_FLAGS.
207 (cpu_flags): Add CpuAVX512BW.
208 * i386-init.h: Regenerated.
209 * i386-opc.h (CpuAVX512BW): New.
210 (i386_cpu_flags): Add cpuavx512bw.
211 * i386-opc.tbl: Add AVX512BW instructions.
212 * i386-tbl.h: Regenerate.
213
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2142014-07-22 Sergey Guriev <sergey.s.guriev@intel.com>
215 Alexander Ivchenko <alexander.ivchenko@intel.com>
216 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
217 Sergey Lega <sergey.s.lega@intel.com>
218 Anna Tikhonova <anna.tikhonova@intel.com>
219 Ilya Tocar <ilya.tocar@intel.com>
220 Andrey Turetskiy <andrey.turetskiy@intel.com>
221 Ilya Verbin <ilya.verbin@intel.com>
222 Kirill Yukhin <kirill.yukhin@intel.com>
223 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
224
225 * i386-opc.tbl: Add AVX512VL and AVX512CD instructions.
226 * i386-tbl.h: Regenerate.
227
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2282014-07-22 Sergey Guriev <sergey.s.guriev@intel.com>
229 Alexander Ivchenko <alexander.ivchenko@intel.com>
230 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
231 Sergey Lega <sergey.s.lega@intel.com>
232 Anna Tikhonova <anna.tikhonova@intel.com>
233 Ilya Tocar <ilya.tocar@intel.com>
234 Andrey Turetskiy <andrey.turetskiy@intel.com>
235 Ilya Verbin <ilya.verbin@intel.com>
236 Kirill Yukhin <kirill.yukhin@intel.com>
237 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
238
239 * i386-dis.c (intel_operand_size): Support 128/256 length in
240 vex_vsib_q_w_dq_mode.
241 (OP_E_memory): Add ymmq_mode handling, handle new broadcast.
242 * i386-gen.c (cpu_flag_init): Add CPU_AVX512VL_FLAGS.
243 (cpu_flags): Add CpuAVX512VL.
244 * i386-init.h: Regenerated.
245 * i386-opc.h (CpuAVX512VL): New.
246 (i386_cpu_flags): Add cpuavx512vl.
247 (BROADCAST_1TO4, BROADCAST_1TO2): Define.
248 * i386-opc.tbl: Add AVX512VL instructions.
249 * i386-tbl.h: Regenerate.
250
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SK
2512014-07-20 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
252
253 * or1k-desc.c, * or1k-desc.h, * or1k-opc.c, * or1k-opc.h,
254 * or1k-opinst.c: Regenerate.
255
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IT
2562014-07-08 Ilya Tocar <ilya.tocar@intel.com>
257
258 * i386-dis-evex.h (EVEX_W_0F10_P_1_M_1): Fix vmovss.
259 (EVEX_W_0F10_P_3_M_1): Fix vmovsd.
260
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AM
2612014-07-04 Alan Modra <amodra@gmail.com>
262
263 * configure.ac: Rename from configure.in.
264 * Makefile.in: Regenerate.
265 * config.in: Regenerate.
266
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2672014-07-04 Alan Modra <amodra@gmail.com>
268
269 * configure.in: Include bfd/version.m4.
270 (AC_INIT, AM_INIT_AUTOMAKE): Use modern form.
271 (BFD_VERSION): Delete.
272 * Makefile.am (CONFIG_STATUS_DEPENDENCIES): Remove bfd/configure.in.
273 * configure: Regenerate.
274 * Makefile.in: Regenerate.
275
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2762014-07-01 Barney Stratford <barney_stratford@fastmail.fm>
277 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
278 Pitchumani Sivanupandi <pitchumani.s@atmel.com>
279 Soundararajan <Sounderarajan.D@atmel.com>
280
281 * avr-dis.c (avr_operand): Handle constraint j for 16 bit lds/sts.
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AM
282 (print_insn_avr): Do not select opcode if insn ISA is avrtiny and
283 machine is not avrtiny.
f36e8886 284
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2852014-06-26 Philippe De Muyter <phdm@macqel.be>
286
287 * or1k-desc.h (spr_field_masks): Add U suffix to the end of long
288 constants.
289
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2902014-06-12 Alan Modra <amodra@gmail.com>
291
292 * or1k-asm.c, * or1k-desc.c, * or1k-desc.h, * or1k-dis.c,
293 * or1k-ibld.c, * or1k-opc.c, * or1k-opc.h, * or1k-opinst.c: Regenerate.
294
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2952014-06-10 H.J. Lu <hongjiu.lu@intel.com>
296
297 * i386-dis.c (fwait_prefix): New.
298 (ckprefix): Set fwait_prefix.
299 (print_insn): Properly print prefixes before fwait.
300
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3012014-06-07 Alan Modra <amodra@gmail.com>
302
303 * ppc-opc.c (UISIGNOPT): Define and use with cmpli.
304
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3052014-06-05 Joel Brobecker <brobecker@adacore.com>
306
307 * Makefile.am (CONFIG_STATUS_DEPENDENCIES): Add dependency on
308 bfd's development.sh.
309 * Makefile.in, configure: Regenerate.
310
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3112014-06-03 Nick Clifton <nickc@redhat.com>
312
313 * msp430-dis.c (msp430_doubleoperand): Use extension_word to
314 decide when extended addressing is being used.
315
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3162014-06-02 Eric Botcazou <ebotcazou@adacore.com>
317
318 * sparc-opc.c (cas): Disable for LEON.
319 (casl): Likewise.
320
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3212014-05-20 Alan Modra <amodra@gmail.com>
322
323 * m68k-dis.c: Don't include setjmp.h.
324
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3252014-05-09 H.J. Lu <hongjiu.lu@intel.com>
326
327 * i386-dis.c (ADDR16_PREFIX): Removed.
328 (ADDR32_PREFIX): Likewise.
329 (DATA16_PREFIX): Likewise.
330 (DATA32_PREFIX): Likewise.
331 (prefix_name): Updated.
332 (print_insn): Simplify data and address size prefixes processing.
333
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3342014-05-08 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
335
336 * or1k-desc.c: Regenerated.
337 * or1k-desc.h: Likewise.
338 * or1k-opc.c: Likewise.
339 * or1k-opc.h: Likewise.
340 * or1k-opinst.c: Likewise.
341
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AB
3422014-05-07 Andrew Bennett <andrew.bennett@imgtec.com>
343
344 * mips-opc.c (mips_builtin_opcodes): Add MIPS32r5 eretnc instruction.
345 (I34): New define.
346 (I36): New define.
347 (I66): New define.
348 (I68): New define.
349 * mips-dis.c (mips_arch_choices): Add mips32r3, mips32r5, mips64r3 and
350 mips64r5.
351 (parse_mips_dis_option): Update MSA and virtualization support to
9f445129 352 allow mips64r3 and mips64r5.
ae52f483 353
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3542014-05-07 Andrew Bennett <andrew.bennett@imgtec.com>
355
356 * mips-opc.c (G3): Remove I4.
357
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3582014-05-05 H.J. Lu <hongjiu.lu@intel.com>
359
360 PR binutils/16893
361 * i386-dis.c (twobyte_has_mandatory_prefix): New variable.
362 (end_codep): Likewise.
363 (mandatory_prefix): Likewise.
364 (active_seg_prefix): Likewise.
365 (ckprefix): Set active_seg_prefix to the active segment register
366 prefix.
367 (seg_prefix): Removed.
368 (get_valid_dis386): Use the last of PREFIX_REPNZ and PREFIX_REPZ
369 for prefix index. Ignore the index if it is invalid and the
370 mandatory prefix isn't required.
371 (print_insn): Set mandatory_prefix if the PREFIX_XXX prefix is
372 mandatory. Don't set PREFIX_REPZ/PREFIX_REPNZ/PREFIX_LOCK bits
373 in used_prefixes here. Don't print unused prefixes. Check
374 active_seg_prefix for the active segment register prefix.
375 Restore the DFLAG bit in sizeflag if the data size prefix is
376 unused. Check the unused mandatory PREFIX_XXX prefixes
377 (append_seg): Only print the segment register which gets used.
378 (OP_E_memory): Check active_seg_prefix for the segment register
379 prefix.
380 (OP_OFF): Likewise.
381 (OP_OFF64): Likewise.
382 (OP_DSreg): Set active_seg_prefix to PREFIX_DS if it is unset.
383
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3842014-05-02 H.J. Lu <hongjiu.lu@intel.com>
385
386 PR binutils/16886
387 * config.in: Regenerated.
388 * configure: Likewise.
389 * configure.in: Check if sigsetjmp is available.
390 * h8500-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
391 (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
392 (print_insn_h8500): Replace setjmp with OPCODES_SIGSETJMP.
393 * i386-dis.c (dis_private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
394 (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
395 (print_insn): Replace setjmp with OPCODES_SIGSETJMP.
396 * ns32k-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
397 (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
398 (print_insn_ns32k): Replace setjmp with OPCODES_SIGSETJMP.
399 * sysdep.h (OPCODES_SIGJMP_BUF): New macro.
400 (OPCODES_SIGSETJMP): Likewise.
401 (OPCODES_SIGLONGJMP): Likewise.
402 * vax-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
403 (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
404 (print_insn_vax): Replace setjmp with OPCODES_SIGSETJMP.
405 * xtensa-dis.c (dis_private): Replace jmp_buf with
406 OPCODES_SIGJMP_BUF.
407 (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
408 (print_insn_xtensa): Replace setjmp with OPCODES_SIGSETJMP.
409 * z8k-dis.c(instr_data_s): Replace jmp_buf with OPCODES_SIGJMP_BUF.
410 (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
411 (print_insn_z8k): Replace setjmp with OPCODES_SIGSETJMP.
412
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4132014-05-01 H.J. Lu <hongjiu.lu@intel.com>
414
415 PR binutils/16891
416 * i386-dis.c (print_insn): Handle prefixes before fwait.
417
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4182014-04-26 Alan Modra <amodra@gmail.com>
419
420 * po/POTFILES.in: Regenerate.
421
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4222014-04-23 Andrew Bennett <andrew.bennett@imgtec.com>
423
424 * mips-dis.c (mips_arch_choices): Update mips32r2 and mips64r2
425 to allow the MIPS XPA ASE.
426 (parse_mips_dis_option): Process the -Mxpa option.
427 * mips-opc.c (XPA): New define.
428 (mips_builtin_opcodes): Add MIPS XPA instructions and move the
429 locations of the ctc0 and cfc0 instructions.
430
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4312014-04-22 Christian Svensson <blue@cmd.nu>
432
433 * Makefile.am: Remove openrisc and or32 support. Add support for or1k.
434 * configure.in: Likewise.
435 * disassemble.c: Likewise.
436 * or1k-asm.c: New file.
437 * or1k-desc.c: New file.
438 * or1k-desc.h: New file.
439 * or1k-dis.c: New file.
440 * or1k-ibld.c: New file.
441 * or1k-opc.c: New file.
442 * or1k-opc.h: New file.
443 * or1k-opinst.c: New file.
444 * Makefile.in: Regenerate.
445 * configure: Regenerate.
446 * openrisc-asm.c: Delete.
447 * openrisc-desc.c: Delete.
448 * openrisc-desc.h: Delete.
449 * openrisc-dis.c: Delete.
450 * openrisc-ibld.c: Delete.
451 * openrisc-opc.c: Delete.
452 * openrisc-opc.h: Delete.
453 * or32-dis.c: Delete.
454 * or32-opc.c: Delete.
455
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4562014-04-04 Ilya Tocar <ilya.tocar@intel.com>
457
458 * i386-dis.c (rm_table): Add encls, enclu.
459 * i386-gen.c (cpu_flag_init): Add CPU_SE1_FLAGS,
460 (cpu_flags): Add CpuSE1.
461 * i386-opc.h (enum): Add CpuSE1.
462 (i386_cpu_flags): Add cpuse1.
463 * i386-opc.tbl: Add encls, enclu.
464 * i386-init.h: Regenerated.
465 * i386-tbl.h: Likewise.
466
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4672014-04-02 Anthony Green <green@moxielogic.com>
468
469 * moxie-opc.c (moxie_form1_opc_info): Add sign-extension
470 instructions, sex.b and sex.s.
471
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4722014-03-26 Jiong Wang <jiong.wang@arm.com>
473
474 * aarch64-dis.c (aarch64_ext_ldst_elemlist): Check H/S undefined
475 instructions.
476
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4772014-03-20 Ilya Tocar <ilya.tocar@intel.com>
478
479 * i386-opc.tbl: Change memory size for vgatherpf0qps, vgatherpf1qps,
480 vscatterpf0qps, vscatterpf1qps, vgatherqps, vpgatherqd, vpscatterqd,
481 vscatterqps.
482 * i386-tbl.h: Regenerate.
483
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4842014-03-19 Jose E. Marchesi <jose.marchesi@oracle.com>
485
486 * sparc-dis.c (v9_hpriv_reg_names): Names for %hstick_offset and
487 %hstick_enable added.
488
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4892014-03-19 Nick Clifton <nickc@redhat.com>
490
491 * rx-decode.opc (bwl): Allow for bogus instructions with a size
492 field of 3.
b41c812c 493 (sbwl, ubwl, SCALE): Likewise.
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494 * rx-decode.c: Regenerate.
495
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4962014-03-12 Alan Modra <amodra@gmail.com>
497
498 * Makefile.in: Regenerate.
499
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5002014-03-05 Alan Modra <amodra@gmail.com>
501
502 Update copyright years.
503
cd0c81e9 5042014-03-04 Heiher <r@hev.cc>
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505
506 * mips-dis.c (mips_arch_choices): Usee ISA_MIPS64R2 for Loongson-3A.
507
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5082014-03-04 Richard Sandiford <rdsandiford@googlemail.com>
509
510 * mips-opc.c (mips_builtin_opcodes): Move the udi* instructions
511 so that they come after the Loongson extensions.
512
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5132014-03-03 Alan Modra <amodra@gmail.com>
514
515 * i386-gen.c (process_copyright): Emit copyright notice on one line.
516
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5172014-02-28 Alan Modra <amodra@gmail.com>
518
519 * msp430-decode.c: Regenerate.
520
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5212014-02-27 Jiong Wang <jiong.wang@arm.com>
522
523 * aarch64-tbl.h (aarch64_opcode_table): Replace IMM0 with
524 FPIMM0 for fcmeq, fcmgt, fcmge, fcmlt and fcmle.
525
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5262014-02-27 Yufeng Zhang <yufeng.zhang@arm.com>
527
528 * aarch64-opc.c (print_register_offset_address): Call
529 get_int_reg_name to prepare the register name.
530
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5312014-02-25 Ilya Tocar <ilya.tocar@intel.com>
532
533 * i386-opc.tbl: Remove wrong variant of vcvtps2ph
534 * i386-tbl.h: Regenerate.
535
5362014-02-20 Ilya Tocar <ilya.tocar@intel.com>
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537
538 * i386-gen.c (cpu_flag_init): Add CPU_PREFETCHWT1_FLAGS/
539 (cpu_flags): Add CpuPREFETCHWT1.
540 * i386-init.h: Regenerate.
541 * i386-opc.h (CpuPREFETCHWT1): New.
542 (i386_cpu_flags): Add cpuprefetchwt1.
543 * i386-opc.tbl: Cahnge CPU of prefetchwt1 from CpuAVX512PF to CpuPREFETCHWT1.
544 * i386-tbl.h: Regenerate.
545
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5462014-02-20 Ilya Tocar <ilya.tocar@intel.com>
547
548 * i386-opc.tbl: Change CPU of vptestnmq, vptestnmd from CpuAVX512CD,
549 to CpuAVX512F.
550 * i386-tbl.h: Regenerate.
551
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5522014-02-19 H.J. Lu <hongjiu.lu@intel.com>
553
554 * i386-gen.c (output_cpu_flags): Don't output trailing space.
555 (output_opcode_modifier): Likewise.
556 (output_operand_type): Likewise.
557 * i386-init.h: Regenerated.
558 * i386-tbl.h: Likewise.
559
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5602014-02-12 Ilya Tocar <ilya.tocar@intel.com>
561
562 * i386-dis.c (MOD enum): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4,
563 MOD_0FC7_REG_5.
564 (PREFIX enum): Add PREFIX_0FAE_REG_7.
565 (reg_table): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4 MOD_0FC7_REG_5.
566 (prefix_table): Add clflusopt.
567 (mod_table): Add xrstors, xsavec, xsaves.
568 * i386-gen.c (cpu_flag_init): Add CPU_CLFLUSHOPT_FLAGS,
569 CPU_XSAVES_FLAGS, CPU_XSAVEC_FLAGS.
570 (cpu_flags): Add CpuClflushOpt, CpuXSAVES, CpuXSAVEC.
571 * i386-init.h: Regenerate.
572 * i386-opc.tbl: Add clflushopt, xrstors, xrstors64, xsaves,
573 xsaves64, xsavec, xsavec64.
574 * i386-tbl.h: Regenerate.
575
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5762014-02-10 Alan Modra <amodra@gmail.com>
577
578 * po/POTFILES.in: Regenerate.
579 * po/opcodes.pot: Regenerate.
580
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5812014-01-30 Michael Zolotukhin <michael.v.zolotukhin@gmail.com>
582 Jan Beulich <jbeulich@suse.com>
583
584 PR binutils/16490
585 * i386-dis.c (OP_E_memory): Fix shift computation for
586 vex_vsib_q_w_dq_mode.
587
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5882014-01-09 Bradley Nelson <bradnelson@google.com>
589 Roland McGrath <mcgrathr@google.com>
590
591 * i386-dis.c (print_insn): Do not touch all_prefixes[-1] when
592 last_rex_prefix is -1.
593
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5942014-01-08 H.J. Lu <hongjiu.lu@intel.com>
595
596 * i386-gen.c (process_copyright): Update copyright year to 2014.
597
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5982014-01-03 Maciej W. Rozycki <macro@codesourcery.com>
599
600 * nds32-asm.c (parse_operand): Fix out-of-range integer constant.
601
5fb776a6 602For older changes see ChangeLog-2013
252b5132 603\f
5fb776a6 604Copyright (C) 2014 Free Software Foundation, Inc.
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605
606Copying and distribution of this file, with or without modification,
607are permitted in any medium without royalty provided the copyright
608notice and this notice are preserved.
609
252b5132 610Local Variables:
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611mode: change-log
612left-margin: 8
613fill-column: 74
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614version-control: never
615End:
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