arc: Add nps400 machine type, and assembler flag.
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
8699fc3e
AB
12016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
2
3 * arc-dis.c (print_insn_arc): Handle nps400.
4
24740d83
AB
52016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
6
7 * arc-opc.c (BASE): Delete.
8
8678914f
NC
92016-03-18 Nick Clifton <nickc@redhat.com>
10
11 PR target/19721
12 * aarch64-tbl.h (aarch64_opcode_table): Fix type of second operand
13 of MOV insn that aliases an ORR insn.
14
cc933301
JW
152016-03-16 Jiong Wang <jiong.wang@arm.com>
16
17 * arm-dis.c (neon_opcodes): Support new FP16 instructions.
18
f86f5863
TS
192016-03-07 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
20
21 * mcore-opc.h: Add const qualifiers.
22 * microblaze-opc.h (struct op_code_struct): Likewise.
23 * sh-opc.h: Likewise.
24 * tic4x-dis.c (tic4x_print_indirect): Likewise.
25 (tic4x_print_op): Likewise.
26
62de1c63
AM
272016-03-02 Alan Modra <amodra@gmail.com>
28
d11698cd 29 * or1k-desc.h: Regenerate.
62de1c63 30 * fr30-ibld.c: Regenerate.
c697cf0b 31 * rl78-decode.c: Regenerate.
62de1c63 32
020efce5
NC
332016-03-01 Nick Clifton <nickc@redhat.com>
34
35 PR target/19747
36 * rl78-dis.c (print_insn_rl78_common): Fix typo.
37
b0c11777
RL
382016-02-24 Renlin Li <renlin.li@arm.com>
39
40 * arm-dis.c (coprocessor_opcodes): Add fp16 instruction entries.
41 (print_insn_coprocessor): Support fp16 instructions.
42
3e309328
RL
432016-02-24 Renlin Li <renlin.li@arm.com>
44
45 * arm-dis.c (print_insn_coprocessor): Fix mask for vsel, vmaxnm,
46 vminnm, vrint(mpna).
47
8afc7bea
RL
482016-02-24 Renlin Li <renlin.li@arm.com>
49
50 * arm-dis.c (print_insn_coprocessor): Check co-processor number for
51 cpd/cpd2, mcr/mcr2, mrc/mrc2, ldc/ldc2, stc/stc2.
52
4fd7268a
L
532016-02-15 H.J. Lu <hongjiu.lu@intel.com>
54
55 * i386-dis.c (print_insn): Parenthesize expression to prevent
56 truncated addresses.
57 (OP_J): Likewise.
58
4670103e
CZ
592016-02-10 Claudiu Zissulescu <claziss@synopsys.com>
60 Janek van Oirschot <jvanoirs@synopsys.com>
61
62 * arc-opc.c (arc_relax_opcodes, arc_num_relax_opcodes): New
63 variable.
64
c1d9289f
NC
652016-02-04 Nick Clifton <nickc@redhat.com>
66
67 PR target/19561
68 * msp430-dis.c (print_insn_msp430): Add a special case for
69 decoding an RRC instruction with the ZC bit set in the extension
70 word.
71
a143b004
AB
722016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
73
74 * cgen-ibld.in (insert_normal): Rework calculation of shift.
75 * epiphany-ibld.c: Regenerate.
76 * fr30-ibld.c: Regenerate.
77 * frv-ibld.c: Regenerate.
78 * ip2k-ibld.c: Regenerate.
79 * iq2000-ibld.c: Regenerate.
80 * lm32-ibld.c: Regenerate.
81 * m32c-ibld.c: Regenerate.
82 * m32r-ibld.c: Regenerate.
83 * mep-ibld.c: Regenerate.
84 * mt-ibld.c: Regenerate.
85 * or1k-ibld.c: Regenerate.
86 * xc16x-ibld.c: Regenerate.
87 * xstormy16-ibld.c: Regenerate.
88
b89807c6
AB
892016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
90
91 * epiphany-dis.c: Regenerated from latest cpu files.
92
d8c823c8
MM
932016-02-01 Michael McConville <mmcco@mykolab.com>
94
95 * cgen-dis.c (count_decodable_bits): Use unsigned value for mask
96 test bit.
97
5bc5ae88
RL
982016-01-25 Renlin Li <renlin.li@arm.com>
99
100 * arm-dis.c (mapping_symbol_for_insn): New function.
101 (find_ifthen_state): Call mapping_symbol_for_insn().
102
0bff6e2d
MW
1032016-01-20 Matthew Wahab <matthew.wahab@arm.com>
104
105 * aarch64-opc.c (operand_general_constraint_met_p): Check validity
106 of MSR UAO immediate operand.
107
100b4f2e
MR
1082016-01-18 Maciej W. Rozycki <macro@imgtec.com>
109
110 * mips-dis.c (print_insn_micromips): Remove 48-bit microMIPS
111 instruction support.
112
5c14705f
AM
1132016-01-17 Alan Modra <amodra@gmail.com>
114
115 * configure: Regenerate.
116
4d82fe66
NC
1172016-01-14 Nick Clifton <nickc@redhat.com>
118
119 * rl78-decode.opc (rl78_decode_opcode): Add 's' operand to movw
120 instructions that can support stack pointer operations.
121 * rl78-decode.c: Regenerate.
122 * rl78-dis.c: Fix display of stack pointer in MOVW based
123 instructions.
124
651657fa
MW
1252016-01-14 Matthew Wahab <matthew.wahab@arm.com>
126
127 * aarch64-opc.c (aarch64_sys_reg_supported_p): Merge conditionals
128 testing for RAS support. Add checks for erxfr_el1, erxctlr_el1,
129 erxtatus_el1 and erxaddr_el1.
130
105bde57
MW
1312016-01-12 Matthew Wahab <matthew.wahab@arm.com>
132
133 * arm-dis.c (arm_opcodes): Add "esb".
134 (thumb_opcodes): Likewise.
135
afa8d405
PB
1362016-01-11 Peter Bergner <bergner@vnet.ibm.com>
137
138 * ppc-opc.c <xscmpnedp>: Delete.
139 <xvcmpnedp>: Likewise.
140 <xvcmpnedp.>: Likewise.
141 <xvcmpnesp>: Likewise.
142 <xvcmpnesp.>: Likewise.
143
83c3256e
AS
1442016-01-08 Andreas Schwab <schwab@linux-m68k.org>
145
146 PR gas/13050
147 * m68k-opc.c (moveb, movew): For ISA_B/C only allow #,d(An) in
148 addition to ISA_A.
149
6f2750fe
AM
1502016-01-01 Alan Modra <amodra@gmail.com>
151
152 Update year range in copyright notice of all files.
153
3499769a
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154For older changes see ChangeLog-2015
155\f
156Copyright (C) 2016 Free Software Foundation, Inc.
157
158Copying and distribution of this file, with or without modification,
159are permitted in any medium without royalty provided the copyright
160notice and this notice are preserved.
161
162Local Variables:
163mode: change-log
164left-margin: 8
165fill-column: 74
166version-control: never
167End:
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