Commit | Line | Data |
---|---|---|
8ddf6b2a CZ |
1 | 2016-04-05 Claudiu Zissulescu <claziss@synopsys.com> |
2 | ||
3 | * arc-regs.h: Add a new subclass field. Add double assist | |
4 | accumulator register values. | |
5 | * arc-tbl.h: Use DPA subclass to mark the double assist | |
6 | instructions. Use DPX/SPX subclas to mark the FPX instructions. | |
7 | * arc-opc.c (RSP): Define instead of SP. | |
8 | (arc_aux_regs): Add the subclass field. | |
9 | ||
589a7d88 JW |
10 | 2016-04-05 Jiong Wang <jiong.wang@arm.com> |
11 | ||
12 | * arm-dis.c: Support FP16 vmul, vmla, vmls (by scalar). | |
13 | ||
0a191de9 | 14 | 2016-03-31 Andrew Burgess <andrew.burgess@embecosm.com> |
2cce10e7 AB |
15 | |
16 | * arc-opc.c (arc_operands): Fix operand flags for NPS_R_DST, and | |
17 | NPS_R_SRC1. | |
18 | ||
0a106562 AB |
19 | 2016-03-30 Andrew Burgess <andrew.burgess@embecosm.com> |
20 | ||
21 | * arc-nps400-tbl.h: Add a header comment, and fix some whitespace | |
22 | issues. No functional changes. | |
23 | ||
bd05ac5f CZ |
24 | 2016-03-30 Claudiu Zissulescu <claziss@synopsys.com> |
25 | ||
26 | * arc-regs.h (IC_RAM_ADDRESS, IC_TAG, IC_WP, IC_DATA, CONTROL0) | |
27 | (AX2, AY2, MX2, MY2, AY0, AY1, DC_RAM_ADDR, DC_TAG, CONTROL1) | |
28 | (RTT): Remove duplicate. | |
29 | (LCDINSTR, LCDDATA, LCDSTAT, CC_*, PCT_COUNT*, PCT_SNAP*) | |
30 | (PCT_CONFIG*): Remove. | |
31 | (D1L, D1H, D2H, D2L): Define. | |
32 | ||
9885948f CZ |
33 | 2016-03-29 Claudiu Zissulescu <claziss@synopsys.com> |
34 | ||
35 | * arc-ext-tbl.h (dsp_fp_i2flt): Fix typo. | |
36 | ||
f2dd8838 CZ |
37 | 2016-03-29 Claudiu Zissulescu <claziss@synopsys.com> |
38 | ||
39 | * arc-tbl.h (invld07): Remove. | |
40 | * arc-ext-tbl.h: New file. | |
41 | * arc-dis.c (FIELDA, FIELDB, FIELDC): Remove. | |
42 | * arc-opc.c (arc_opcodes): Add ext-tbl include. | |
43 | ||
0d2f91fe JK |
44 | 2016-03-24 Jan Kratochvil <jan.kratochvil@redhat.com> |
45 | ||
46 | Fix -Wstack-usage warnings. | |
47 | * aarch64-dis.c (print_operands): Substitute size. | |
48 | * aarch64-opc.c (print_register_offset_address): Substitute tblen. | |
49 | ||
a6b71f42 JM |
50 | 2016-03-22 Jose E. Marchesi <jose.marchesi@oracle.com> |
51 | ||
52 | * sparc-opc.c (sparc_opcodes): Reorder entries for `rd' in order | |
53 | to get a proper diagnostic when an invalid ASR register is used. | |
54 | ||
9780e045 NC |
55 | 2016-03-22 Nick Clifton <nickc@redhat.com> |
56 | ||
57 | * configure: Regenerate. | |
58 | ||
e23e8ebe AB |
59 | 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com> |
60 | ||
61 | * arc-nps400-tbl.h: New file. | |
62 | * arc-opc.c: Add top level comment. | |
63 | (insert_nps_3bit_dst): New function. | |
64 | (extract_nps_3bit_dst): New function. | |
65 | (insert_nps_3bit_src2): New function. | |
66 | (extract_nps_3bit_src2): New function. | |
67 | (insert_nps_bitop_size): New function. | |
68 | (extract_nps_bitop_size): New function. | |
69 | (arc_flag_operands): Add nps400 entries. | |
70 | (arc_flag_classes): Add nps400 entries. | |
71 | (arc_operands): Add nps400 entries. | |
72 | (arc_opcodes): Add nps400 include. | |
73 | ||
1ae8ab47 AB |
74 | 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com> |
75 | ||
76 | * arc-opc.c (arc_flag_classes): Convert all flag classes to use | |
77 | the new class enum values. | |
78 | ||
8699fc3e AB |
79 | 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com> |
80 | ||
81 | * arc-dis.c (print_insn_arc): Handle nps400. | |
82 | ||
24740d83 AB |
83 | 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com> |
84 | ||
85 | * arc-opc.c (BASE): Delete. | |
86 | ||
8678914f NC |
87 | 2016-03-18 Nick Clifton <nickc@redhat.com> |
88 | ||
89 | PR target/19721 | |
90 | * aarch64-tbl.h (aarch64_opcode_table): Fix type of second operand | |
91 | of MOV insn that aliases an ORR insn. | |
92 | ||
cc933301 JW |
93 | 2016-03-16 Jiong Wang <jiong.wang@arm.com> |
94 | ||
95 | * arm-dis.c (neon_opcodes): Support new FP16 instructions. | |
96 | ||
f86f5863 TS |
97 | 2016-03-07 Trevor Saunders <tbsaunde+binutils@tbsaunde.org> |
98 | ||
99 | * mcore-opc.h: Add const qualifiers. | |
100 | * microblaze-opc.h (struct op_code_struct): Likewise. | |
101 | * sh-opc.h: Likewise. | |
102 | * tic4x-dis.c (tic4x_print_indirect): Likewise. | |
103 | (tic4x_print_op): Likewise. | |
104 | ||
62de1c63 AM |
105 | 2016-03-02 Alan Modra <amodra@gmail.com> |
106 | ||
d11698cd | 107 | * or1k-desc.h: Regenerate. |
62de1c63 | 108 | * fr30-ibld.c: Regenerate. |
c697cf0b | 109 | * rl78-decode.c: Regenerate. |
62de1c63 | 110 | |
020efce5 NC |
111 | 2016-03-01 Nick Clifton <nickc@redhat.com> |
112 | ||
113 | PR target/19747 | |
114 | * rl78-dis.c (print_insn_rl78_common): Fix typo. | |
115 | ||
b0c11777 RL |
116 | 2016-02-24 Renlin Li <renlin.li@arm.com> |
117 | ||
118 | * arm-dis.c (coprocessor_opcodes): Add fp16 instruction entries. | |
119 | (print_insn_coprocessor): Support fp16 instructions. | |
120 | ||
3e309328 RL |
121 | 2016-02-24 Renlin Li <renlin.li@arm.com> |
122 | ||
123 | * arm-dis.c (print_insn_coprocessor): Fix mask for vsel, vmaxnm, | |
124 | vminnm, vrint(mpna). | |
125 | ||
8afc7bea RL |
126 | 2016-02-24 Renlin Li <renlin.li@arm.com> |
127 | ||
128 | * arm-dis.c (print_insn_coprocessor): Check co-processor number for | |
129 | cpd/cpd2, mcr/mcr2, mrc/mrc2, ldc/ldc2, stc/stc2. | |
130 | ||
4fd7268a L |
131 | 2016-02-15 H.J. Lu <hongjiu.lu@intel.com> |
132 | ||
133 | * i386-dis.c (print_insn): Parenthesize expression to prevent | |
134 | truncated addresses. | |
135 | (OP_J): Likewise. | |
136 | ||
4670103e CZ |
137 | 2016-02-10 Claudiu Zissulescu <claziss@synopsys.com> |
138 | Janek van Oirschot <jvanoirs@synopsys.com> | |
139 | ||
140 | * arc-opc.c (arc_relax_opcodes, arc_num_relax_opcodes): New | |
141 | variable. | |
142 | ||
c1d9289f NC |
143 | 2016-02-04 Nick Clifton <nickc@redhat.com> |
144 | ||
145 | PR target/19561 | |
146 | * msp430-dis.c (print_insn_msp430): Add a special case for | |
147 | decoding an RRC instruction with the ZC bit set in the extension | |
148 | word. | |
149 | ||
a143b004 AB |
150 | 2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com> |
151 | ||
152 | * cgen-ibld.in (insert_normal): Rework calculation of shift. | |
153 | * epiphany-ibld.c: Regenerate. | |
154 | * fr30-ibld.c: Regenerate. | |
155 | * frv-ibld.c: Regenerate. | |
156 | * ip2k-ibld.c: Regenerate. | |
157 | * iq2000-ibld.c: Regenerate. | |
158 | * lm32-ibld.c: Regenerate. | |
159 | * m32c-ibld.c: Regenerate. | |
160 | * m32r-ibld.c: Regenerate. | |
161 | * mep-ibld.c: Regenerate. | |
162 | * mt-ibld.c: Regenerate. | |
163 | * or1k-ibld.c: Regenerate. | |
164 | * xc16x-ibld.c: Regenerate. | |
165 | * xstormy16-ibld.c: Regenerate. | |
166 | ||
b89807c6 AB |
167 | 2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com> |
168 | ||
169 | * epiphany-dis.c: Regenerated from latest cpu files. | |
170 | ||
d8c823c8 MM |
171 | 2016-02-01 Michael McConville <mmcco@mykolab.com> |
172 | ||
173 | * cgen-dis.c (count_decodable_bits): Use unsigned value for mask | |
174 | test bit. | |
175 | ||
5bc5ae88 RL |
176 | 2016-01-25 Renlin Li <renlin.li@arm.com> |
177 | ||
178 | * arm-dis.c (mapping_symbol_for_insn): New function. | |
179 | (find_ifthen_state): Call mapping_symbol_for_insn(). | |
180 | ||
0bff6e2d MW |
181 | 2016-01-20 Matthew Wahab <matthew.wahab@arm.com> |
182 | ||
183 | * aarch64-opc.c (operand_general_constraint_met_p): Check validity | |
184 | of MSR UAO immediate operand. | |
185 | ||
100b4f2e MR |
186 | 2016-01-18 Maciej W. Rozycki <macro@imgtec.com> |
187 | ||
188 | * mips-dis.c (print_insn_micromips): Remove 48-bit microMIPS | |
189 | instruction support. | |
190 | ||
5c14705f AM |
191 | 2016-01-17 Alan Modra <amodra@gmail.com> |
192 | ||
193 | * configure: Regenerate. | |
194 | ||
4d82fe66 NC |
195 | 2016-01-14 Nick Clifton <nickc@redhat.com> |
196 | ||
197 | * rl78-decode.opc (rl78_decode_opcode): Add 's' operand to movw | |
198 | instructions that can support stack pointer operations. | |
199 | * rl78-decode.c: Regenerate. | |
200 | * rl78-dis.c: Fix display of stack pointer in MOVW based | |
201 | instructions. | |
202 | ||
651657fa MW |
203 | 2016-01-14 Matthew Wahab <matthew.wahab@arm.com> |
204 | ||
205 | * aarch64-opc.c (aarch64_sys_reg_supported_p): Merge conditionals | |
206 | testing for RAS support. Add checks for erxfr_el1, erxctlr_el1, | |
207 | erxtatus_el1 and erxaddr_el1. | |
208 | ||
105bde57 MW |
209 | 2016-01-12 Matthew Wahab <matthew.wahab@arm.com> |
210 | ||
211 | * arm-dis.c (arm_opcodes): Add "esb". | |
212 | (thumb_opcodes): Likewise. | |
213 | ||
afa8d405 PB |
214 | 2016-01-11 Peter Bergner <bergner@vnet.ibm.com> |
215 | ||
216 | * ppc-opc.c <xscmpnedp>: Delete. | |
217 | <xvcmpnedp>: Likewise. | |
218 | <xvcmpnedp.>: Likewise. | |
219 | <xvcmpnesp>: Likewise. | |
220 | <xvcmpnesp.>: Likewise. | |
221 | ||
83c3256e AS |
222 | 2016-01-08 Andreas Schwab <schwab@linux-m68k.org> |
223 | ||
224 | PR gas/13050 | |
225 | * m68k-opc.c (moveb, movew): For ISA_B/C only allow #,d(An) in | |
226 | addition to ISA_A. | |
227 | ||
6f2750fe AM |
228 | 2016-01-01 Alan Modra <amodra@gmail.com> |
229 | ||
230 | Update year range in copyright notice of all files. | |
231 | ||
3499769a AM |
232 | For older changes see ChangeLog-2015 |
233 | \f | |
234 | Copyright (C) 2016 Free Software Foundation, Inc. | |
235 | ||
236 | Copying and distribution of this file, with or without modification, | |
237 | are permitted in any medium without royalty provided the copyright | |
238 | notice and this notice are preserved. | |
239 | ||
240 | Local Variables: | |
241 | mode: change-log | |
242 | left-margin: 8 | |
243 | fill-column: 74 | |
244 | version-control: never | |
245 | End: |