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* scripttempl/elfxtensa.sc: Merge changes from elf.sc.
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
9344ff29
L		 12007-05-01 H.J. Lu <hongjiu.lu@intel.com>
2
3 * i386-dis.c (CRC32_Fixup): Properly handle Intel mode and
4 check data size prefix in 16bit mode.
5
6 * i386-opc.c (i386_optab): Default crc32 to non-8bit and
7 support Intel mode.
8
53289dcd
MS		 92007-04-30 Mark Salter <msalter@redhat.com>
10
11 * frv-desc.c: Regenerate.
12 * frv-desc.h: Regenerate.
13
eb42fac1
AM		 142007-04-30 Alan Modra <amodra@bigpond.net.au>
15
16 PR 4436
17 * ppc-opc.c (powerpc_operands): Correct bitm for second entry of MBE.
18
484c222e
L		 192007-04-27 H.J. Lu <hongjiu.lu@intel.com>
20
21 * i386-dis.c (modrm): Put reg before rm.
22
5d669648
L		 232007-04-26 H.J. Lu <hongjiu.lu@intel.com>
24
25 PR binutils/4430
26 * i386-dis.c (print_displacement): New.
27 (OP_E): Call print_displacement instead of print_operand_value
28 to output displacement when either base or index exist. Print
29 the explicit zero displacement in 16bit mode.
30
185b1163
L		 312007-04-26 H.J. Lu <hongjiu.lu@intel.com>
32
33 PR binutils/4429
34 * i386-dis.c (print_insn): Also swap the order of op_riprel
35 when swapping op_index. Break when the RIP relative address
36 is printed.
37 (OP_E): Properly handle RIP relative addressing and print the
38 explicit zero displacement for Intel mode.
39
eddc20ad
AM		 402007-04-27 Alan Modra <amodra@bigpond.net.au>
41
42 * Makefile.am: Run "make dep-am".
43 * Makefile.in: Regenerate.
44 * ns32k-dis.c: Include sysdep.h first.
45
dacc8b01
MS		 462007-04-24 Andreas Krebbel <krebbel1@de.ibm.com>
47
48 * opcodes/s390-opc.c (MASK_SSF_RRDRD): Fourth nybble belongs to the
49 opcode.
eddc20ad
AM		 50 * opcodes/s390-opc.txt (pfpo, ectg, csst): Add new z9-ec instructions.
51
fbb92301
NC		 522007-04-24 Nick Clifton <nickc@redhat.com>
53
54 * arm-dis.c (print_insn): Initialise type.
55
4c273957
AM		 562007-04-24 Alan Modra <amodra@bigpond.net.au>
57
58 * cgen-types.h: Include bfd_stdint.h, not stdint.h.
59 * Makefile.am: Run "make dep-am".
60 * Makefile.in: Regenerate.
61
9a2e615a
NS		 622007-04-23 Nathan Sidwell <nathan@codesourcery.com>
63
64 * m68k-opc.c: Mark mcfisa_c instructions.
65
37b37b2d
RE		 662007-04-21 Richard Earnshaw <rearnsha@arm.com>
67
68 * arm-dis.c (arm_opcodes): Disassemble to unified syntax.
69 (thumb_opcodes): Add missing white space in adr.
70 (arm_decode_shift): New parameter, print_shift. Only decode the
71 shift parameter if set. Adjust callers.
72 (print_insn_arm): Support for operand type q with no shift decode.
73
717bbdf1
AM		 742007-04-21 Alan Modra <amodra@bigpond.net.au>
75
db557034
AM		 76 * i386-opc.c (i386_float_regtab, i386_float_regtab_size): Delete.
77 Move contents to..
78 (i386_regtab): ..here.
79 * i386-opc.h (i386_float_regtab, i386_float_regtab_size): Delete.
80
717bbdf1
AM		 81 * ppc-opc.c (powerpc_operands): Delete duplicate entries.
82 (BA_MASK, FXM_MASK, STRM_MASK, VA_MASK, VB_MASK, VC_MASK): Delete.
83 (VD_MASK, WS_MASK, MTMSRD_L, XRT_L): Delete.
84 (powerpc_opcodes): Replace uses of MTMSRD_L and XRT_L.
85
78336706
NS		 862007-04-20 Nathan Sidwell <nathan@codesourcery.com>
87
88 * m68k-dis.c (print_insn_arg): Show c04 as rambar0 and c05 as
89 rambar1.
90
b84bf58a
AM		 912007-04-20 Alan Modra <amodra@bigpond.net.au>
92
93 * ppc-dis.c (print_insn_powerpc): Adjust for struct powerpc_operand
94 change.
95 * ppc-opc.c (powerpc_operands): Replace bit count with bit mask
96 in all entries. Add PPC_OPERAND_SIGNED to DE entry. Remove
97 references to following deleted functions.
98 (insert_bd, extract_bd, insert_dq, extract_dq): Delete.
99 (insert_ds, extract_ds, insert_de, extract_de): Delete.
100 (insert_des, extract_des, insert_li, extract_li): Delete.
101 (insert_nb, insert_rsq, insert_rtq, insert_ev2, extract_ev2): Delete.
102 (insert_ev4, extract_ev4, insert_ev8, extract_ev8): Delete.
103 (num_powerpc_operands): New constant.
104 (XSPRG_MASK): Remove entire SPRG field.
105 (powerpc_opcodes <bcctre, bcctrel>): Use XLBB_MASK not XLYBB_MASK.
106
0bbdef92
AM		 1072007-04-20 Alan Modra <amodra@bigpond.net.au>
108
109 * ppc-opc.c (DCM, DGM, TE, RMC, R, SP, S): Correct shift.
110 (Z2_MASK): Define.
111 (powerpc_opcodes): Use Z2_MASK in all insns taking RMC operand.
112
86ad2a13
RE		 1132007-04-20 Richard Earnshaw <rearnsha@arm.com>
114
115 * arm-dis.c (print_insn): Only look for a mapping symbol in the section
116 being disassembled.
117
a33e055d
AM		 1182007-04-19 Alan Modra <amodra@bigpond.net.au>
119
120 * Makefile.am: Run "make dep-am".
121 * Makefile.in: Regenerate.
122 * po/POTFILES.in: Regenerate.
123
360b1600
AM		 1242007-04-19 Alan Modra <amodra@bigpond.net.au>
125
126 * ppc-opc.c (powerpc_opcodes): Add cctpl, cctpm, cctph, db8cyc,
127 db10cyc, db12cyc, db16cyc.
128
b20ae55e
AM		 1292007-04-19 Nathan Froyd <froydnj@codesourcery.com>
130
131 * ppc-opc.c (powerpc_opcodes): Recognize three-operand tlbsxe.
132
381d071f
L		 1332007-04-18 H.J. Lu <hongjiu.lu@intel.com>
134
135 * i386-dis.c (CRC32_Fixup): New.
136 (PREGRP85, PREGRP86, PREGRP87, PREGRP88, PREGRP89, PREGRP90,
137 PREGRP91): New.
138 (threebyte_0x38_uses_DATA_prefix): Updated for SSE4.2.
139 (threebyte_0x3a_uses_DATA_prefix): Likewise.
140 (prefix_user_table): Add PREGRP85, PREGRP86, PREGRP87,
141 PREGRP88, PREGRP89, PREGRP90 and PREGRP91.
142 (three_byte_table): Likewise.
143
144 * i386-opc.c (i386_optab): Add SSE4.2 opcodes.
145
f6fdceb7 146 * i386-opc.h (CpuSSE4_2): New.
381d071f
L		 147 (CpuSSE4): Likewise.
148 (CpuUnknownFlags): Add CpuSSE4_2.
149
42903f7f
L		 1502007-04-18 H.J. Lu <hongjiu.lu@intel.com>
151
152 * i386-dis.c (XMM_Fixup): New.
153 (Edqb): New.
154 (Edqd): New.
155 (XMM0): New.
156 (dqb_mode): New.
157 (dqd_mode): New.
158 (PREGRP39 ... PREGRP85): New.
159 (threebyte_0x38_uses_DATA_prefix): Updated for SSE4.
160 (threebyte_0x3a_uses_DATA_prefix): Likewise.
161 (prefix_user_table): Add PREGRP39 ... PREGRP85.
162 (three_byte_table): Likewise.
163 (putop): Handle 'K'.
164 (intel_operand_size): Handle dqb_mode, dqd_mode):
165 (OP_E): Likewise.
166 (OP_G): Likewise.
167
168 * i386-opc.c (i386_optab): Add SSE4.1 opcodes.
169
170 * i386-opc.h (CpuSSE4_1): New.
171 (CpuUnknownFlags): Add CpuSSE4_1.
172 (regKludge): Update comment.
173
ee5c21a0
DJ		 1742007-04-18 Matthias Klose <doko@ubuntu.com>
175
176 * Makefile.am (libopcodes_la_LDFLAGS): Use bfd soversion.
177 * Makefile.in: Regenerate.
178
b7d19ba6
SE		 1792007-04-14 Steve Ellcey <sje@cup.hp.com>
180
181 * Makefile.am: Add ACLOCAL_AMFLAGS.
182 * Makefile.in: Regenerate.
183
246c51aa
L		 1842007-04-13 H.J. Lu <hongjiu.lu@intel.com>
185
186 * i386-dis.c: Remove trailing white spaces.
6e26e51a
L		 187 * i386-opc.c: Likewise.
188 * i386-opc.h: Likewise.
246c51aa 189
7967e09e
L		 1902007-04-11 H.J. Lu <hongjiu.lu@intel.com>
191
192 PR binutils/4333
193 * i386-dis.c (GRP1a): New.
194 (GRP1b ... GRPPADLCK2): Update index.
195 (dis386): Use GRP1a for entry 0x8f.
196 (mod, rm, reg): Removed. Replaced by ...
197 (modrm): This.
198 (grps): Add GRP1a.
199
56dc1f8a
KH		 2002007-04-09 Kazu Hirata <kazu@codesourcery.com>
201
202 * m68k-dis.c (print_insn_m68k): Restore info->fprintf_func and
203 info->print_address_func if longjmp is called.
204
144f4bc6
DD		 2052007-03-29 DJ Delorie <dj@redhat.com>
206
207 * m32c-desc.c: Regenerate.
208 * m32c-dis.c: Regenerate.
209 * m32c-opc.c: Regenerate.
210
e72cf3ec
L		 2112007-03-28 H.J. Lu <hongjiu.lu@intel.com>
212
213 * i386-opc.c (i386_optab): Change InvMem to RegMem for mov and
214 movq. Remove InvMem from sldt, smsw and str.
215
216 * i386-opc.h (InvMem): Renamed to ...
217 (RegMem): Update comments.
218 (AnyMem): Remove InvMem.
219
831480e9 2202007-03-27 Paul Brook <paul@codesourcery.com>
b74ed8f5 221
b74ed8f5
PB		 222 * arm-dis.c (thumb_opcodes): Add entry for undefined insns (0xbe??).
223
4146fd53
PB		 2242007-03-24 Paul Brook <paul@codesourcery.com>
225
226 * arm-dis.c (coprocessor_opcodes): Remove superfluous 0x.
227 (print_insn_coprocessor): Handle %<bitfield>x.
228
b6702015 2292007-03-24 Paul Brook <paul@codesourcery.com>
e72cf3ec 230 Mark Shinwell <shinwell@codesourcery.com>
b6702015
PB		 231
232 * arm-dis.c (arm_opcodes): Print SRS base register.
233
831480e9 2342007-03-23 H.J. Lu <hongjiu.lu@intel.com>
0003779b
L		 235
236 * i386-dis.c (prefix_name): Replace rex64XYZ with rex.WRXB.
237
238 * i386-opc.c (i386_optab): Add rex.wrxb.
239
831480e9 2402007-03-21 H.J. Lu <hongjiu.lu@intel.com>
161a04f6
L		 241
242 * i386-dis.c (REX_MODE64): Remove definition.
243 (REX_EXTX): Likewise.
244 (REX_EXTY): Likewise.
245 (REX_EXTZ): Likewise.
246 (USED_REX): Use REX_OPCODE instead of 0x40.
247 Replace REX_MODE64, REX_EXTX, REX_EXTY and REX_EXTZ with REX_W,
248 REX_R, REX_X and REX_B respectively.
249
831480e9 2502007-03-21 H.J. Lu <hongjiu.lu@intel.com>
8b38ad71
L		 251
252 PR binutils/4218
253 * i386-dis.c (PREGRP38): New.
254 (dis386): Use PREGRP38 for 0x90.
255 (prefix_user_table): Add PREGRP38.
256 (print_insn): Set uses_REPZ_prefix to 1 for pause.
257 (NOP_Fixup1): Properly handle REX bits.
258 (NOP_Fixup2): Likewise.
259
260 * i386-opc.c (i386_optab): Allow %eax with xchg in 64bit.
261 Allow register with nop.
262
75b06e7b
DD		 2632007-03-20 DJ Delorie <dj@redhat.com>
264
265 * m32c-asm.c: Regenerate.
266 * m32c-desc.c: Regenerate.
267 * m32c-desc.h: Regenerate.
268 * m32c-dis.h: Regenerate.
269 * m32c-ibld.c: Regenerate.
270 * m32c-opc.c: Regenerate.
271 * m32c-opc.h: Regenerate.
272
c3fe08fa
L		 2732007-03-15 H.J. Lu <hongjiu.lu@intel.com>
274
275 * i386-opc.c: Include "libiberty.h".
276 (i386_regtab): Remove the last entry.
277 (i386_regtab_size): New.
278 (i386_float_regtab_size): Likewise.
279
280 * i386-opc.h (i386_regtab_size): New.
281 (i386_float_regtab_size): Likewise.
282
0b1cf022
L		 2832007-03-15 H.J. Lu <hongjiu.lu@intel.com>
284
285 * Makefile.am (CFILES): Add i386-opc.c.
286 (ALL_MACHINES): Add i386-opc.lo.
287 Run "make dep-am".
288 * Makefile.in: Regenerated.
289
290 * configure.in: Add i386-opc.lo for bfd_i386_arch.
291 * configure: Regenerated.
292
293 * i386-dis.c: Include "opcode/i386.h".
294 (MAXLEN): Renamed to MAX_MNEM_SIZE. Remove definition.
295 (FWAIT_OPCODE): Remove definition.
296 (UNIXWARE_COMPAT): Renamed to SYSV386_COMPAT. Remove definition.
297 (MAX_OPERANDS): Remove definition.
298
299 * i386-opc.c: New file.
300 * i386-opc.h: Likewise.
301
56eced12
L		 3022007-03-15 H.J. Lu <hongjiu.lu@intel.com>
303
304 * Makefile.in: Regenerated.
305
6f74c397
L		 3062007-03-09 H.J. Lu <hongjiu.lu@intel.com>
307
308 * i386-dis.c (OP_Rd): Renamed to ...
309 (OP_R): This.
310 (Rd): Updated.
311 (Rm): Likewise.
312
a6d04ec4
AM		 3132007-03-08 Alan Modra <amodra@bigpond.net.au>
314
1620f33d
AM		 315 * fr30-asm.c: Regenerate.
316 * frv-asm.c: Regenerate.
317 * ip2k-asm.c: Regenerate.
318 * iq2000-asm.c: Regenerate.
319 * m32c-asm.c: Regenerate.
320 * m32r-asm.c: Regenerate.
321 * m32r-dis.c: Regenerate.
322 * mt-asm.c: Regenerate.
323 * mt-ibld.c: Regenerate.
324 * mt-opc.c: Regenerate.
325 * openrisc-asm.c: Regenerate.
326 * xc16x-asm.c: Regenerate.
327 * xstormy16-asm.c: Regenerate.
328
a6d04ec4
AM		 329 * Makefile.am: Run "make dep-am".
330 * Makefile.in: Regenerate.
331 * po/POTFILES.in: Regenerate.
332
b5639b37
MS		 3332007-03-06 Andreas Krebbel <krebbel1@de.ibm.com>
334
335 * opcodes/s390-opc.c (INSTR_RRE_FR, INSTR_RRF_F0FF2, INSTR_RRF_F0FR,
336 INSTR_RRF_UUFF, INSTR_RRF_0UFF, INSTR_RRF_FFFU, INSTR_RRR_F0FF): New
337 instruction formats added.
338 (MASK_RRE_FR, MASK_RRF_F0FF2, MASK_RRF_F0FR, MASK_RRF_UUFF,
339 MASK_RRF_0UFF, MASK_RRF_FFFU, MASK_RRR_F0FF): New instruction format
340 masks added.
341 * opcodes/s390-opc.txt (lpdfr - tgxt): Decimal floating point
342 instructions added.
343 * opcodes/s390-mkopc.c (s390_opcode_cpu_val): S390_OPCODE_Z9_EC added.
344 (main): z9-ec cpu type option added.
345 * include/opcode/s390.h (s390_opcode_cpu_val): S390_OPCODE_Z9_EC added.
346
b2e818b7
DD		 3472007-02-22 DJ Delorie <dj@redhat.com>
348
349 * s390-opc.c (INSTR_SS_L2RDRD): New.
350 (MASK_SS_L2RDRD): New.
351 * s390-opc.txt (pka): Use it.
352
8b082fb1
TS		 3532007-02-20 Thiemo Seufer <ths@mips.com>
354 Chao-Ying Fu <fu@mips.com>
355
356 * mips-dis.c (mips_arch_choices): Add DSP R2 support.
357 (print_insn_args): Add support for balign instruction.
358 * mips-opc.c (D33): New shortcut for DSP R2 instructions.
359 (mips_builtin_opcodes): Add DSP R2 instructions.
360
929e4d1a
MS		 3612007-02-19 Andreas Krebbel <krebbel1@de.ibm.com>
362
363 * s390-opc.c (INSTR_RRF_U0FR, MASK_RRF_U0FR): Removed.
364 (INSTR_RRF_U0RF, MASK_RRF_U0RF): Added.
365 * s390-opc.txt (cfxbr, cfdbr, cfebr, cgebr, cgdbr, cgxbr, cger, cgdr,
366 cgxr, cfxr, cfdr, cfer): Instruction type set to INSTR_RRF_U0RF.
367
b8e55848
MS		 3682007-02-19 Andreas Krebbel <krebbel1@de.ibm.com>
369
370 * s390-opc.txt ("efpc", "sfpc"): Set to RRE_RR_OPT instruction type.
371 * s390-opc.c (s390_operands): Add RO_28 as optional gpr.
372 (INSTR_RRE_RR_OPT, MASK_RRE_RR_OPT): New instruction type for efpc
373 and sfpc.
374
af692060
NC		 3752007-02-16 Nick Clifton <nickc@redhat.com>
376
377 PR binutils/4045
378 * avr-dis.c (comment_start): New variable, contains the prefix to
379 use when printing addresses in comments.
380 (print_insn_avr): Set comment_start to an empty space if there is
381 no symbol table available as the generic address printing code
382 will prefix the numeric value of the address with 0x.
383
ce518a5f
L		 3842007-02-13 H.J. Lu <hongjiu.lu@intel.com>
385
386 * i386-dis.c: Updated to use an array of MAX_OPERANDS operands
387 in struct dis386.
388
bd2f2e55 3892007-02-05 Dave Brolley <brolley@redhat.com>
8c9c183d
DB		 390 Richard Sandiford <rsandifo@redhat.com>
391 DJ Delorie <dj@redhat.com>
392 Graydon Hoare <graydon@redhat.com>
393 Frank Ch. Eigler <fche@redhat.com>
394 Ben Elliston <bje@redhat.com>
395
396 * Makefile.am (HFILES): Add mep-desc.h mep-opc.h.
397 (CFILES): Add mep-*.c
398 (ALL_MACHINES): Add mep-*.lo.
399 (CLEANFILES): Add stamp-mep.
400 (CGEN_CPUS): Add mep.
401 (MEP_DEPS): New variable.
402 (mep-*): New targets.
403 * configure.in: Handle bfd_mep_arch.
404 * disassemble.c (ARCH_mep): New macro.
405 (disassembler): Handle bfd_arch_mep.
406 (disassemble_init_for_target): Likewise.
407 * mep-*: New files for Toshiba Media Processor (MeP).
bd2f2e55
DB		 408 * Makefile.in: Regenerated.
409 * configure: Regenerated.
410
eb7834a6 4112007-02-05 H.J. Lu <hongjiu.lu@intel.com>
65ca155d
L		 412
413 * i386-dis.c (OP_J): Undo the last change. Properly handle 64K
414 wrap around within the same segment in 16bit mode.
415
eb7834a6 4162007-02-02 H.J. Lu <hongjiu.lu@intel.com>
206717e8
L		 417
418 * i386-dis.c (OP_J): Mask to 16bit only if there is a data16
419 prefix.
420
c4f5c3d7
L		 4212007-02-02 H.J. Lu <hongjiu.lu@intel.com>
422
423 * avr-dis.c (avr_operand): Correct PR number in comment.
424
fc523535 4252007-02-02 H.J. Lu <hongjiu.lu@intel.com>
f59a29b9
L		 426
427 * disassemble.c (disassembler_usage): Call
428 print_i386_disassembler_options for i386 disassembler.
429
430 * i386-dis.c (print_i386_disassembler_options): New.
431 (print_insn): Support the new addr64 option.
432
64a3a6fc
NC		 4332007-02-02 Hiroki Kaminaga <kaminaga@sm.sony.co.jp>
434
435 * ppc-dis.c (powerpc_dialect): Handle ppc440.
436 * ppc-dis.c (print_ppc_disassembler_options): Note the -M440 can
437 be used.
438
ba4e851b
AM		 4392007-02-02 Alan Modra <amodra@bigpond.net.au>
440
441 * ppc-opc.c (insert_bdm): -Many comment.
442 (valid_bo): Add "extract" param. Accept both powerpc and power4
443 BO fields when disassembling with -Many.
444 (insert_bo, extract_bo, insert_boe, extract_boe): Adjust valid_bo call.
445
3bdcfdf4
KH		 4462007-01-08 Kazu Hirata <kazu@codesourcery.com>
447
448 * m68k-opc.c (m68k_opcodes): Replace cpu32 with
449 cpu32 | fido_a except on tbl instructions.
450
a028a6f5
PB		 4512007-01-04 Paul Brook <paul@codesourcery.com>
452
453 * arm-dis.c (arm_opcodes): Fix cpsie and cpsid entries.
454
baee4c9e
AS		 4552007-01-04 Andreas Schwab <schwab@suse.de>
456
457 * m68k-opc.c: Fix encoding of signed bit in the cpu32 tbls insns.
458
62ac925e
JB		 4592007-01-04 Julian Brown <julian@codesourcery.com>
460
461 * arm-dis.c (neon_opcode): Fix disassembly for vshl, vqshl, vrshl,
462 vqrshl instructions.
463
10a2343e 464For older changes see ChangeLog-2006
252b5132
RH		 465\f
466Local Variables:
2f6d2f85
NC		 467mode: change-log
468left-margin: 8
469fill-column: 74
252b5132
RH		 470version-control: never
471End:
GDB Binutils - Deliverables
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