bfd/
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
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12012-05-19 Alan Modra <amodra@gmail.com>
2
3 * ppc-dis.c: Don't include elf32-ppc.h, do include elf/ppc.h.
4 (get_powerpc_dialect): Detect VLE sections from ELF sh_flags.
5
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62012-05-18 Alan Modra <amodra@gmail.com>
7
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8 * ia64-opc.c: Remove #include "ansidecl.h".
9 * z8kgen.c: Include sysdep.h first.
10
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11 * arc-dis.c: Include sysdep.h first, remove some redundant includes.
12 * bfin-dis.c: Likewise.
13 * i860-dis.c: Likewise.
14 * ia64-dis.c: Likewise.
15 * ia64-gen.c: Likewise.
16 * m68hc11-dis.c: Likewise.
17 * mmix-dis.c: Likewise.
18 * msp430-dis.c: Likewise.
19 * or32-dis.c: Likewise.
20 * rl78-dis.c: Likewise.
21 * rx-dis.c: Likewise.
22 * tic4x-dis.c: Likewise.
23 * tilegx-opc.c: Likewise.
24 * tilepro-opc.c: Likewise.
25 * rx-decode.c: Regenerate.
26
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272012-05-17 James Lemke <jwlemke@codesourcery.com>
28
29 * ppc-opc.c (powerpc_macros): Add entries for e_extlwi to e_clrlslwi.
30
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312012-05-17 James Lemke <jwlemke@codesourcery.com>
32
33 * ppc-opc.c (extract_sprg): Use ALLOW8_SPRG to include VLE.
34
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352012-05-17 Daniel Richard G. <skunk@iskunk.org>
36 Nick Clifton <nickc@redhat.com>
37
38 PR 14072
39 * configure.in: Add check that sysdep.h has been included before
40 any system header files.
41 * configure: Regenerate.
42 * config.in: Regenerate.
43 * sysdep.h: Generate an error if included before config.h.
44 * alpha-opc.c: Include sysdep.h before any other header file.
45 * alpha-dis.c: Likewise.
46 * avr-dis.c: Likewise.
47 * cgen-opc.c: Likewise.
48 * cr16-dis.c: Likewise.
49 * cris-dis.c: Likewise.
50 * crx-dis.c: Likewise.
51 * d10v-dis.c: Likewise.
52 * d10v-opc.c: Likewise.
53 * d30v-dis.c: Likewise.
54 * d30v-opc.c: Likewise.
55 * h8500-dis.c: Likewise.
56 * i370-dis.c: Likewise.
57 * i370-opc.c: Likewise.
58 * m10200-dis.c: Likewise.
59 * m10300-dis.c: Likewise.
60 * micromips-opc.c: Likewise.
61 * mips-opc.c: Likewise.
62 * mips61-opc.c: Likewise.
63 * moxie-dis.c: Likewise.
64 * or32-opc.c: Likewise.
65 * pj-dis.c: Likewise.
66 * ppc-dis.c: Likewise.
67 * ppc-opc.c: Likewise.
68 * s390-dis.c: Likewise.
69 * sh-dis.c: Likewise.
70 * sh64-dis.c: Likewise.
71 * sparc-dis.c: Likewise.
72 * sparc-opc.c: Likewise.
73 * spu-dis.c: Likewise.
74 * tic30-dis.c: Likewise.
75 * tic54x-dis.c: Likewise.
76 * tic80-dis.c: Likewise.
77 * tic80-opc.c: Likewise.
78 * tilegx-dis.c: Likewise.
79 * tilepro-dis.c: Likewise.
80 * v850-dis.c: Likewise.
81 * v850-opc.c: Likewise.
82 * vax-dis.c: Likewise.
83 * w65-dis.c: Likewise.
84 * xgate-dis.c: Likewise.
85 * xtensa-dis.c: Likewise.
86 * rl78-decode.opc: Likewise.
87 * rl78-decode.c: Regenerate.
88 * rx-decode.opc: Likewise.
89 * rx-decode.c: Regenerate.
90
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912012-05-17 Alan Modra <amodra@gmail.com>
92
93 * ppc_dis.c: Don't include elf/ppc.h.
94
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952012-05-16 Meador Inge <meadori@codesourcery.com>
96
97 * arm-dis.c (arm_opcodes): Don't disassemble STMFD/LDMIA sp!, {reg}
98 to PUSH/POP {reg}.
99
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1002012-05-15 James Murray <jsm@jsm-net.demon.co.uk>
101 Stephane Carrez <stcarrez@nerim.fr>
102
103 * configure.in: Add S12X and XGATE co-processor support to m68hc11
104 target.
105 * disassemble.c: Likewise.
106 * configure: Regenerate.
107 * m68hc11-dis.c: Make objdump output more consistent, use hex
108 instead of decimal and use 0x prefix for hex.
109 * m68hc11-opc.c: Add S12X and XGATE opcodes.
110
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1112012-05-14 James Lemke <jwlemke@codesourcery.com>
112
113 * ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle.
114 (PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines.
115 (vle_opcd_indices): New array.
116 (lookup_vle): New function.
117 (disassemble_init_powerpc): Revise for second (VLE) opcode table.
118 (print_insn_powerpc): Likewise.
119 * ppc-opc.c: Likewise.
120
1212012-05-14 Catherine Moore <clm@codesourcery.com>
122 Maciej W. Rozycki <macro@codesourcery.com>
123 Rhonda Wittels <rhonda@codesourcery.com>
124 Nathan Froyd <froydnj@codesourcery.com>
125
126 * ppc-opc.c (insert_arx, extract_arx): New functions.
127 (insert_ary, extract_ary): New functions.
128 (insert_li20, extract_li20): New functions.
129 (insert_rx, extract_rx): New functions.
130 (insert_ry, extract_ry): New functions.
131 (insert_sci8, extract_sci8): New functions.
132 (insert_sci8n, extract_sci8n): New functions.
133 (insert_sd4h, extract_sd4h): New functions.
134 (insert_sd4w, extract_sd4w): New functions.
135 (insert_vlesi, extract_vlesi): New functions.
136 (insert_vlensi, extract_vlensi): New functions.
137 (insert_vleui, extract_vleui): New functions.
138 (insert_vleil, extract_vleil): New functions.
139 (BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT.
140 (BI16, BI32, BO32, B8): New.
141 (B15, B24, CRD32, CRS): New.
142 (CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG.
143 (DB, IMM20, RD, Rx, ARX, RY, RZ): New.
144 (ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New.
145 (SH6_MASK): Use PPC_OPSHIFT_INV.
146 (SI8, UI5, OIMM5, UI7, BO16): New.
147 (VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New.
148 (XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV.
149 (ALLOW8_SPRG): New.
150 (insert_sprg, extract_sprg): Check ALLOW8_SPRG.
151 (OPVUP, OPVUP_MASK OPVUP): New
152 (BD8, BD8_MASK, BD8IO, BD8IO_MASK): New.
153 (EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New.
154 (BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New.
155 (BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New.
156 (IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New.
157 (IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New.
158 (SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New.
159 (SE_IM5, SE_IM5_MASK): New.
160 (SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New.
161 (EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New.
162 (BO32DNZ, BO32DZ): New.
163 (NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE.
164 (PPCVLE): New.
165 (powerpc_opcodes): Add new VLE instructions. Update existing
166 instruction to include PPCVLE if supported.
167 * ppc-dis.c (ppc_opts): Add vle entry.
168 (get_powerpc_dialect): New function.
169 (powerpc_init_dialect): VLE support.
170 (print_insn_big_powerpc): Call get_powerpc_dialect.
171 (print_insn_little_powerpc): Likewise.
172 (operand_value_powerpc): Handle negative shift counts.
173 (print_insn_powerpc): Handle 2-byte instruction lengths.
174
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1752012-05-11 Daniel Richard G. <skunk@iskunk.org>
176
177 PR binutils/14028
178 * configure.in: Invoke ACX_HEADER_STRING.
179 * configure: Regenerate.
180 * config.in: Regenerate.
181 * sysdep.h: If STRINGS_WITH_STRING is defined then include both
182 string.h and strings.h.
183
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1842012-05-11 Nick Clifton <nickc@redhat.com>
185
186 PR binutils/14006
187 * arm-dis.c (print_insn): Fix detection of instruction mode in
188 files containing multiple executable sections.
189
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1902012-05-03 Sean Keys <skeys@ipdatasys.com>
191
192 * Makefile.in, configure: regenerate
193 * disassemble.c (disassembler): Recognize ARCH_XGATE.
194 * xgate-dis.c (read_memory, print_insn, print_insn_xgate):
195 New functions.
196 * configure.in: Recognize xgate.
197 * xgate-dis.c, xgate-opc.c: New files for support of xgate
198 * Makefile.am (CFILES, ALL_MACHINES): New files for disassembly
199 and opcode generation for xgate.
200
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2012012-04-30 DJ Delorie <dj@redhat.com>
202
203 * rx-decode.opc (MOV): Do not sign-extend immediates which are
204 already the maximum bit size.
205 * rx-decode.c: Regenerate.
206
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2072012-04-27 David S. Miller <davem@davemloft.net>
208
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209 * sparc-dis.c (v9a_asr_reg_names): Add 'cfr'.
210 * sparc-opc.c (sparc_opcodes): Add rd/wr cases for %cfr.
211
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212 * sparc-opc.c (sparc_opcodes): Add 'wr X, %pause' and 'pause'.
213 * sparc-dis.c (v9a_asr_reg_names): Add 'pause'.
214
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215 * sparc-opc.c (CBCOND): New define.
216 (CBCOND_XCC): Likewise.
217 (cbcond): New helper macro.
218 (sparc_opcodes): Add compare-and-branch instructions.
219
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220 * sparc-dis.c (print_insn_sparc): Handle ')'.
221 * sparc-opc.c (sparc_opcodes): Add crypto instructions.
222
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223 * sparc-opc.c (sparc_opcodes): Rework table to put HWCAP values
224 into new struct sparc_opcode 'hwcaps' field instead of 'flags'.
225
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2262012-04-12 David S. Miller <davem@davemloft.net>
227
228 * sparc-dis.c (X_DISP10): Define.
229 (print_insn_sparc): Handle '='.
230
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2312012-04-01 Mike Frysinger <vapier@gentoo.org>
232
233 * bfin-dis.c (fmtconst): Replace decimal handling with a single
234 sprintf call and the '*' field width.
235
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2362012-03-23 Maxim Kuvyrkov <maxim@codesourcery.com>
237
238 * mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.
239
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2402012-03-16 Alan Modra <amodra@gmail.com>
241
242 * ppc-dis.c (PPC_OPC_SEGS, PPC_OP_TO_SEG): Delete.
243 (powerpc_opcd_indices): Bump array size.
244 (disassemble_init_powerpc): Set powerpc_opcd_indices entries
245 corresponding to unused opcodes to following entry.
246 (lookup_powerpc): New function, extracted and optimised from..
247 (print_insn_powerpc): ..here.
248
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2492012-03-15 Alan Modra <amodra@gmail.com>
250 James Lemke <jwlemke@codesourcery.com>
251
252 * disassemble.c (disassemble_init_for_target): Handle ppc init.
253 * ppc-dis.c (private): New var.
254 (powerpc_init_dialect): Don't return calloc failure, instead use
255 private.
256 (PPC_OPCD_SEGS, PPC_OP_TO_SEG): Define.
257 (powerpc_opcd_indices): New array.
258 (disassemble_init_powerpc): New function.
259 (print_insn_big_powerpc): Don't init dialect here.
260 (print_insn_little_powerpc): Likewise.
261 (print_insn_powerpc): Start search using powerpc_opcd_indices.
262
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2632012-03-10 Edmar Wienskoski <edmar@freescale.com>
264
265 * ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
266 * ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
267 (PPCVEC2, PPCTMR, E6500): New short names.
268 (powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
269 mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
270 lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
271 lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
272 lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
273 optional operands on sync instruction for E6500 target.
274
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2752012-03-08 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
276
277 * s390-opc.txt: Set instruction type of pku to SS_L2RDRD.
278
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2792012-02-27 Alan Modra <amodra@gmail.com>
280
281 * mt-dis.c: Regenerate.
282
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2832012-02-27 Alan Modra <amodra@gmail.com>
284
285 * v850-opc.c (extract_v8): Rearrange to make it obvious this
286 is the inverse of corresponding insert function.
287 (extract_d22, extract_u9, extract_r4): Likewise.
288 (extract_d9): Correct sign extension.
289 (extract_d16_15): Don't assume "long" is 32 bits, and don't
290 rely on implementation defined behaviour for shift right of
291 signed types.
292 (extract_d16_16, extract_d17_16, extract_i9): Likewise.
293 (extract_d23): Likewise, and correct mask.
294
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2952012-02-27 Alan Modra <amodra@gmail.com>
296
297 * crx-dis.c (print_arg): Mask constant to 32 bits.
298 * crx-opc.c (cst4_map): Use int array.
299
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3002012-02-27 Alan Modra <amodra@gmail.com>
301
302 * arc-dis.c (BITS): Don't use shifts to mask off bits.
303 (FIELDD): Sign extend with xor,sub.
304
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3052012-02-25 Walter Lee <walt@tilera.com>
306
307 * tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
308 * tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
309 TILEPRO_OPC_LW_TLS_SN.
310
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3112012-02-21 H.J. Lu <hongjiu.lu@intel.com>
312
313 * i386-opc.h (HLEPrefixNone): New.
314 (HLEPrefixLock): Likewise.
315 (HLEPrefixAny): Likewise.
316 (HLEPrefixRelease): Likewise.
317
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3182012-02-08 H.J. Lu <hongjiu.lu@intel.com>
319
320 * i386-dis.c (HLE_Fixup1): New.
321 (HLE_Fixup2): Likewise.
322 (HLE_Fixup3): Likewise.
323 (Ebh1): Likewise.
324 (Evh1): Likewise.
325 (Ebh2): Likewise.
326 (Evh2): Likewise.
327 (Ebh3): Likewise.
328 (Evh3): Likewise.
329 (MOD_C6_REG_7): Likewise.
330 (MOD_C7_REG_7): Likewise.
331 (RM_C6_REG_7): Likewise.
332 (RM_C7_REG_7): Likewise.
333 (XACQUIRE_PREFIX): Likewise.
334 (XRELEASE_PREFIX): Likewise.
335 (dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
336 cmpxchg, dec, inc, neg, not, or, sbb, sub, xor and xadd. Use
337 Ebh2/Evh2 on xchg. Use Ebh3/Evh3 on mov.
338 (reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
339 not, or, sbb, sub and xor. Use Ebh3/Evh3 on mov. Use
340 MOD_C6_REG_7 and MOD_C7_REG_7.
341 (mod_table): Add MOD_C6_REG_7 and MOD_C7_REG_7.
342 (rm_table): Add RM_C6_REG_7 and RM_C7_REG_7. Add xend and
343 xtest.
344 (prefix_name): Handle XACQUIRE_PREFIX and XRELEASE_PREFIX.
345 (CMPXCHG8B_Fixup): Handle HLE prefix on cmpxchg8b.
346
347 * i386-gen.c (cpu_flag_init): Add CPU_HLE_FLAGS and
348 CPU_RTM_FLAGS.
349 (cpu_flags): Add CpuHLE and CpuRTM.
350 (opcode_modifiers): Add HLEPrefixOk.
351
352 * i386-opc.h (CpuHLE): New.
353 (CpuRTM): Likewise.
354 (HLEPrefixOk): Likewise.
355 (i386_cpu_flags): Add cpuhle and cpurtm.
356 (i386_opcode_modifier): Add hleprefixok.
357
358 * i386-opc.tbl: Add HLEPrefixOk=3 to mov. Add HLEPrefixOk to
359 add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
360 sbb, sub, xor and xadd. Add HLEPrefixOk=2 to xchg with memory
361 operand. Add xacquire, xrelease, xabort, xbegin, xend and
362 xtest.
363 * i386-init.h: Regenerated.
364 * i386-tbl.h: Likewise.
365
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3662012-01-24 DJ Delorie <dj@redhat.com>
367
368 * rl78-decode.opc (rl78_decode_opcode): Add NOT1.
369 * rl78-decode.c: Regenerate.
370
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3712012-01-17 James Murray <jsm@jsm-net.demon.co.uk>
372
373 PR binutils/10173
374 * cr16-dis.c (print_arg): Test symtab_size not num_symbols.
375
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3762012-01-17 Andreas Schwab <schwab@linux-m68k.org>
377
378 * m68k-opc.c (m68k_opcodes): Fix entries for pmove with BADx/BACx
379 register and move them after pmove with PSR/PCSR register.
380
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3812012-01-13 H.J. Lu <hongjiu.lu@intel.com>
382
383 * i386-dis.c (mod_table): Add vmfunc.
384
385 * i386-gen.c (cpu_flag_init): Add CPU_VMFUNC_FLAGS.
386 (cpu_flags): CpuVMFUNC.
387
388 * i386-opc.h (CpuVMFUNC): New.
389 (i386_cpu_flags): Add cpuvmfunc.
390
391 * i386-opc.tbl: Add vmfunc.
392 * i386-init.h: Regenerated.
393 * i386-tbl.h: Likewise.
5011093d 394
23e1d329 395For older changes see ChangeLog-2011
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396\f
397Local Variables:
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398mode: change-log
399left-margin: 8
400fill-column: 74
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401version-control: never
402End:
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