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x86: don't show suffixes for to-scalar-int conversion insns
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
9646c87b
JB		 12018-03-28 Jan Beulich <jbeulich@suse.com>
2
3 * i386-dis.c (prefix_table): Drop Y for cvt*2si.
4 (vex_len_table): Drop Y for vcvt*2si.
5 (putop): Replace plain 'Y' handling by abort().
6
c8d59609
NC		 72018-03-28 Nick Clifton <nickc@redhat.com>
8
9 PR 22988
10 * aarch64-tbl.h (aarch64_opcode_table): Add entries for LDFF1xx
11 instructions with only a base address register.
12 * aarch64-opc.c (operand_general_constraint_met_p): Add code to
13 handle AARHC64_OPND_SVE_ADDR_R.
14 (aarch64_print_operand): Likewise.
15 * aarch64-asm-2.c: Regenerate.
16 * aarch64_dis-2.c: Regenerate.
17 * aarch64-opc-2.c: Regenerate.
18
b8c169f3
JB		 192018-03-22 Jan Beulich <jbeulich@suse.com>
20
21 * i386-opc.tbl: Drop VecESize from register only insn forms and
22 memory forms not allowing broadcast.
23 * i386-tlb.h: Re-generate.
24
96bc132a
JB		 252018-03-22 Jan Beulich <jbeulich@suse.com>
26
27 * i386-opc.tbl (vfrczs*, vphadd*, vphsub*, vpmacs*, vpmadcs*,
28 vprot*, vpsha*, vpshl*, bextr, blc*, bls*, t1mskc, tzmsk, sha1*,
29 sha256*): Drop Disp<N>.
30
9f79e886
JB		 312018-03-22 Jan Beulich <jbeulich@suse.com>
32
33 * i386-dis.c (EbndS, bnd_swap_mode): New.
34 (prefix_table): Use EbndS.
35 (OP_E_register, OP_E_memory): Also handle bnd_swap_mode.
36 * i386-opc.tbl (bndmov): Move misplaced Load.
37 * i386-tlb.h: Re-generate.
38
d6793fa1
JB		 392018-03-22 Jan Beulich <jbeulich@suse.com>
40
41 * i386-opc.tbl (vcvtdq2pd, vcvtps2pd, vcvtudq2pd): Use separate
42 templates allowing memory operands and folded ones for register
43 only flavors.
44 * i386-tlb.h: Re-generate.
45
f7768225
JB		 462018-03-22 Jan Beulich <jbeulich@suse.com>
47
48 * i386-opc.tbl (vfrczp*, vpcmov, vpermil2p*): Fold 128- and
49 256-bit templates. Drop redundant leftover Disp<N>.
50 * i386-tlb.h: Re-generate.
51
0e35537d
JW		 522018-03-14 Kito Cheng <kito.cheng@gmail.com>
53
54 * riscv-opc.c (riscv_insn_types): New.
55
b4a3689a
NC		 562018-03-13 Nick Clifton <nickc@redhat.com>
57
58 * po/pt_BR.po: Updated Brazilian Portuguese translation.
59
d3d50934
L		 602018-03-08 H.J. Lu <hongjiu.lu@intel.com>
61
62 * i386-opc.tbl: Add Optimize to clr.
63 * i386-tbl.h: Regenerated.
64
bd5dea88
L		 652018-03-08 H.J. Lu <hongjiu.lu@intel.com>
66
67 * i386-gen.c (opcode_modifiers): Remove OldGcc.
68 * i386-opc.h (OldGcc): Removed.
69 (i386_opcode_modifier): Remove oldgcc.
70 * i386-opc.tbl: Remove fsubp, fsubrp, fdivp and fdivrp
71 instructions for old (<= 2.8.1) versions of gcc.
72 * i386-tbl.h: Regenerated.
73
e771e7c9
JB		 742018-03-08 Jan Beulich <jbeulich@suse.com>
75
76 * i386-opc.h (EVEXDYN): New.
77 * i386-opc.tbl: Fold various AVX512VL templates.
78 * i386-tlb.h: Re-generate.
79
ed438a93
JB		 802018-03-08 Jan Beulich <jbeulich@suse.com>
81
82 * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
83 vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
84 vpexpandd, vpexpandq): Fold AFX512VF templates.
85 * i386-tlb.h: Re-generate.
86
454172a9
JB		 872018-03-08 Jan Beulich <jbeulich@suse.com>
88
89 * i386-opc.tbl (vgf2p8affineinvqb, vgf2p8affineqb, vgf2p8mulb):
90 Fold 128- and 256-bit VEX-encoded templates.
91 * i386-tlb.h: Re-generate.
92
36824150
JB		 932018-03-08 Jan Beulich <jbeulich@suse.com>
94
95 * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
96 vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
97 vpexpandd, vpexpandq): Fold AVX512F templates.
98 * i386-tlb.h: Re-generate.
99
e7f5c0a9
JB		 1002018-03-08 Jan Beulich <jbeulich@suse.com>
101
102 * i386-opc.tbl (llwpcb, slwpcb, lwpval, lwpins): Fold 32- and
103 64-bit templates. Drop Disp<N>.
104 * i386-tlb.h: Re-generate.
105
25a4277f
JB		 1062018-03-08 Jan Beulich <jbeulich@suse.com>
107
108 * i386-opc.tbl (vfmadd*, vfmsub*, vfnmadd*, vfnmsub*): Fold 128-
109 and 256-bit templates.
110 * i386-tlb.h: Re-generate.
111
d2224064
JB		 1122018-03-08 Jan Beulich <jbeulich@suse.com>
113
114 * i386-opc.tbl (cmpxchg8b): Add NoRex64.
115 * i386-tlb.h: Re-generate.
116
1b193f0b
JB		 1172018-03-08 Jan Beulich <jbeulich@suse.com>
118
119 * i386-opc.tbl (cmpxchg16b, fisttp, fisttpll, bndmov, mwaitx):
120 Drop NoAVX.
121 * i386-tlb.h: Re-generate.
122
f2f6a710
JB		 1232018-03-08 Jan Beulich <jbeulich@suse.com>
124
125 * i386-opc.tbl (ldmxcsr, stmxcsr): Add NoAVX.
126 * i386-tlb.h: Re-generate.
127
38e314eb
JB		 1282018-03-08 Jan Beulich <jbeulich@suse.com>
129
130 * i386-gen.c (opcode_modifiers): Delete FloatD.
131 * i386-opc.h (FloatD): Delete.
132 (struct i386_opcode_modifier): Delete floatd.
133 * i386-opc.tbl (fadd, fsub, fsubr, fmul, fdiv, fdivr): Replace
134 FloatD by D.
135 * i386-tlb.h: Re-generate.
136
d53e6b98
JB		 1372018-03-08 Jan Beulich <jbeulich@suse.com>
138
139 * i386-dis.c (float_reg): Adjust DC and DE fsub*/fdiv* patterns.
140
2907c2f5
JB		 1412018-03-08 Jan Beulich <jbeulich@suse.com>
142
143 * i386-opc.tbl (vmovd): Disallow Qword memory operands.
144 * i386-tlb.h: Re-generate.
145
73053c1f
JB		 1462018-03-08 Jan Beulich <jbeulich@suse.com>
147
148 * i386-opc.tbl (vcvtpd2ps): Fold AVX 128- and 256-bit memory
149 forms.
150 * i386-tlb.h: Re-generate.
151
52fe4420
AM		 1522018-03-07 Alan Modra <amodra@gmail.com>
153
154 * disassemble.c (disassembler): Use bfd_arch_powerpc entry for
155 bfd_arch_rs6000.
156 * disassemble.h (print_insn_rs6000): Delete.
157 * ppc-dis.c (powerpc_init_dialect): Handle rs6000.
158 (disassemble_init_powerpc): Call powerpc_init_dialect for rs6000.
159 (print_insn_rs6000): Delete.
160
a6743a54
AM		 1612018-03-03 Alan Modra <amodra@gmail.com>
162
163 * sysdep.h (opcodes_error_handler): Define.
164 (_bfd_error_handler): Declare.
165 * Makefile.am: Remove stray #.
166 * opc2c.c (main): Remove bogus -l arg handling. Print "DO NOT
167 EDIT" comment.
168 * aarch64-dis.c, * arc-dis.c, * arm-dis.c, * avr-dis.c,
169 * d30v-dis.c, * h8300-dis.c, * mmix-dis.c, * ppc-dis.c,
170 * riscv-dis.c, * s390-dis.c, * sparc-dis.c, * v850-dis.c: Use
171 opcodes_error_handler to print errors. Standardize error messages.
172 * msp430-decode.opc, * nios2-dis.c, * rl78-decode.opc: Likewise,
173 and include opintl.h.
174 * nds32-asm.c: Likewise, and include sysdep.h and opintl.h.
175 * i386-gen.c: Standardize error messages.
176 * msp430-decode.c, * rl78-decode.c, rx-decode.c: Regenerate.
177 * Makefile.in: Regenerate.
178 * epiphany-asm.c, * epiphany-desc.c, * epiphany-dis.c,
179 * epiphany-ibld.c, * fr30-asm.c, * fr30-desc.c, * fr30-dis.c,
180 * fr30-ibld.c, * frv-asm.c, * frv-desc.c, * frv-dis.c, * frv-ibld.c,
181 * frv-opc.c, * ip2k-asm.c, * ip2k-desc.c, * ip2k-dis.c, * ip2k-ibld.c,
182 * iq2000-asm.c, * iq2000-desc.c, * iq2000-dis.c, * iq2000-ibld.c,
183 * lm32-asm.c, * lm32-desc.c, * lm32-dis.c, * lm32-ibld.c,
184 * m32c-asm.c, * m32c-desc.c, * m32c-dis.c, * m32c-ibld.c,
185 * m32r-asm.c, * m32r-desc.c, * m32r-dis.c, * m32r-ibld.c,
186 * mep-asm.c, * mep-desc.c, * mep-dis.c, * mep-ibld.c, * mt-asm.c,
187 * mt-desc.c, * mt-dis.c, * mt-ibld.c, * or1k-asm.c, * or1k-desc.c,
188 * or1k-dis.c, * or1k-ibld.c, * xc16x-asm.c, * xc16x-desc.c,
189 * xc16x-dis.c, * xc16x-ibld.c, * xstormy16-asm.c, * xstormy16-desc.c,
190 * xstormy16-dis.c, * xstormy16-ibld.c: Regenerate.
191
8305403a
L		 1922018-03-01 H.J. Lu <hongjiu.lu@intel.com>
193
194 * * i386-opc.tbl: Add "Optimize" to AVX256 and AVX512
195 vpsub[bwdq] instructions.
196 * i386-tbl.h: Regenerated.
197
e184813f
AM		 1982018-03-01 Alan Modra <amodra@gmail.com>
199
200 * configure.ac (ALL_LINGUAS): Sort.
201 * configure: Regenerate.
202
5b616bef
TP		 2032018-02-27 Thomas Preud'homme <thomas.preudhomme@arm.com>
204
205 * arm-dis.c (print_insn_coprocessor): Replace uses of ARM_FEATURE_COPY
206 macro by assignements.
207
b6f8c7c4
L		 2082018-02-27 H.J. Lu <hongjiu.lu@intel.com>
209
210 PR gas/22871
211 * i386-gen.c (opcode_modifiers): Add Optimize.
212 * i386-opc.h (Optimize): New enum.
213 (i386_opcode_modifier): Add optimize.
214 * i386-opc.tbl: Add "Optimize" to "mov $imm, reg",
215 "sub reg, reg/mem", "test $imm, acc", "test $imm, reg/mem",
216 "and $imm, acc", "and $imm, reg/mem", "xor reg, reg/mem",
217 "movq $imm, reg" and AVX256 and AVX512 versions of vandnps,
218 vandnpd, vpandn, vpandnd, vpandnq, vxorps, vxorpd, vpxor,
219 vpxord and vpxorq.
220 * i386-tbl.h: Regenerated.
221
e95b887f
AM		 2222018-02-26 Alan Modra <amodra@gmail.com>
223
224 * crx-dis.c (getregliststring): Allocate a large enough buffer
225 to silence false positive gcc8 warning.
226
0bccfb29
JW		 2272018-02-22 Shea Levy <shea@shealevy.com>
228
229 * disassemble.c (ARCH_riscv): Define if ARCH_all.
230
6b6b6807
L		 2312018-02-22 H.J. Lu <hongjiu.lu@intel.com>
232
233 * i386-opc.tbl: Add {rex},
234 * i386-tbl.h: Regenerated.
235
75f31665
MR		 2362018-02-20 Maciej W. Rozycki <macro@mips.com>
237
238 * mips16-opc.c (decode_mips16_operand) <'M'>: Remove case.
239 (mips16_opcodes): Replace `M' with `m' for "restore".
240
e207bc53
TP		 2412018-02-19 Thomas Preud'homme <thomas.preudhomme@arm.com>
242
243 * arm-dis.c (thumb_opcodes): Fix BXNS mask.
244
87993319
MR		 2452018-02-13 Maciej W. Rozycki <macro@mips.com>
246
247 * wasm32-dis.c (print_insn_wasm32): Rename `index' local
248 variable to `function_index'.
249
68d20676
NC		 2502018-02-13 Nick Clifton <nickc@redhat.com>
251
252 PR 22823
253 * metag-dis.c (print_fmmov): Double buffer size to avoid warning
254 about truncation of printing.
255
d2159fdc
HW		 2562018-02-12 Henry Wong <henry@stuffedcow.net>
257
258 * mips-opc.c (mips_builtin_opcodes): Correct "sigrie" encoding.
259
f174ef9f
NC		 2602018-02-05 Nick Clifton <nickc@redhat.com>
261
262 * po/pt_BR.po: Updated Brazilian Portuguese translation.
263
be3a8dca
IT		 2642018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
265
266 * i386-dis.c (enum): Add pconfig.
267 * i386-gen.c (cpu_flag_init): Add CPU_PCONFIG_FLAGS.
268 (cpu_flags): Add CpuPCONFIG.
269 * i386-opc.h (enum): Add CpuPCONFIG.
270 (i386_cpu_flags): Add cpupconfig.
271 * i386-opc.tbl: Add PCONFIG instruction.
272 * i386-init.h: Regenerate.
273 * i386-tbl.h: Likewise.
274
3233d7d0
IT		 2752018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
276
277 * i386-dis.c (enum): Add PREFIX_0F09.
278 * i386-gen.c (cpu_flag_init): Add CPU_WBNOINVD_FLAGS.
279 (cpu_flags): Add CpuWBNOINVD.
280 * i386-opc.h (enum): Add CpuWBNOINVD.
281 (i386_cpu_flags): Add cpuwbnoinvd.
282 * i386-opc.tbl: Add WBNOINVD instruction.
283 * i386-init.h: Regenerate.
284 * i386-tbl.h: Likewise.
285
e925c834
JW		 2862018-01-17 Jim Wilson <jimw@sifive.com>
287
288 * riscv-opc.c (riscv_opcodes) <addi>: Use z instead of 0.
289
d777820b
IT		 2902018-01-17 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
291
292 * i386-gen.c (cpu_flag_init): Delete CPU_CET_FLAGS, CpuCET.
293 Add CPU_IBT_FLAGS, CPU_SHSTK_FLAGS, CPY_ANY_IBT_FLAGS,
294 CPU_ANY_SHSTK_FLAGS, CpuIBT, CpuSHSTK.
295 (cpu_flags): Add CpuIBT, CpuSHSTK.
296 * i386-opc.h (enum): Add CpuIBT, CpuSHSTK.
297 (i386_cpu_flags): Add cpuibt, cpushstk.
298 * i386-opc.tbl: Change CpuCET to CpuSHSTK and CpuIBT.
299 * i386-init.h: Regenerate.
300 * i386-tbl.h: Likewise.
301
f6efed01
NC		 3022018-01-16 Nick Clifton <nickc@redhat.com>
303
304 * po/pt_BR.po: Updated Brazilian Portugese translation.
305 * po/de.po: Updated German translation.
306
2721d702
JW		 3072018-01-15 Jim Wilson <jimw@sifive.com>
308
309 * riscv-opc.c (match_c_nop): New.
310 (riscv_opcodes) <addi>: Handle an addi that compresses to c.nop.
311
616dcb87
NC		 3122018-01-15 Nick Clifton <nickc@redhat.com>
313
314 * po/uk.po: Updated Ukranian translation.
315
3957a496
NC		 3162018-01-13 Nick Clifton <nickc@redhat.com>
317
318 * po/opcodes.pot: Regenerated.
319
769c7ea5
NC		 3202018-01-13 Nick Clifton <nickc@redhat.com>
321
322 * configure: Regenerate.
323
faf766e3
NC		 3242018-01-13 Nick Clifton <nickc@redhat.com>
325
326 2.30 branch created.
327
888a89da
IT		 3282018-01-11 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
329
330 * i386-opc.tbl: Remove VL variants for 4FMAPS and 4VNNIW insns.
331 * i386-tbl.h: Regenerate.
332
cbda583a
JB		 3332018-01-10 Jan Beulich <jbeulich@suse.com>
334
335 * i386-opc.tbl (v4fmaddss, v4fnmaddss): Adjust Disp8MemShift.
336 * i386-tbl.h: Re-generate.
337
c9e92278
JB		 3382018-01-10 Jan Beulich <jbeulich@suse.com>
339
340 * i386-opc.tbl (vpcmpeqb, vpcmpleb, vpcmpltb, vpcmpneqb,
341 vpcmpnleb, vpcmpnltb, vpcmpequb, vpcmpleub, vpcmpltub,
342 vpcmpnequb, vpcmpnleub, vpcmpnltub, vpcmpeqw, vpcmplew,
343 vpcmpltw, vpcmpneqw, vpcmpnlew, vpcmpnltw, vpcmpequw, vpcmpleuw,
344 vpcmpltuw, vpcmpnequw, vpcmpnleuw, vpcmpnltuw): Adjust
345 Disp8MemShift of AVX512VL forms.
346 * i386-tbl.h: Re-generate.
347
35fd2b2b
JW		 3482018-01-09 Jim Wilson <jimw@sifive.com>
349
350 * riscv-dis.c (maybe_print_address): If base_reg is zero,
351 then the hi_addr value is zero.
352
91d8b670
JG		 3532018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
354
355 * arm-dis.c (arm_opcodes): Add csdb.
356 (thumb32_opcodes): Add csdb.
357
be2e7d95
JG		 3582018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
359
360 * aarch64-tbl.h (aarch64_opcode_table): Add "csdb".
361 * aarch64-asm-2.c: Regenerate.
362 * aarch64-dis-2.c: Regenerate.
363 * aarch64-opc-2.c: Regenerate.
364
704a705d
L		 3652018-01-08 H.J. Lu <hongjiu.lu@intel.com>
366
367 PR gas/22681
368 * i386-opc.tbl: Properly encode vmovd with Qword memeory operand.
369 Remove AVX512 vmovd with 64-bit operands.
370 * i386-tbl.h: Regenerated.
371
35eeb78f
JW		 3722018-01-05 Jim Wilson <jimw@sifive.com>
373
374 * riscv-dis.c (print_insn_args) <'s'>: Call maybe_print_address for a
375 jalr.
376
219d1afa
AM		 3772018-01-03 Alan Modra <amodra@gmail.com>
378
379 Update year range in copyright notice of all files.
380
1508bbf5
JB		 3812018-01-02 Jan Beulich <jbeulich@suse.com>
382
383 * i386-gen.c (operand_type_init): Restore OPERAND_TYPE_REGYMM
384 and OPERAND_TYPE_REGZMM entries.
385
1e563868 386For older changes see ChangeLog-2017
3499769a 387\f
1e563868 388Copyright (C) 2018 Free Software Foundation, Inc.
3499769a
AM		 389
390Copying and distribution of this file, with or without modification,
391are permitted in any medium without royalty provided the copyright
392notice and this notice are preserved.
393
394Local Variables:
395mode: change-log
396left-margin: 8
397fill-column: 74
398version-control: never
399End:
GDB Binutils - Deliverables
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