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* symtab.c: Remove trailing whitespace throughout the file.
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
58e24671
RW		 12009-03-01 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
2
3 * configure: Regenerate.
4
d6f574e0
L		 52009-02-27 H.J. Lu <hongjiu.lu@intel.com>
6
7 * i386-dis.c (OP_EX): Call OP_E_memory instead of OP_E.
8
066be9f7
PB		 92009-02-26 Peter Bergner <bergner@vnet.ibm.com>
10
11 * ppc-dis.c (powerpc_init_dialect): Extend -Mpower7 to disassemble
12 the power7 and the isel instructions.
13 * ppc-opc.c (insert_xc6, extract_xc6): New static functions.
14 (insert_dm, extract_dm): Likewise.
15 (XB6): Update comment to include XX2 form.
16 (WC, XC6, SHW, DMEX, UIM, XX2, XX3RC, XX4, XX2_MASK, XX2UIM_MASK,
17 XX2BF_MASK, XX3BF_MASK, XX3SHW_MASK, XX4_MASK, XWC_MASK, POWER7): New.
18 (RemoveXX3DM): Delete.
19 (powerpc_opcodes): <"lfdp", "lfdpx", "mcrxr", "mftb", "mffgpr",
20 "mftgpr">: Deprecate for POWER7.
21 <"fres", "fres.", "frsqrtes", "frsqrtes.", "fre", "fre.", "frsqrte",
22 "frsqrte.">: Deprecate the three operand form and enable the two
23 operand form for POWER7 and later.
24 <"wait">: Extend to accept optional parameter. Enable for POWER7.
25 <"waitsrv", "waitimpl">: Add extended opcodes.
26 <"ldbrx", "stdbrx">: Enable for POWER7.
27 <"cdtbcd", "cbcdtd", "addg6s">: Add POWER6 opcodes.
28 <"bpermd", "dcbtstt", "dcbtt", "dcffix.", "dcffix", "divde.", "divde",
29 "divdeo.", "divdeo", "divdeu.", "divdeu", "divdeuo.", "divdeuo",
30 "divwe.", "divwe", "divweo.", "divweo", "divweu.", "divweu", "divweuo.",
31 "divweuo", "fcfids.", "fcfids", "fcfidu.", "fcfidu", "fcfidus.",
32 "fcfidus", "fctidu.", "fctidu", "fctiduz.", "fctiduz", "fctiwu.",
33 "fctiwu", "fctiwuz.", "fctiwuz", "ftdiv", "ftsqrt", "lbarx", "lfiwzx",
34 "lharx", "popcntd", "popcntw", "stbcx.", "sthcx.">: Add POWER7 opcodes.
35 <"lxsdux", "lxsdx", "lxvdsx", "lxvw4ux", "lxvw4x", "stxsdux", "stxsdx",
36 "stxvw4ux", "stxvw4x", "xsabsdp", "xsadddp", "xscmpodp", "xscmpudp",
37 "xscpsgndp", "xscvdpsp", "xscvdpsxds", "xscvdpsxws", "xscvdpuxds",
38 "xscvdpuxws", "xscvspdp", "xscvsxddp", "xscvuxddp", "xsdivdp",
39 "xsmaddadp", "xsmaddmdp", "xsmaxdp", "xsmindp", "xsmsubadp",
40 "xsmsubmdp", "xsmuldp", "xsnabsdp", "xsnegdp", "xsnmaddadp",
41 "xsnmaddmdp", "xsnmsubadp", "xsnmsubmdp", "xsrdpi", "xsrdpic",
42 "xsrdpim", "xsrdpip", "xsrdpiz", "xsredp", "xsrsqrtedp", "xssqrtdp",
43 "xssubdp", "xstdivdp", "xstsqrtdp", "xvabsdp", "xvabssp", "xvadddp",
44 "xvaddsp", "xvcmpeqdp.", "xvcmpeqdp", "xvcmpeqsp.", "xvcmpeqsp",
45 "xvcmpgedp.", "xvcmpgedp", "xvcmpgesp.", "xvcmpgesp", "xvcmpgtdp.",
46 "xvcmpgtdp", "xvcmpgtsp.", "xvcmpgtsp", "xvcpsgnsp", "xvcvdpsp",
47 "xvcvdpsxds", "xvcvdpsxws", "xvcvdpuxds", "xvcvdpuxws", "xvcvspdp",
48 "xvcvspsxds", "xvcvspsxws", "xvcvspuxds", "xvcvspuxws", "xvcvsxddp",
49 "xvcvsxdsp", "xvcvsxwdp", "xvcvsxwsp", "xvcvuxddp", "xvcvuxdsp",
50 "xvcvuxwdp", "xvcvuxwsp", "xvdivdp", "xvdivsp", "xvmaddadp",
51 "xvmaddasp", "xvmaddmdp", "xvmaddmsp", "xvmaxdp", "xvmaxsp",
52 "xvmindp", "xvminsp", "xvmovsp", "xvmsubadp", "xvmsubasp", "xvmsubmdp",
53 "xvmsubmsp", "xvmuldp", "xvmulsp", "xvnabsdp", "xvnabssp", "xvnegdp",
54 "xvnegsp", "xvnmaddadp", "xvnmaddasp", "xvnmaddmdp", "xvnmaddmsp",
55 "xvnmsubadp", "xvnmsubasp", "xvnmsubmdp", "xvnmsubmsp", "xvrdpi",
56 "xvrdpic", "xvrdpim", "xvrdpip", "xvrdpiz", "xvredp", "xvresp",
57 "xvrspi", "xvrspic", "xvrspim", "xvrspip", "xvrspiz", "xvrsqrtedp",
58 "xvrsqrtesp", "xvsqrtdp", "xvsqrtsp", "xvsubdp", "xvsubsp", "xvtdivdp",
59 "xvtdivsp", "xvtsqrtdp", "xvtsqrtsp", "xxland", "xxlandc", "xxlnor",
60 "xxlor", "xxlxor", "xxmrghw", "xxmrglw", "xxsel", "xxsldwi", "xxspltd",
61 "xxspltw", "xxswapd">: Add VSX opcodes.
62
4c664d7b
L		 632009-02-23 H.J. Lu <hongjiu.lu@intel.com>
64
65 * i386-gen.c (operand_type_init): Remove OPERAND_TYPE_VEX_IMM4.
66 (operand_types): Remove Vex_Imm4.
67
68 * i386-opc.h (Vex_Imm4): Removed.
69 (OTMax): Updated.
70 (i386_operand_type): Remove vex_imm4.
71
72 * i386-opc.tbl: Remove Vex_Imm4 comments.
73 * i386-init.h: Regenerated.
74 * i386-tbl.h: Likewise.
75
4ce8808b
RE		 762009-02-23 Richard Earnshaw <rearnsha@arm.com>
77
78 * arm-dis.c (neon_opcodes): Correct bit-mask and patterns for
79 vq{r}shr{u}n.s64 insnstructions.
80
0e55be16
PB		 812009-02-19 Peter Bergner <bergner@vnet.ibm.com>
82
83 * ppc-opc.c (powerpc_opcodes) <"lfdepx", "stfdepx">: Fix the first
84 operand to be a float point register (FRT/FRS).
85
b1c9882d
AN		 862009-02-18 Adam Nemet <anemet@caviumnetworks.com>
87
88 * mips-opc.c (mips_builtin_opcodes): Move the Octeon-specific
89 dmfc2 and dmtc2 before the architecture-level variants.
90
137f2437
NC		 912009-02-18 Pierre Muller <muller@ics.u-strasbg.fr>
92
93 * fr30-opc.c: Regenerate.
94 * frv-opc.c: Regenerate.
95 * ip2k-opc.c: Regenerate.
96 * iq2000-opc.c: Regenerate.
97 * lm32-opc.c: Regenerate.
98 * m32c-opc.c: Regenerate.
99 * m32r-opc.c: Regenerate.
100 * mep-opc.c: Regenerate.
101 * mt-opc.c: Regenerate.
102 * xc16x-opc.c: Regenerate.
103 * xstormy16-opc.c: Regenerate.
104 * tic54x-dis.c (print_instruction): Avoid compiler warning on
105 sprintf call.
106
87298967
NS		 1072009-02-12 Nathan Sidwell <nathan@codesourcery.com>
108
109 * m68k-opc.c (m68k_opcodes): Add stldsr instruction.
110
80890a61
PB		 1112009-02-05 Peter Bergner <bergner@vnet.ibm.com>
112
113 * ppc-opc.c: Update copyright year.
114 (powerpc_opcodes) <"dcbt", "dcbtst">: Deprecate the Embedded operand
115 ordering for POWER4 and later and use the correct Server ordering.
116
ce2f5b3c
L		 1172009-02-04 H.J. Lu <hongjiu.lu@intel.com>
118
119 AVX Programming Reference (January, 2009)
120 * i386-dis.c (PREFIX_VEX_3A44): New.
121 (VEX_LEN_3A44_P_2): Likewise.
122 (PREFIX_VEX_3A48): Updated.
123 (VEX_LEN_3A4C_P_2): Likewise.
124 (prefix_table): Add PREFIX_VEX_3A44.
125 (vex_table): Likewise.
126 (vex_len_table): Add VEX_LEN_3A44_P_2.
127
128 * i386-opc.tbl: Add PCLMUL + AVX instructions.
129 * i386-tbl.h: Regenerated.
130
52b6b6b9
JM		 1312009-02-03 Sandip Matte <sandip@rmicorp.com>
132
133 * mips-dis.c (mips_cp0_names_xlr, mips_cp0sel_names_xlr): Define.
134 (mips_arch_choices): Add XLR entry.
135 * mips-opc.c (XLR): Define.
136 (mips_builtin_opcodes): Add XLR instructions.
137
31dd3154
JM		 1382009-02-03 Carlos O'Donell <carlos@codesourcery.com>
139
140 * Makefile.am: Add install-pdf target.
141 * po/Make-in: Add install-pdf target.
142 * Makefile.in: Regenerate.
143
c1a0a41f
DD		 1442009-02-02 DJ Delorie <dj@redhat.com>
145
146 * mep-asm.c: Regenerate.
147 * mep-desc.c: Regenerate.
148 * mep-desc.h: Regenerate.
149 * mep-dis.c: Regenerate.
150 * mep-ibld.c: Regenerate.
151 * mep-opc.c: Regenerate.
152 * mep-opc.h: Regenerate.
153
087b80de
JM		 1542009-01-29 Mark Mitchell <mark@codesourcery.com>
155
156 * arm-dis.c (thumb32_opcodes): Correct decoding for qadd, qdadd,
157 qsub, and qdsub.
158
159073e6
NC		 1592009-01-28 Chao-ying Fu <fu@mips.com>
160
161 * mips-opc.c (suxc1): Add the flag of FP_D.
162
6f3b91a6
AM		 1632009-01-20 Alan Modra <amodra@bigpond.net.au>
164
165 * fr30-asm.c, fr30-dis.c, fr30-ibld.c, frv-asm.c, frv-dis.c,
166 * frv-ibld.c, ip2k-asm.c, ip2k-dis.c, ip2k-ibld.c,
167 * iq2000-asm.c, iq2000-dis.c, iq2000-ibld.c, m32c-asm.c,
168 * m32c-dis.c, m32c-ibld.c, m32r-asm.c, m32r-dis.c,
169 * m32r-ibld.c, mep-asm.c, mep-dis.c, mep-ibld.c, mt-asm.c,
170 * mt-dis.c, mt-ibld.c, openrisc-asm.c, openrisc-dis.c,
171 * openrisc-ibld.c, xc16x-asm.c, xc16x-dis.c, xc16x-ibld.c,
172 * xstormy16-asm.c, xstormy16-dis.c, xstormy16-ibld.c: Regenerate.
173
29670fb9
AM		 1742009-01-16 Alan Modra <amodra@bigpond.net.au>
175
176 * configure.in (commonbfdlib): Delete.
177 (SHARED_LIBADD): Add pic libiberty if such is available.
178 * configure: Regenerate.
179 * po/POTFILES.in: Regenerate.
180
21169fcf
PB		 1812009-01-14 Peter Bergner <bergner@vnet.ibm.com>
182
183 * ppc-dis.c (print_insn_powerpc): Skip insn if it is deprecated.
184 * ppc-opc.c (powerpc_opcodes) <mtfsf, mtfsf.>: Deprecate the two
185 operand form and enable the four operand form for POWER6 and later.
186 <mtfsfi, mtfsfi.>: Deprecate the two operand form and enable the
187 three operand form for POWER6 and later.
188
4ca47a51
MF		 1892009-01-14 Mike Frysinger <vapier@gentoo.org>
190
191 * bfin-dis.c (OUTS): Use "%s" as format string.
192
8acd5377
L		 1932009-01-13 H.J. Lu <hongjiu.lu@intel.com>
194
195 * i386-gen.c (cpu_flag_init): Remove a white space.
196 (operand_type_init): Likewise.
197
c1ec1875
L		 1982009-01-12 H.J. Lu <hongjiu.lu@intel.com>
199
200 * i386-opc.tbl: Add NoAVX to movnti, lfence and mfence.
201 * i386-tbl.h: Regenerated.
202
c7532693
L		 2032009-01-12 H.J. Lu <hongjiu.lu@intel.com>
204
205 * i386-dis.c (dis386): Use EbS on addB, orB, adcB, sbbB, andB,
206 subB, xorB and cmpB. Use EvS on addS, orS, adcS, sbbS, andS,
207 subS, xorS and cmpS.
208
bd5295b2
L		 2092009-01-10 H.J. Lu <hongjiu.lu@intel.com>
210
211 * i386-gen.c (cpu_flag_init): Replace CpuP4 and CpuK6 with
212 CpuClflush and CpuSYSCALL, respectively. Remove CpuK8. Add
213 CPU_COREI7_FLAGS, CPU_CLFLUSH_FLAGS and CPU_SYSCALL_FLAGS.
214 (cpu_flags): Remove CpuP4, CpuK6 and CpuK8. Add CpuClflush
215 and CpuSYSCALL.
216 (lineno): Removed.
217 (set_bitfield): Take an argument, lineno. Don't report lineno
218 on error if it is -1.
219 (process_i386_cpu_flag): Take an argument, lineno.
220 (process_i386_opcode_modifier): Likewise.
221 (process_i386_operand_type): Likewise.
222 (output_i386_opcode): Likewise.
223 (opcode_hash_entry): Add lineno.
224 (process_i386_opcodes): Updated.
225 (process_i386_registers): Likewise.
226 (process_i386_initializers): Likewise.
227
228 * i386-opc.h (CpuP4): Removed.
229 (CpuK6): Likewise.
230 (CpuK8): Likewise.
231 (CpuClflush): New.
232 (CpuSYSCALL): Likewise.
233 (CpuMMX): Updated.
234 (i386_cpu_flags): Remove cpup4, cpuk6 and cpuk8. Add
235 cpuclflush and cpusyscall.
236
237 * i386-opc.tbl: Update movnti, clflush, lfence, mfence, pause,
238 syscall and sysret.
239 * i386-init.h: Regenerated.
240 * i386-tbl.h: Likewise.
241
1b7f3fb0
L		 2422009-01-09 H.J. Lu <hongjiu.lu@intel.com>
243
244 * i386-gen.c (cpu_flag_init): Add CpuRdtscp to CPU_K8_FLAGS
245 and CPU_AMDFAM10_FLAGS. Add CPU_RDTSCP_FLAGS.
246 (cpu_flags): Add CpuRdtscp.
247 (set_bitfield): Remove CpuSledgehammer check.
248
249 * i386-opc.h (CpuRdtscp): New.
250 (CpuLM): Updated.
251 (i386_cpu_flags): Add cpurdtscp.
252
253 * i386-opc.tbl: Replace CpuSledgehammer with CpuRdtscp.
254 * i386-init.h: Regenerated.
255 * i386-tbl.h: Likewise.
256
1cb0a767
PB		 2572009-01-09 Peter Bergner <bergner@vnet.ibm.com>
258
259 * ppc-opc.c (PPCNONE): Define.
260 (NOPOWER4): Delete.
261 (powerpc_opcodes): Initialize the new "deprecated" field.
262
168e3097
L		 2632009-01-06 H.J. Lu <hongjiu.lu@intel.com>
264
265 AVX Programming Reference (December, 2008)
266 * i386-dis.c (VEX_LEN_2B_M_0): Removed.
267 (VEX_LEN_E7_P_2_M_0): Likewise.
268 (VEX_LEN_2C_P_1): Updated.
269 (VEX_LEN_E8_P_2): Likewise.
270 (vex_len_table): Remove VEX_LEN_2B_M_0 and VEX_LEN_E7_P_2_M_0.
271 (mod_table): Likewise.
272
273 * i386-opc.tbl: Add 256bit vmovntdq, vmovntpd and vmovntps.
274 * i386-tbl.h: Regenerated.
275
22da050b
L		 2762009-01-05 H.J. Lu <hongjiu.lu@intel.com>
277
278 * i386-gen.c (process_copyright): Update for 2009.
279
280 * i386-init.h: Regenerated.
281 * i386-tbl.h: Likewise.
282
0bfee649 2832009-01-05 H.J. Lu <hongjiu.lu@intel.com>
6194aaab 284
0bfee649
L		 285 AVX Programming Reference (December, 2008)
286 * i386-dis.c (OP_VEX_FMA): Removed.
c0f3af97 287 (OP_EX_VexW): Likewise.
0bfee649 288 (OP_EX_VexImmW): Likewise.
c0f3af97 289 (OP_XMM_VexW): Likewise.
c0f3af97 290 (VEXI4_Fixup): Likewise.
c0f3af97 291 (VPERMIL2_Fixup): Likewise.
c0f3af97 292 (VexI4): Likewise.
0bfee649
L		 293 (VexFMA): Likewise.
294 (Vex128FMA): Likewise.
c0f3af97
L		 295 (EXVexW): Likewise.
296 (EXdVexW): Likewise.
297 (EXqVexW): Likewise.
0bfee649 298 (EXVexImmW): Likewise.
c0f3af97 299 (XMVexW): Likewise.
c0f3af97 300 (VPERMIL2): Likewise.
0bfee649
L		 301 (PREFIX_VEX_3A48...PREFIX_VEX_3A4A): Likewise.
302 (PREFIX_VEX_3A5C...PREFIX_VEX_3A5F): Likewise.
303 (PREFIX_VEX_3A68...PREFIX_VEX_3A6F): Likewise.
304 (PREFIX_VEX_3A78...PREFIX_VEX_3A7F): Likewise.
305 (VEX_LEN_3A6A_P_2...VEX_LEN_3A6F_P_2): Likewise.
306 (VEX_LEN_3A7A_P_2...VEX_LEN_3A7F_P_2): Likewise.
307 (get_vex_imm8): Likewise.
308 (OP_EX_VexReg): Likewise.
309 vpermil2_op): Likewise.
310 (EXVexWdq): New.
311 (vex_w_dq_mode): Likewise.
312 (PREFIX_VEX_3896...PREFIX_VEX_389F): Likewise.
313 (PREFIX_VEX_38A6...PREFIX_VEX_38AF): Likewise.
314 (PREFIX_VEX_38B6...PREFIX_VEX_38BF): Likewise.
315 (es_reg): Updated.
316 (PREFIX_VEX_38DB): Likewise.
317 (PREFIX_VEX_3A4A): Likewise.
318 (PREFIX_VEX_3A60): Likewise.
319 (PREFIX_VEX_3ADF): Likewise.
320 (VEX_LEN_3ADF_P_2): Likewise.
321 (prefix_table): Remove PREFIX_VEX_3A48...PREFIX_VEX_3A4A,
322 PREFIX_VEX_3A5C...PREFIX_VEX_3A5F,
323 PREFIX_VEX_3A68...PREFIX_VEX_3A6F and
324 PREFIX_VEX_3A78...PREFIX_VEX_3A7F. Add
325 PREFIX_VEX_3896...PREFIX_VEX_389F,
326 PREFIX_VEX_38A6...PREFIX_VEX_38AF and
327 PREFIX_VEX_38B6...PREFIX_VEX_38BF.
c0f3af97 328 (vex_table): Likewise.
0bfee649
L		 329 (vex_len_table): Remove VEX_LEN_3A6A_P_2...VEX_LEN_3A6F_P_2
330 and VEX_LEN_3A7A_P_2...VEX_LEN_3A7F_P_2.
331 (putop): Support "%XW".
332 (intel_operand_size): Handle vex_w_dq_mode.
58c85be7 333
0bfee649 334 * i386-opc.h (VexNDS): Add a comment for VEX NDS and VEX DDS.
58c85be7 335
0bfee649
L		 336 * i386-opc.tbl: Remove vpermil2pd/vpermil2ps and old FMA
337 instructions. Add new FMA instructions.
28dbc079
L		 338 * i386-tbl.h: Regenerated.
339
0bfee649 3402009-01-02 Matthias Klose <doko@ubuntu.com>
3fe15143 341
0bfee649
L		 342 * or32-opc.c (or32_print_register, or32_print_immediate,
343 disassemble_insn): Don't rely on undefined sprintf behaviour.
3fe15143 344
0bfee649 345For older changes see ChangeLog-2008
252b5132
RH		 346\f
347Local Variables:
2f6d2f85
NC		 348mode: change-log
349left-margin: 8
350fill-column: 74
252b5132
RH		 351version-control: never
352End:
GDB Binutils - Deliverables
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