x86: adjust 4-XMM-register-group related warning
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
2907c2f5
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12018-03-08 Jan Beulich <jbeulich@suse.com>
2
3 * i386-opc.tbl (vmovd): Disallow Qword memory operands.
4 * i386-tlb.h: Re-generate.
5
73053c1f
JB
62018-03-08 Jan Beulich <jbeulich@suse.com>
7
8 * i386-opc.tbl (vcvtpd2ps): Fold AVX 128- and 256-bit memory
9 forms.
10 * i386-tlb.h: Re-generate.
11
52fe4420
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122018-03-07 Alan Modra <amodra@gmail.com>
13
14 * disassemble.c (disassembler): Use bfd_arch_powerpc entry for
15 bfd_arch_rs6000.
16 * disassemble.h (print_insn_rs6000): Delete.
17 * ppc-dis.c (powerpc_init_dialect): Handle rs6000.
18 (disassemble_init_powerpc): Call powerpc_init_dialect for rs6000.
19 (print_insn_rs6000): Delete.
20
a6743a54
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212018-03-03 Alan Modra <amodra@gmail.com>
22
23 * sysdep.h (opcodes_error_handler): Define.
24 (_bfd_error_handler): Declare.
25 * Makefile.am: Remove stray #.
26 * opc2c.c (main): Remove bogus -l arg handling. Print "DO NOT
27 EDIT" comment.
28 * aarch64-dis.c, * arc-dis.c, * arm-dis.c, * avr-dis.c,
29 * d30v-dis.c, * h8300-dis.c, * mmix-dis.c, * ppc-dis.c,
30 * riscv-dis.c, * s390-dis.c, * sparc-dis.c, * v850-dis.c: Use
31 opcodes_error_handler to print errors. Standardize error messages.
32 * msp430-decode.opc, * nios2-dis.c, * rl78-decode.opc: Likewise,
33 and include opintl.h.
34 * nds32-asm.c: Likewise, and include sysdep.h and opintl.h.
35 * i386-gen.c: Standardize error messages.
36 * msp430-decode.c, * rl78-decode.c, rx-decode.c: Regenerate.
37 * Makefile.in: Regenerate.
38 * epiphany-asm.c, * epiphany-desc.c, * epiphany-dis.c,
39 * epiphany-ibld.c, * fr30-asm.c, * fr30-desc.c, * fr30-dis.c,
40 * fr30-ibld.c, * frv-asm.c, * frv-desc.c, * frv-dis.c, * frv-ibld.c,
41 * frv-opc.c, * ip2k-asm.c, * ip2k-desc.c, * ip2k-dis.c, * ip2k-ibld.c,
42 * iq2000-asm.c, * iq2000-desc.c, * iq2000-dis.c, * iq2000-ibld.c,
43 * lm32-asm.c, * lm32-desc.c, * lm32-dis.c, * lm32-ibld.c,
44 * m32c-asm.c, * m32c-desc.c, * m32c-dis.c, * m32c-ibld.c,
45 * m32r-asm.c, * m32r-desc.c, * m32r-dis.c, * m32r-ibld.c,
46 * mep-asm.c, * mep-desc.c, * mep-dis.c, * mep-ibld.c, * mt-asm.c,
47 * mt-desc.c, * mt-dis.c, * mt-ibld.c, * or1k-asm.c, * or1k-desc.c,
48 * or1k-dis.c, * or1k-ibld.c, * xc16x-asm.c, * xc16x-desc.c,
49 * xc16x-dis.c, * xc16x-ibld.c, * xstormy16-asm.c, * xstormy16-desc.c,
50 * xstormy16-dis.c, * xstormy16-ibld.c: Regenerate.
51
8305403a
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522018-03-01 H.J. Lu <hongjiu.lu@intel.com>
53
54 * * i386-opc.tbl: Add "Optimize" to AVX256 and AVX512
55 vpsub[bwdq] instructions.
56 * i386-tbl.h: Regenerated.
57
e184813f
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582018-03-01 Alan Modra <amodra@gmail.com>
59
60 * configure.ac (ALL_LINGUAS): Sort.
61 * configure: Regenerate.
62
5b616bef
TP
632018-02-27 Thomas Preud'homme <thomas.preudhomme@arm.com>
64
65 * arm-dis.c (print_insn_coprocessor): Replace uses of ARM_FEATURE_COPY
66 macro by assignements.
67
b6f8c7c4
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682018-02-27 H.J. Lu <hongjiu.lu@intel.com>
69
70 PR gas/22871
71 * i386-gen.c (opcode_modifiers): Add Optimize.
72 * i386-opc.h (Optimize): New enum.
73 (i386_opcode_modifier): Add optimize.
74 * i386-opc.tbl: Add "Optimize" to "mov $imm, reg",
75 "sub reg, reg/mem", "test $imm, acc", "test $imm, reg/mem",
76 "and $imm, acc", "and $imm, reg/mem", "xor reg, reg/mem",
77 "movq $imm, reg" and AVX256 and AVX512 versions of vandnps,
78 vandnpd, vpandn, vpandnd, vpandnq, vxorps, vxorpd, vpxor,
79 vpxord and vpxorq.
80 * i386-tbl.h: Regenerated.
81
e95b887f
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822018-02-26 Alan Modra <amodra@gmail.com>
83
84 * crx-dis.c (getregliststring): Allocate a large enough buffer
85 to silence false positive gcc8 warning.
86
0bccfb29
JW
872018-02-22 Shea Levy <shea@shealevy.com>
88
89 * disassemble.c (ARCH_riscv): Define if ARCH_all.
90
6b6b6807
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912018-02-22 H.J. Lu <hongjiu.lu@intel.com>
92
93 * i386-opc.tbl: Add {rex},
94 * i386-tbl.h: Regenerated.
95
75f31665
MR
962018-02-20 Maciej W. Rozycki <macro@mips.com>
97
98 * mips16-opc.c (decode_mips16_operand) <'M'>: Remove case.
99 (mips16_opcodes): Replace `M' with `m' for "restore".
100
e207bc53
TP
1012018-02-19 Thomas Preud'homme <thomas.preudhomme@arm.com>
102
103 * arm-dis.c (thumb_opcodes): Fix BXNS mask.
104
87993319
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1052018-02-13 Maciej W. Rozycki <macro@mips.com>
106
107 * wasm32-dis.c (print_insn_wasm32): Rename `index' local
108 variable to `function_index'.
109
68d20676
NC
1102018-02-13 Nick Clifton <nickc@redhat.com>
111
112 PR 22823
113 * metag-dis.c (print_fmmov): Double buffer size to avoid warning
114 about truncation of printing.
115
d2159fdc
HW
1162018-02-12 Henry Wong <henry@stuffedcow.net>
117
118 * mips-opc.c (mips_builtin_opcodes): Correct "sigrie" encoding.
119
f174ef9f
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1202018-02-05 Nick Clifton <nickc@redhat.com>
121
122 * po/pt_BR.po: Updated Brazilian Portuguese translation.
123
be3a8dca
IT
1242018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
125
126 * i386-dis.c (enum): Add pconfig.
127 * i386-gen.c (cpu_flag_init): Add CPU_PCONFIG_FLAGS.
128 (cpu_flags): Add CpuPCONFIG.
129 * i386-opc.h (enum): Add CpuPCONFIG.
130 (i386_cpu_flags): Add cpupconfig.
131 * i386-opc.tbl: Add PCONFIG instruction.
132 * i386-init.h: Regenerate.
133 * i386-tbl.h: Likewise.
134
3233d7d0
IT
1352018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
136
137 * i386-dis.c (enum): Add PREFIX_0F09.
138 * i386-gen.c (cpu_flag_init): Add CPU_WBNOINVD_FLAGS.
139 (cpu_flags): Add CpuWBNOINVD.
140 * i386-opc.h (enum): Add CpuWBNOINVD.
141 (i386_cpu_flags): Add cpuwbnoinvd.
142 * i386-opc.tbl: Add WBNOINVD instruction.
143 * i386-init.h: Regenerate.
144 * i386-tbl.h: Likewise.
145
e925c834
JW
1462018-01-17 Jim Wilson <jimw@sifive.com>
147
148 * riscv-opc.c (riscv_opcodes) <addi>: Use z instead of 0.
149
d777820b
IT
1502018-01-17 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
151
152 * i386-gen.c (cpu_flag_init): Delete CPU_CET_FLAGS, CpuCET.
153 Add CPU_IBT_FLAGS, CPU_SHSTK_FLAGS, CPY_ANY_IBT_FLAGS,
154 CPU_ANY_SHSTK_FLAGS, CpuIBT, CpuSHSTK.
155 (cpu_flags): Add CpuIBT, CpuSHSTK.
156 * i386-opc.h (enum): Add CpuIBT, CpuSHSTK.
157 (i386_cpu_flags): Add cpuibt, cpushstk.
158 * i386-opc.tbl: Change CpuCET to CpuSHSTK and CpuIBT.
159 * i386-init.h: Regenerate.
160 * i386-tbl.h: Likewise.
161
f6efed01
NC
1622018-01-16 Nick Clifton <nickc@redhat.com>
163
164 * po/pt_BR.po: Updated Brazilian Portugese translation.
165 * po/de.po: Updated German translation.
166
2721d702
JW
1672018-01-15 Jim Wilson <jimw@sifive.com>
168
169 * riscv-opc.c (match_c_nop): New.
170 (riscv_opcodes) <addi>: Handle an addi that compresses to c.nop.
171
616dcb87
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1722018-01-15 Nick Clifton <nickc@redhat.com>
173
174 * po/uk.po: Updated Ukranian translation.
175
3957a496
NC
1762018-01-13 Nick Clifton <nickc@redhat.com>
177
178 * po/opcodes.pot: Regenerated.
179
769c7ea5
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1802018-01-13 Nick Clifton <nickc@redhat.com>
181
182 * configure: Regenerate.
183
faf766e3
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1842018-01-13 Nick Clifton <nickc@redhat.com>
185
186 2.30 branch created.
187
888a89da
IT
1882018-01-11 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
189
190 * i386-opc.tbl: Remove VL variants for 4FMAPS and 4VNNIW insns.
191 * i386-tbl.h: Regenerate.
192
cbda583a
JB
1932018-01-10 Jan Beulich <jbeulich@suse.com>
194
195 * i386-opc.tbl (v4fmaddss, v4fnmaddss): Adjust Disp8MemShift.
196 * i386-tbl.h: Re-generate.
197
c9e92278
JB
1982018-01-10 Jan Beulich <jbeulich@suse.com>
199
200 * i386-opc.tbl (vpcmpeqb, vpcmpleb, vpcmpltb, vpcmpneqb,
201 vpcmpnleb, vpcmpnltb, vpcmpequb, vpcmpleub, vpcmpltub,
202 vpcmpnequb, vpcmpnleub, vpcmpnltub, vpcmpeqw, vpcmplew,
203 vpcmpltw, vpcmpneqw, vpcmpnlew, vpcmpnltw, vpcmpequw, vpcmpleuw,
204 vpcmpltuw, vpcmpnequw, vpcmpnleuw, vpcmpnltuw): Adjust
205 Disp8MemShift of AVX512VL forms.
206 * i386-tbl.h: Re-generate.
207
35fd2b2b
JW
2082018-01-09 Jim Wilson <jimw@sifive.com>
209
210 * riscv-dis.c (maybe_print_address): If base_reg is zero,
211 then the hi_addr value is zero.
212
91d8b670
JG
2132018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
214
215 * arm-dis.c (arm_opcodes): Add csdb.
216 (thumb32_opcodes): Add csdb.
217
be2e7d95
JG
2182018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
219
220 * aarch64-tbl.h (aarch64_opcode_table): Add "csdb".
221 * aarch64-asm-2.c: Regenerate.
222 * aarch64-dis-2.c: Regenerate.
223 * aarch64-opc-2.c: Regenerate.
224
704a705d
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2252018-01-08 H.J. Lu <hongjiu.lu@intel.com>
226
227 PR gas/22681
228 * i386-opc.tbl: Properly encode vmovd with Qword memeory operand.
229 Remove AVX512 vmovd with 64-bit operands.
230 * i386-tbl.h: Regenerated.
231
35eeb78f
JW
2322018-01-05 Jim Wilson <jimw@sifive.com>
233
234 * riscv-dis.c (print_insn_args) <'s'>: Call maybe_print_address for a
235 jalr.
236
219d1afa
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2372018-01-03 Alan Modra <amodra@gmail.com>
238
239 Update year range in copyright notice of all files.
240
1508bbf5
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2412018-01-02 Jan Beulich <jbeulich@suse.com>
242
243 * i386-gen.c (operand_type_init): Restore OPERAND_TYPE_REGYMM
244 and OPERAND_TYPE_REGZMM entries.
245
1e563868 246For older changes see ChangeLog-2017
3499769a 247\f
1e563868 248Copyright (C) 2018 Free Software Foundation, Inc.
3499769a
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249
250Copying and distribution of this file, with or without modification,
251are permitted in any medium without royalty provided the copyright
252notice and this notice are preserved.
253
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255mode: change-log
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259End:
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