[deliverable/binutils-gdb.git] / opcodes / ChangeLog

2012-05-17  James Lemke  <jwlemke@codesourcery.com>

	* ppc-opc.c (powerpc_macros): Add entries for e_extlwi to e_clrlslwi.

2012-05-17  James Lemke  <jwlemke@codesourcery.com>

	* ppc-opc.c (extract_sprg): Use ALLOW8_SPRG to include VLE.

2012-05-17  Daniel Richard G.  <skunk@iskunk.org>
	    Nick Clifton  <nickc@redhat.com>

	PR 14072
	* configure.in: Add check that sysdep.h has been included before
	any system header files.
	* configure: Regenerate.
	* config.in: Regenerate.
	* sysdep.h: Generate an error if included before config.h.
	* alpha-opc.c: Include sysdep.h before any other header file.
	* alpha-dis.c: Likewise.
	* avr-dis.c: Likewise.
	* cgen-opc.c: Likewise.
	* cr16-dis.c: Likewise.
	* cris-dis.c: Likewise.
	* crx-dis.c: Likewise.
	* d10v-dis.c: Likewise.
	* d10v-opc.c: Likewise.
	* d30v-dis.c: Likewise.
	* d30v-opc.c: Likewise.
	* h8500-dis.c: Likewise.
	* i370-dis.c: Likewise.
	* i370-opc.c: Likewise.
	* m10200-dis.c: Likewise.
	* m10300-dis.c: Likewise.
	* micromips-opc.c: Likewise.
	* mips-opc.c: Likewise.
	* mips61-opc.c: Likewise.
	* moxie-dis.c: Likewise.
	* or32-opc.c: Likewise.
	* pj-dis.c: Likewise.
	* ppc-dis.c: Likewise.
	* ppc-opc.c: Likewise.
	* s390-dis.c: Likewise.
	* sh-dis.c: Likewise.
	* sh64-dis.c: Likewise.
	* sparc-dis.c: Likewise.
	* sparc-opc.c: Likewise.
	* spu-dis.c: Likewise.
	* tic30-dis.c: Likewise.
	* tic54x-dis.c: Likewise.
	* tic80-dis.c: Likewise.
	* tic80-opc.c: Likewise.
	* tilegx-dis.c: Likewise.
	* tilepro-dis.c: Likewise.
	* v850-dis.c: Likewise.
	* v850-opc.c: Likewise.
	* vax-dis.c: Likewise.
	* w65-dis.c: Likewise.
	* xgate-dis.c: Likewise.
	* xtensa-dis.c: Likewise.
	* rl78-decode.opc: Likewise.
	* rl78-decode.c: Regenerate.
	* rx-decode.opc: Likewise.
	* rx-decode.c: Regenerate.

2012-05-17  Alan Modra  <amodra@gmail.com>

	* ppc_dis.c: Don't include elf/ppc.h.

2012-05-16  Meador Inge  <meadori@codesourcery.com>

	* arm-dis.c (arm_opcodes): Don't disassemble STMFD/LDMIA sp!, {reg}
	to PUSH/POP {reg}.

2012-05-15  James Murray <jsm@jsm-net.demon.co.uk>
	    Stephane Carrez <stcarrez@nerim.fr>

	* configure.in: Add S12X and XGATE co-processor support to m68hc11
	target.
	* disassemble.c: Likewise.
	* configure: Regenerate.
	* m68hc11-dis.c: Make objdump output more consistent, use hex
	instead of decimal and use 0x prefix for hex.
	* m68hc11-opc.c: Add S12X and XGATE opcodes.

2012-05-14  James Lemke  <jwlemke@codesourcery.com>

	* ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle.
	(PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines.
	(vle_opcd_indices): New array.
	(lookup_vle): New function.
	(disassemble_init_powerpc): Revise for second (VLE) opcode table.
	(print_insn_powerpc): Likewise.
	* ppc-opc.c: Likewise.

2012-05-14  Catherine Moore  <clm@codesourcery.com>
	    Maciej W. Rozycki  <macro@codesourcery.com>
	    Rhonda Wittels  <rhonda@codesourcery.com>
	    Nathan Froyd <froydnj@codesourcery.com>

	* ppc-opc.c (insert_arx, extract_arx): New functions.
	(insert_ary, extract_ary): New functions.
	(insert_li20, extract_li20): New functions.
	(insert_rx, extract_rx): New functions.
	(insert_ry, extract_ry): New functions.
	(insert_sci8, extract_sci8): New functions.
	(insert_sci8n, extract_sci8n): New functions.
	(insert_sd4h, extract_sd4h): New functions.
	(insert_sd4w, extract_sd4w): New functions.
	(insert_vlesi, extract_vlesi): New functions.
	(insert_vlensi, extract_vlensi): New functions.
	(insert_vleui, extract_vleui): New functions.
	(insert_vleil, extract_vleil): New functions.
	(BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT.
	(BI16, BI32, BO32, B8): New.
	(B15, B24, CRD32, CRS): New.
	(CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG.
	(DB, IMM20, RD, Rx, ARX, RY, RZ): New.
	(ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New.
	(SH6_MASK): Use PPC_OPSHIFT_INV.
	(SI8, UI5, OIMM5, UI7, BO16): New.
	(VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New.
	(XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV.
	(ALLOW8_SPRG): New.
	(insert_sprg, extract_sprg): Check ALLOW8_SPRG.
	(OPVUP, OPVUP_MASK OPVUP): New
	(BD8, BD8_MASK, BD8IO, BD8IO_MASK): New.
	(EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New.
	(BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New.
	(BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New.
	(IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New.
	(IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New.
	(SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New.
	(SE_IM5, SE_IM5_MASK): New.
	(SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New.
	(EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New.
	(BO32DNZ, BO32DZ): New.
	(NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE.
	(PPCVLE): New.
	(powerpc_opcodes): Add new VLE instructions.  Update existing
	instruction to include PPCVLE if supported.
	* ppc-dis.c (ppc_opts): Add vle entry.
	(get_powerpc_dialect): New function.
	(powerpc_init_dialect): VLE support.
	(print_insn_big_powerpc): Call get_powerpc_dialect.
	(print_insn_little_powerpc): Likewise.
	(operand_value_powerpc): Handle negative shift counts.
	(print_insn_powerpc): Handle 2-byte instruction lengths.

2012-05-11  Daniel Richard G.  <skunk@iskunk.org>

	PR binutils/14028
	* configure.in: Invoke ACX_HEADER_STRING.
	* configure: Regenerate.
	* config.in: Regenerate.
	* sysdep.h: If STRINGS_WITH_STRING is defined then include both
	string.h and strings.h.

2012-05-11  Nick Clifton  <nickc@redhat.com>

	PR binutils/14006
	* arm-dis.c (print_insn): Fix detection of instruction mode in
	files containing multiple executable sections.

2012-05-03  Sean Keys  <skeys@ipdatasys.com>

	* Makefile.in, configure: regenerate
	* disassemble.c (disassembler): Recognize ARCH_XGATE.
	* xgate-dis.c (read_memory, print_insn, print_insn_xgate):
	New functions.
	* configure.in: Recognize xgate.
	* xgate-dis.c, xgate-opc.c: New files for support of xgate
	* Makefile.am (CFILES, ALL_MACHINES): New files for disassembly
	and opcode generation for xgate.

2012-04-30  DJ Delorie  <dj@redhat.com>

	* rx-decode.opc (MOV): Do not sign-extend immediates which are
	already the maximum bit size.
	* rx-decode.c: Regenerate.

2012-04-27  David S. Miller  <davem@davemloft.net>

	* sparc-dis.c (v9a_asr_reg_names): Add 'cfr'.
	* sparc-opc.c (sparc_opcodes): Add rd/wr cases for %cfr.

	* sparc-opc.c (sparc_opcodes): Add 'wr X, %pause' and 'pause'.
	* sparc-dis.c (v9a_asr_reg_names): Add 'pause'.

	* sparc-opc.c (CBCOND): New define.
	(CBCOND_XCC): Likewise.
	(cbcond): New helper macro.
	(sparc_opcodes): Add compare-and-branch instructions.

	* sparc-dis.c (print_insn_sparc): Handle ')'.
	* sparc-opc.c (sparc_opcodes): Add crypto instructions.

	* sparc-opc.c (sparc_opcodes): Rework table to put HWCAP values
	into new struct sparc_opcode 'hwcaps' field instead of 'flags'.

2012-04-12  David S. Miller  <davem@davemloft.net>

	* sparc-dis.c (X_DISP10): Define.
	(print_insn_sparc): Handle '='.

2012-04-01  Mike Frysinger  <vapier@gentoo.org>

	* bfin-dis.c (fmtconst): Replace decimal handling with a single
	sprintf call and the '*' field width.

2012-03-23  Maxim Kuvyrkov  <maxim@codesourcery.com>

	* mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.

2012-03-16  Alan Modra  <amodra@gmail.com>

	* ppc-dis.c (PPC_OPC_SEGS, PPC_OP_TO_SEG): Delete.
	(powerpc_opcd_indices): Bump array size.
	(disassemble_init_powerpc): Set powerpc_opcd_indices entries
	corresponding to unused opcodes to following entry.
	(lookup_powerpc): New function, extracted and optimised from..
	(print_insn_powerpc): ..here.

2012-03-15  Alan Modra  <amodra@gmail.com>
	    James Lemke  <jwlemke@codesourcery.com>

	* disassemble.c (disassemble_init_for_target): Handle ppc init.
	* ppc-dis.c (private): New var.
	(powerpc_init_dialect): Don't return calloc failure, instead use
	private.
	(PPC_OPCD_SEGS, PPC_OP_TO_SEG): Define.
	(powerpc_opcd_indices): New array.
	(disassemble_init_powerpc): New function.
	(print_insn_big_powerpc): Don't init dialect here.
	(print_insn_little_powerpc): Likewise.
	(print_insn_powerpc): Start search using powerpc_opcd_indices.

2012-03-10  Edmar Wienskoski  <edmar@freescale.com>

	* ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
	* ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
	(PPCVEC2, PPCTMR, E6500): New short names.
	(powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
	mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
	lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
	lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
	lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
	optional operands on sync instruction for E6500 target.

2012-03-08  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	* s390-opc.txt: Set instruction type of pku to SS_L2RDRD.

2012-02-27  Alan Modra  <amodra@gmail.com>

	* mt-dis.c: Regenerate.

2012-02-27  Alan Modra  <amodra@gmail.com>

	* v850-opc.c (extract_v8): Rearrange to make it obvious this
	is the inverse of corresponding insert function.
	(extract_d22, extract_u9, extract_r4): Likewise.
	(extract_d9): Correct sign extension.
	(extract_d16_15): Don't assume "long" is 32 bits, and don't
	rely on implementation defined behaviour for shift right of
	signed types.
	(extract_d16_16, extract_d17_16, extract_i9): Likewise.
	(extract_d23): Likewise, and correct mask.

2012-02-27  Alan Modra  <amodra@gmail.com>

	* crx-dis.c (print_arg): Mask constant to 32 bits.
	* crx-opc.c (cst4_map): Use int array.

2012-02-27  Alan Modra  <amodra@gmail.com>

	* arc-dis.c (BITS): Don't use shifts to mask off bits.
	(FIELDD): Sign extend with xor,sub.

2012-02-25  Walter Lee  <walt@tilera.com>

	* tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
	* tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
	TILEPRO_OPC_LW_TLS_SN.

2012-02-21  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.h (HLEPrefixNone): New.
	(HLEPrefixLock): Likewise.
	(HLEPrefixAny): Likewise.
	(HLEPrefixRelease): Likewise.

2012-02-08  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (HLE_Fixup1): New.
	(HLE_Fixup2): Likewise.
	(HLE_Fixup3): Likewise.
	(Ebh1): Likewise.
	(Evh1): Likewise.
	(Ebh2): Likewise.
	(Evh2): Likewise.
	(Ebh3): Likewise.
	(Evh3): Likewise.
	(MOD_C6_REG_7): Likewise.
	(MOD_C7_REG_7): Likewise.
	(RM_C6_REG_7): Likewise.
	(RM_C7_REG_7): Likewise.
	(XACQUIRE_PREFIX): Likewise.
	(XRELEASE_PREFIX): Likewise.
	(dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
	cmpxchg, dec, inc, neg, not, or, sbb, sub, xor and xadd. Use
	Ebh2/Evh2 on xchg.  Use Ebh3/Evh3 on mov.
	(reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
	not, or, sbb, sub and xor.  Use Ebh3/Evh3 on mov.  Use
	MOD_C6_REG_7 and MOD_C7_REG_7.
	(mod_table): Add MOD_C6_REG_7 and MOD_C7_REG_7.
	(rm_table): Add RM_C6_REG_7 and RM_C7_REG_7.  Add xend and
	xtest.
	(prefix_name): Handle XACQUIRE_PREFIX and XRELEASE_PREFIX.
	(CMPXCHG8B_Fixup): Handle HLE prefix on cmpxchg8b.

	* i386-gen.c (cpu_flag_init): Add CPU_HLE_FLAGS and
	CPU_RTM_FLAGS.
	(cpu_flags): Add CpuHLE and CpuRTM.
	(opcode_modifiers): Add HLEPrefixOk.

	* i386-opc.h (CpuHLE): New.
	(CpuRTM): Likewise.
	(HLEPrefixOk): Likewise.
	(i386_cpu_flags): Add cpuhle and cpurtm.
	(i386_opcode_modifier): Add hleprefixok.

	* i386-opc.tbl: Add HLEPrefixOk=3 to mov.  Add HLEPrefixOk to
	add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
	sbb, sub, xor and xadd.  Add HLEPrefixOk=2 to xchg with memory
	operand.  Add xacquire, xrelease, xabort, xbegin, xend and
	xtest.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

2012-01-24  DJ Delorie  <dj@redhat.com>

	* rl78-decode.opc (rl78_decode_opcode): Add NOT1.
	* rl78-decode.c: Regenerate.

2012-01-17  James Murray  <jsm@jsm-net.demon.co.uk>

	PR binutils/10173
	* cr16-dis.c (print_arg): Test symtab_size not num_symbols.

2012-01-17  Andreas Schwab  <schwab@linux-m68k.org>

	* m68k-opc.c (m68k_opcodes): Fix entries for pmove with BADx/BACx
	register and move them after pmove with PSR/PCSR register.

2012-01-13  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (mod_table): Add vmfunc.

	* i386-gen.c (cpu_flag_init): Add CPU_VMFUNC_FLAGS.
	(cpu_flags): CpuVMFUNC.

	* i386-opc.h (CpuVMFUNC): New.
	(i386_cpu_flags): Add cpuvmfunc.

	* i386-opc.tbl: Add vmfunc.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

For older changes see ChangeLog-2011
\f
Local Variables:
mode: change-log
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version-control: never
End:
Commit	Line	Data
a4ebc835 AM	1	2012-05-17 James Lemke <jwlemke@codesourcery.com>
	2
	3	* ppc-opc.c (powerpc_macros): Add entries for e_extlwi to e_clrlslwi.
	4
98c76446 AM	5	2012-05-17 James Lemke <jwlemke@codesourcery.com>
	6
	7	* ppc-opc.c (extract_sprg): Use ALLOW8_SPRG to include VLE.
	8
df7b86aa NC	9	2012-05-17 Daniel Richard G. <skunk@iskunk.org>
	10	Nick Clifton <nickc@redhat.com>
	11
	12	PR 14072
	13	* configure.in: Add check that sysdep.h has been included before
	14	any system header files.
	15	* configure: Regenerate.
	16	* config.in: Regenerate.
	17	* sysdep.h: Generate an error if included before config.h.
	18	* alpha-opc.c: Include sysdep.h before any other header file.
	19	* alpha-dis.c: Likewise.
	20	* avr-dis.c: Likewise.
	21	* cgen-opc.c: Likewise.
	22	* cr16-dis.c: Likewise.
	23	* cris-dis.c: Likewise.
	24	* crx-dis.c: Likewise.
	25	* d10v-dis.c: Likewise.
	26	* d10v-opc.c: Likewise.
	27	* d30v-dis.c: Likewise.
	28	* d30v-opc.c: Likewise.
	29	* h8500-dis.c: Likewise.
	30	* i370-dis.c: Likewise.
	31	* i370-opc.c: Likewise.
	32	* m10200-dis.c: Likewise.
	33	* m10300-dis.c: Likewise.
	34	* micromips-opc.c: Likewise.
	35	* mips-opc.c: Likewise.
	36	* mips61-opc.c: Likewise.
	37	* moxie-dis.c: Likewise.
	38	* or32-opc.c: Likewise.
	39	* pj-dis.c: Likewise.
	40	* ppc-dis.c: Likewise.
	41	* ppc-opc.c: Likewise.
	42	* s390-dis.c: Likewise.
	43	* sh-dis.c: Likewise.
	44	* sh64-dis.c: Likewise.
	45	* sparc-dis.c: Likewise.
	46	* sparc-opc.c: Likewise.
	47	* spu-dis.c: Likewise.
	48	* tic30-dis.c: Likewise.
	49	* tic54x-dis.c: Likewise.
	50	* tic80-dis.c: Likewise.
	51	* tic80-opc.c: Likewise.
	52	* tilegx-dis.c: Likewise.
	53	* tilepro-dis.c: Likewise.
	54	* v850-dis.c: Likewise.
	55	* v850-opc.c: Likewise.
	56	* vax-dis.c: Likewise.
	57	* w65-dis.c: Likewise.
	58	* xgate-dis.c: Likewise.
	59	* xtensa-dis.c: Likewise.
	60	* rl78-decode.opc: Likewise.
	61	* rl78-decode.c: Regenerate.
	62	* rx-decode.opc: Likewise.
	63	* rx-decode.c: Regenerate.
	64
e1dad58d AM	65	2012-05-17 Alan Modra <amodra@gmail.com>
	66
	67	* ppc_dis.c: Don't include elf/ppc.h.
	68
101af531 NC	69	2012-05-16 Meador Inge <meadori@codesourcery.com>
	70
	71	* arm-dis.c (arm_opcodes): Don't disassemble STMFD/LDMIA sp!, {reg}
	72	to PUSH/POP {reg}.
	73
6927f982 NC	74	2012-05-15 James Murray <jsm@jsm-net.demon.co.uk>
	75	Stephane Carrez <stcarrez@nerim.fr>
	76
	77	* configure.in: Add S12X and XGATE co-processor support to m68hc11
	78	target.
	79	* disassemble.c: Likewise.
	80	* configure: Regenerate.
	81	* m68hc11-dis.c: Make objdump output more consistent, use hex
	82	instead of decimal and use 0x prefix for hex.
	83	* m68hc11-opc.c: Add S12X and XGATE opcodes.
	84
b9c361e0 JL	85	2012-05-14 James Lemke <jwlemke@codesourcery.com>
	86
	87	* ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle.
	88	(PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines.
	89	(vle_opcd_indices): New array.
	90	(lookup_vle): New function.
	91	(disassemble_init_powerpc): Revise for second (VLE) opcode table.
	92	(print_insn_powerpc): Likewise.
	93	* ppc-opc.c: Likewise.
	94
	95	2012-05-14 Catherine Moore <clm@codesourcery.com>
	96	Maciej W. Rozycki <macro@codesourcery.com>
	97	Rhonda Wittels <rhonda@codesourcery.com>
	98	Nathan Froyd <froydnj@codesourcery.com>
	99
	100	* ppc-opc.c (insert_arx, extract_arx): New functions.
	101	(insert_ary, extract_ary): New functions.
	102	(insert_li20, extract_li20): New functions.
	103	(insert_rx, extract_rx): New functions.
	104	(insert_ry, extract_ry): New functions.
	105	(insert_sci8, extract_sci8): New functions.
	106	(insert_sci8n, extract_sci8n): New functions.
	107	(insert_sd4h, extract_sd4h): New functions.
	108	(insert_sd4w, extract_sd4w): New functions.
	109	(insert_vlesi, extract_vlesi): New functions.
	110	(insert_vlensi, extract_vlensi): New functions.
	111	(insert_vleui, extract_vleui): New functions.
	112	(insert_vleil, extract_vleil): New functions.
	113	(BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT.
	114	(BI16, BI32, BO32, B8): New.
	115	(B15, B24, CRD32, CRS): New.
	116	(CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG.
	117	(DB, IMM20, RD, Rx, ARX, RY, RZ): New.
	118	(ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New.
	119	(SH6_MASK): Use PPC_OPSHIFT_INV.
	120	(SI8, UI5, OIMM5, UI7, BO16): New.
	121	(VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New.
	122	(XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV.
	123	(ALLOW8_SPRG): New.
	124	(insert_sprg, extract_sprg): Check ALLOW8_SPRG.
	125	(OPVUP, OPVUP_MASK OPVUP): New
	126	(BD8, BD8_MASK, BD8IO, BD8IO_MASK): New.
	127	(EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New.
	128	(BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New.
	129	(BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New.
	130	(IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New.
	131	(IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New.
	132	(SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New.
	133	(SE_IM5, SE_IM5_MASK): New.
	134	(SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New.
	135	(EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New.
	136	(BO32DNZ, BO32DZ): New.
	137	(NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE.
	138	(PPCVLE): New.
	139	(powerpc_opcodes): Add new VLE instructions. Update existing
	140	instruction to include PPCVLE if supported.
	141	* ppc-dis.c (ppc_opts): Add vle entry.
	142	(get_powerpc_dialect): New function.
	143	(powerpc_init_dialect): VLE support.
	144	(print_insn_big_powerpc): Call get_powerpc_dialect.
	145	(print_insn_little_powerpc): Likewise.
	146	(operand_value_powerpc): Handle negative shift counts.
	147	(print_insn_powerpc): Handle 2-byte instruction lengths.
	148
208a4923 NC	149	2012-05-11 Daniel Richard G. <skunk@iskunk.org>
	150
	151	PR binutils/14028
	152	* configure.in: Invoke ACX_HEADER_STRING.
	153	* configure: Regenerate.
	154	* config.in: Regenerate.
	155	* sysdep.h: If STRINGS_WITH_STRING is defined then include both
	156	string.h and strings.h.
	157
6750a3a7 NC	158	2012-05-11 Nick Clifton <nickc@redhat.com>
	159
	160	PR binutils/14006
	161	* arm-dis.c (print_insn): Fix detection of instruction mode in
	162	files containing multiple executable sections.
	163
f6c1a2d5 NC	164	2012-05-03 Sean Keys <skeys@ipdatasys.com>
	165
	166	* Makefile.in, configure: regenerate
	167	* disassemble.c (disassembler): Recognize ARCH_XGATE.
	168	* xgate-dis.c (read_memory, print_insn, print_insn_xgate):
	169	New functions.
	170	* configure.in: Recognize xgate.
	171	* xgate-dis.c, xgate-opc.c: New files for support of xgate
	172	* Makefile.am (CFILES, ALL_MACHINES): New files for disassembly
	173	and opcode generation for xgate.
	174
78e98aab DD	175	2012-04-30 DJ Delorie <dj@redhat.com>
	176
	177	* rx-decode.opc (MOV): Do not sign-extend immediates which are
	178	already the maximum bit size.
	179	* rx-decode.c: Regenerate.
	180
ec668d69 DM	181	2012-04-27 David S. Miller <davem@davemloft.net>
ec668d69 DM	182
2e52845b DM	183	* sparc-dis.c (v9a_asr_reg_names): Add 'cfr'.
	184	* sparc-opc.c (sparc_opcodes): Add rd/wr cases for %cfr.
	185
58004e23 DM	186	* sparc-opc.c (sparc_opcodes): Add 'wr X, %pause' and 'pause'.
	187	* sparc-dis.c (v9a_asr_reg_names): Add 'pause'.
	188
698544e1 DM	189	* sparc-opc.c (CBCOND): New define.
	190	(CBCOND_XCC): Likewise.
	191	(cbcond): New helper macro.
	192	(sparc_opcodes): Add compare-and-branch instructions.
	193
6cda1326 DM	194	* sparc-dis.c (print_insn_sparc): Handle ')'.
	195	* sparc-opc.c (sparc_opcodes): Add crypto instructions.
	196
ec668d69 DM	197	* sparc-opc.c (sparc_opcodes): Rework table to put HWCAP values
	198	into new struct sparc_opcode 'hwcaps' field instead of 'flags'.
	199
2615994e DM	200	2012-04-12 David S. Miller <davem@davemloft.net>
	201
	202	* sparc-dis.c (X_DISP10): Define.
	203	(print_insn_sparc): Handle '='.
	204
5de10af0 MF	205	2012-04-01 Mike Frysinger <vapier@gentoo.org>
	206
	207	* bfin-dis.c (fmtconst): Replace decimal handling with a single
	208	sprintf call and the '*' field width.
	209
55a36193 MK	210	2012-03-23 Maxim Kuvyrkov <maxim@codesourcery.com>
	211
	212	* mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.
	213
d6688282 AM	214	2012-03-16 Alan Modra <amodra@gmail.com>
	215
	216	* ppc-dis.c (PPC_OPC_SEGS, PPC_OP_TO_SEG): Delete.
	217	(powerpc_opcd_indices): Bump array size.
	218	(disassemble_init_powerpc): Set powerpc_opcd_indices entries
	219	corresponding to unused opcodes to following entry.
	220	(lookup_powerpc): New function, extracted and optimised from..
	221	(print_insn_powerpc): ..here.
	222
b240011a AM	223	2012-03-15 Alan Modra <amodra@gmail.com>
	224	James Lemke <jwlemke@codesourcery.com>
	225
	226	* disassemble.c (disassemble_init_for_target): Handle ppc init.
	227	* ppc-dis.c (private): New var.
	228	(powerpc_init_dialect): Don't return calloc failure, instead use
	229	private.
	230	(PPC_OPCD_SEGS, PPC_OP_TO_SEG): Define.
	231	(powerpc_opcd_indices): New array.
	232	(disassemble_init_powerpc): New function.
	233	(print_insn_big_powerpc): Don't init dialect here.
	234	(print_insn_little_powerpc): Likewise.
	235	(print_insn_powerpc): Start search using powerpc_opcd_indices.
	236
aea77599 AM	237	2012-03-10 Edmar Wienskoski <edmar@freescale.com>
	238
	239	* ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
	240	* ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
	241	(PPCVEC2, PPCTMR, E6500): New short names.
	242	(powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
	243	mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
	244	lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
	245	lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
	246	lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
	247	optional operands on sync instruction for E6500 target.
	248
5333187a AK	249	2012-03-08 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
	250
	251	* s390-opc.txt: Set instruction type of pku to SS_L2RDRD.
	252
a597d2d3 AM	253	2012-02-27 Alan Modra <amodra@gmail.com>
	254
	255	* mt-dis.c: Regenerate.
	256
3f26eb3a AM	257	2012-02-27 Alan Modra <amodra@gmail.com>
	258
	259	* v850-opc.c (extract_v8): Rearrange to make it obvious this
	260	is the inverse of corresponding insert function.
	261	(extract_d22, extract_u9, extract_r4): Likewise.
	262	(extract_d9): Correct sign extension.
	263	(extract_d16_15): Don't assume "long" is 32 bits, and don't
	264	rely on implementation defined behaviour for shift right of
	265	signed types.
	266	(extract_d16_16, extract_d17_16, extract_i9): Likewise.
	267	(extract_d23): Likewise, and correct mask.
	268
1f42f8b3 AM	269	2012-02-27 Alan Modra <amodra@gmail.com>
	270
	271	* crx-dis.c (print_arg): Mask constant to 32 bits.
	272	* crx-opc.c (cst4_map): Use int array.
	273
cdb06235 AM	274	2012-02-27 Alan Modra <amodra@gmail.com>
	275
	276	* arc-dis.c (BITS): Don't use shifts to mask off bits.
	277	(FIELDD): Sign extend with xor,sub.
	278
6f7be959 WL	279	2012-02-25 Walter Lee <walt@tilera.com>
	280
	281	* tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
	282	* tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
	283	TILEPRO_OPC_LW_TLS_SN.
	284
82c2def5 L	285	2012-02-21 H.J. Lu <hongjiu.lu@intel.com>
	286
	287	* i386-opc.h (HLEPrefixNone): New.
	288	(HLEPrefixLock): Likewise.
	289	(HLEPrefixAny): Likewise.
	290	(HLEPrefixRelease): Likewise.
	291
42164a71 L	292	2012-02-08 H.J. Lu <hongjiu.lu@intel.com>
	293
	294	* i386-dis.c (HLE_Fixup1): New.
	295	(HLE_Fixup2): Likewise.
	296	(HLE_Fixup3): Likewise.
	297	(Ebh1): Likewise.
	298	(Evh1): Likewise.
	299	(Ebh2): Likewise.
	300	(Evh2): Likewise.
	301	(Ebh3): Likewise.
	302	(Evh3): Likewise.
	303	(MOD_C6_REG_7): Likewise.
	304	(MOD_C7_REG_7): Likewise.
	305	(RM_C6_REG_7): Likewise.
	306	(RM_C7_REG_7): Likewise.
	307	(XACQUIRE_PREFIX): Likewise.
	308	(XRELEASE_PREFIX): Likewise.
	309	(dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
	310	cmpxchg, dec, inc, neg, not, or, sbb, sub, xor and xadd. Use
	311	Ebh2/Evh2 on xchg. Use Ebh3/Evh3 on mov.
	312	(reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
	313	not, or, sbb, sub and xor. Use Ebh3/Evh3 on mov. Use
	314	MOD_C6_REG_7 and MOD_C7_REG_7.
	315	(mod_table): Add MOD_C6_REG_7 and MOD_C7_REG_7.
	316	(rm_table): Add RM_C6_REG_7 and RM_C7_REG_7. Add xend and
	317	xtest.
	318	(prefix_name): Handle XACQUIRE_PREFIX and XRELEASE_PREFIX.
	319	(CMPXCHG8B_Fixup): Handle HLE prefix on cmpxchg8b.
	320
	321	* i386-gen.c (cpu_flag_init): Add CPU_HLE_FLAGS and
	322	CPU_RTM_FLAGS.
	323	(cpu_flags): Add CpuHLE and CpuRTM.
	324	(opcode_modifiers): Add HLEPrefixOk.
	325
	326	* i386-opc.h (CpuHLE): New.
	327	(CpuRTM): Likewise.
	328	(HLEPrefixOk): Likewise.
	329	(i386_cpu_flags): Add cpuhle and cpurtm.
	330	(i386_opcode_modifier): Add hleprefixok.
	331
	332	* i386-opc.tbl: Add HLEPrefixOk=3 to mov. Add HLEPrefixOk to
	333	add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
	334	sbb, sub, xor and xadd. Add HLEPrefixOk=2 to xchg with memory
	335	operand. Add xacquire, xrelease, xabort, xbegin, xend and
	336	xtest.
	337	* i386-init.h: Regenerated.
	338	* i386-tbl.h: Likewise.
	339
21abe33a DD	340	2012-01-24 DJ Delorie <dj@redhat.com>
	341
	342	* rl78-decode.opc (rl78_decode_opcode): Add NOT1.
	343	* rl78-decode.c: Regenerate.
	344
e20cc039 AM	345	2012-01-17 James Murray <jsm@jsm-net.demon.co.uk>
	346
	347	PR binutils/10173
	348	* cr16-dis.c (print_arg): Test symtab_size not num_symbols.
	349
e143d25c AS	350	2012-01-17 Andreas Schwab <schwab@linux-m68k.org>
	351
	352	* m68k-opc.c (m68k_opcodes): Fix entries for pmove with BADx/BACx
	353	register and move them after pmove with PSR/PCSR register.
	354
8729a6f6 L	355	2012-01-13 H.J. Lu <hongjiu.lu@intel.com>
	356
	357	* i386-dis.c (mod_table): Add vmfunc.
	358
	359	* i386-gen.c (cpu_flag_init): Add CPU_VMFUNC_FLAGS.
	360	(cpu_flags): CpuVMFUNC.
	361
	362	* i386-opc.h (CpuVMFUNC): New.
	363	(i386_cpu_flags): Add cpuvmfunc.
	364
	365	* i386-opc.tbl: Add vmfunc.
	366	* i386-init.h: Regenerated.
	367	* i386-tbl.h: Likewise.
5011093d	368
23e1d329	369	For older changes see ChangeLog-2011
252b5132 RH	370	\f
252b5132 RH	371	Local Variables:
2f6d2f85 NC	372	mode: change-log
	373	left-margin: 8
	374	fill-column: 74
252b5132 RH	375	version-control: never
252b5132 RH	376	End: