MIPS/opcodes: Remove microMIPS 48-bit LI instruction
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
a6c70539
MR
12014-08-21 Maciej W. Rozycki <macro@codesourcery.com>
2
3 * micromips-opc.c (micromips_opcodes): Remove #ifdef-ed out
4 48-bit "li" encoding.
5
9ace48f3
AA
62014-08-19 Andreas Arnez <arnez@linux.vnet.ibm.com>
7
8 * s390-dis.c (s390_insn_length, s390_insn_matches_opcode)
9 (s390_print_insn_with_opcode, opcode_mask_more_specific): New
10 static functions, code was moved from...
11 (print_insn_s390): ...here.
12 (s390_extract_operand): Adjust comment. Change type of first
13 parameter from 'unsigned char *' to 'const bfd_byte *'.
14 (union operand_value): New.
15 (s390_extract_operand): Change return type to union operand_value.
16 Also avoid integer overflow in sign-extension.
17 (s390_print_insn_with_opcode): Adjust to changed return value from
18 s390_extract_operand(). Change "%i" printf format to "%u" for
19 unsigned values.
20 (init_disasm): Simplify initialization of opc_index[]. This also
21 fixes an access after the last element of s390_opcodes[].
22 (print_insn_s390): Simplify the opcode search loop.
23 Check architecture mask against all searched opcodes, not just the
24 first matching one.
25 (s390_print_insn_with_opcode): Drop function pointer dereferences
26 without effect.
27 (print_insn_s390): Likewise.
28 (s390_insn_length): Simplify formula for return value.
29 (s390_print_insn_with_opcode): Avoid special handling for the
30 separator before the first operand. Use new local variable
31 'flags' in place of 'operand->flags'.
32
60ac5798
MF
332014-08-14 Mike Frysinger <vapier@gentoo.org>
34
35 * bfin-dis.c (struct private): Change int's to bfd_boolean's.
36 (decode_LOGI2op_0, decode_COMPI2opD_0, decode_COMPI2opP_0,
37 decode_dagMODik_0, decode_LDIMMhalf_0, decode_linkage_0):
38 Change assignment of 1 to priv->comment to TRUE.
39 (print_insn_bfin): Change legal to a bfd_boolean. Change
40 assignment of 0/1 with priv comment and parallel and legal
41 to FALSE/TRUE.
42
b3f3b4b0
MF
432014-08-14 Mike Frysinger <vapier@gentoo.org>
44
45 * bfin-dis.c (OUT): Define.
46 (decode_CC2stat_0): Declare new op_names array.
47 Replace multiple if statements with a single one.
48
a4e600b2
MF
492014-08-14 Mike Frysinger <vapier@gentoo.org>
50
51 * bfin-dis.c (struct private): Add iw0.
52 (_print_insn_bfin): Assign iw0 to priv.iw0.
53 (print_insn_bfin): Drop ifetch and use priv.iw0.
54
703ec4e8
MF
552014-08-13 Mike Frysinger <vapier@gentoo.org>
56
57 * bfin-dis.c (comment, parallel): Move from global scope ...
58 (struct private): ... to this new struct.
59 (decode_ProgCtrl_0, decode_CaCTRL_0, decode_PushPopReg_0,
60 decode_PushPopMultiple_0, decode_ccMV_0, decode_CCflag_0,
61 decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0,
62 decode_LOGI2op_0, decode_COMPI2opD_0, decode_COMPI2opP_0,
63 decode_dagMODik_0, decode_LoopSetup_0, decode_LDIMMhalf_0,
64 decode_CALLa_0, decode_linkage_0, decode_pseudoDEBUG_0,
65 decode_pseudoOChar_0, decode_pseudodbg_assert_0, _print_insn_bfin,
66 print_insn_bfin): Declare private struct. Use priv's comment and
67 parallel members.
68
ed2c4879
MF
692014-08-13 Mike Frysinger <vapier@gentoo.org>
70
71 * bfin-dis.c (ifetch): Do not align pc to 2 bytes.
72 (_print_insn_bfin): Add check for unaligned pc.
73
ba329817
MF
742014-08-13 Mike Frysinger <vapier@gentoo.org>
75
76 * bfin-dis.c (ifetch): New function.
77 (_print_insn_bfin, print_insn_bfin): Call new ifetch and return
78 -1 when it errors.
79
43885403
MF
802014-07-29 Matthew Fortune <matthew.fortune@imgtec.com>
81
82 * micromips-opc.c (COD): Rename throughout to...
83 (CM): New define, update to use INSN_COPROC_MOVE.
84 (LCD): Rename throughout to...
85 (LC): New define, update to use INSN_LOAD_COPROC.
86 * mips-opc.c: Likewise.
87
351cdf24
MF
882014-07-29 Matthew Fortune <matthew.fortune@imgtec.com>
89
90 * micromips-opc.c (COD, LCD) New macros.
91 (cfc1, ctc1): Remove FP_S attribute.
92 (dmfc1, mfc1, mfhc1): Add LCD attribute.
93 (dmtc1, mtc1, mthc1): Add COD attribute.
94 * mips-opc.c (cfc1, cftc1, ctc, cttc1): Remove FP_S attribute.
95
90a915bf
IT
962014-07-22 Sergey Guriev <sergey.s.guriev@intel.com>
97 Alexander Ivchenko <alexander.ivchenko@intel.com>
98 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
99 Sergey Lega <sergey.s.lega@intel.com>
100 Anna Tikhonova <anna.tikhonova@intel.com>
101 Ilya Tocar <ilya.tocar@intel.com>
102 Andrey Turetskiy <andrey.turetskiy@intel.com>
103 Ilya Verbin <ilya.verbin@intel.com>
104 Kirill Yukhin <kirill.yukhin@intel.com>
105 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
106
107 * i386-dis-evex.h: Updated.
108 * i386-dis.c (PREFIX enum): Add PREFIX_EVEX_0F54, PREFIX_EVEX_0F55,
109 PREFIX_EVEX_0F56, PREFIX_EVEX_0F57, PREFIX_EVEX_0F3A16,
110 PREFIX_EVEX_0F3A22, PREFIX_EVEX_0F3A50, PREFIX_EVEX_0F3A51,
111 PREFIX_EVEX_0F3A56, PREFIX_EVEX_0F3A57, PREFIX_EVEX_0F3A66,
112 PREFIX_EVEX_0F3A67.
113 (VEX_LEN enum): Add VEX_LEN_0F92_P_2, VEX_LEN_0F93_P_2,
114 VEX_W_0F92_P_2_LEN_0, VEX_W_0F93_P_2_LEN_0.
115 (VEX_W enum): Add EVEX_W_0F54_P_0, EVEX_W_0F54_P_2, EVEX_W_0F55_P_0,
116 EVEX_W_0F55_P_2, EVEX_W_0F56_P_0, EVEX_W_0F56_P_2, EVEX_W_0F57_P_0,
117 EVEX_W_0F57_P_2, EVEX_W_0F78_P_2, EVEX_W_0F79_P_2, EVEX_W_0F7A_P_2,
118 EVEX_W_0F7B_P_2, EVEX_W_0F3838_P_1, EVEX_W_0F3839_P_1,
119 EVEX_W_0F3A16_P_2, EVEX_W_0F3A22_P_2, EVEX_W_0F3A50_P_2,
120 EVEX_W_0F3A51_P_2, EVEX_W_0F3A56_P_2, EVEX_W_0F3A57_P_2,
121 EVEX_W_0F3A66_P_2, EVEX_W_0F3A67_P_2.
122 (prefix_table): Add entries for new instructions.
123 (vex_len_table): Ditto.
124 (vex_w_table): Ditto.
125 (OP_E_memory): Update xmmq_mode handling.
126 * i386-gen.c (cpu_flag_init): Add CPU_AVX512DQ_FLAGS.
127 (cpu_flags): Add CpuAVX512DQ.
128 * i386-init.h: Regenerared.
129 * i386-opc.h (CpuAVX512DQ): New.
130 (i386_cpu_flags): Add cpuavx512dq.
131 * i386-opc.tbl: Add AVX512DQ instructions.
132 * i386-tbl.h: Regenerate.
133
1ba585e8
IT
1342014-07-22 Sergey Guriev <sergey.s.guriev@intel.com>
135 Alexander Ivchenko <alexander.ivchenko@intel.com>
136 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
137 Sergey Lega <sergey.s.lega@intel.com>
138 Anna Tikhonova <anna.tikhonova@intel.com>
139 Ilya Tocar <ilya.tocar@intel.com>
140 Andrey Turetskiy <andrey.turetskiy@intel.com>
141 Ilya Verbin <ilya.verbin@intel.com>
142 Kirill Yukhin <kirill.yukhin@intel.com>
143 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
144
145 * i386-dis-evex.h: Add new instructions (prefixes bellow).
146 * i386-dis.c (fetch_data): Add EdqwS, Edb, Edw, MaskBDE.
147 (enum): Add dqw_swap_mode, db_mode, dw_mode, mask_bd_mode, REG_EVEX_0F71.
148 (PREFIX enum): Add PREFIX_VEX_0F4A, PREFIX_VEX_0F99, PREFIX_VEX_0F3A31,
149 PREFIX_VEX_0F3A33, PREFIX_EVEX_0F60, PREFIX_EVEX_0F61, PREFIX_EVEX_0F63,
150 PREFIX_EVEX_0F64, PREFIX_EVEX_0F65, PREFIX_EVEX_0F67, PREFIX_EVEX_0F68,
151 PREFIX_EVEX_0F69, PREFIX_EVEX_0F6B, PREFIX_EVEX_0F71_REG_2, PREFIX_EVEX_0F71_REG_4,
152 PREFIX_EVEX_0F71_REG_6, PREFIX_EVEX_0F73_REG_3, PREFIX_EVEX_0F73_REG_7,
153 PREFIX_EVEX_0F74, PREFIX_EVEX_0F75, PREFIX_EVEX_0FC4, PREFIX_EVEX_0FC5,
154 PREFIX_EVEX_0FD1, PREFIX_EVEX_0FD5, PREFIX_EVEX_0FD8, PREFIX_EVEX_0FD9,
155 PREFIX_EVEX_0FDA, PREFIX_EVEX_0FDC, PREFIX_EVEX_0FDD, PREFIX_EVEX_0FDE,
156 PREFIX_EVEX_0FE0, PREFIX_EVEX_0FE1, PREFIX_EVEX_0FE3, PREFIX_EVEX_0FE4,
157 PREFIX_EVEX_0FE5, PREFIX_EVEX_0FE8, PREFIX_EVEX_0FE9, PREFIX_EVEX_0FEA,
158 PREFIX_EVEX_0FEC, PREFIX_EVEX_0FED, PREFIX_EVEX_0FEE, PREFIX_EVEX_0FF1,
159 PREFIX_EVEX_0FF5, PREFIX_EVEX_0FF6, PREFIX_EVEX_0FF8, PREFIX_EVEX_0FF9,
160 PREFIX_EVEX_0FFC, PREFIX_EVEX_0FFD, PREFIX_EVEX_0F3800, PREFIX_EVEX_0F3804,
161 PREFIX_EVEX_0F380B, PREFIX_EVEX_0F3810, PREFIX_EVEX_0F381C, PREFIX_EVEX_0F381D,
162 PREFIX_EVEX_0F3820, PREFIX_EVEX_0F3826, PREFIX_EVEX_0F382B, PREFIX_EVEX_0F3830,
163 PREFIX_EVEX_0F3838, PREFIX_EVEX_0F383C, PREFIX_EVEX_0F383E, PREFIX_EVEX_0F3866,
164 PREFIX_EVEX_0F3875, PREFIX_EVEX_0F3878, PREFIX_EVEX_0F3879, PREFIX_EVEX_0F387A,
165 PREFIX_EVEX_0F387B, PREFIX_EVEX_0F387D, PREFIX_EVEX_0F388D, PREFIX_EVEX_0F3A0F,
166 PREFIX_EVEX_0F3A14, PREFIX_EVEX_0F3A15, PREFIX_EVEX_0F3A20, PREFIX_EVEX_0F3A3E,
167 PREFIX_EVEX_0F3A3F, PREFIX_EVEX_0F3A42.
168 (VEX_LEN enum): Add VEX_LEN_0F41_P_2, VEX_LEN_0F42_P_2, VEX_LEN_0F44_P_2,
169 VEX_LEN_0F45_P_2, VEX_LEN_0F46_P_2, VEX_LEN_0F47_P_2, VEX_LEN_0F4A_P_0,
170 VEX_LEN_0F4A_P_2, VEX_LEN_0F4B_P_0, VEX_LEN_0F90_P_2, VEX_LEN_0F91_P_2,
171 VEX_LEN_0F92_P_3, VEX_LEN_0F93_P_3, VEX_LEN_0F98_P_2, VEX_LEN_0F99_P_0,
172 VEX_LEN_0F99_P_2, VEX_LEN_0F3A31_P_2, VEX_LEN_0F3A33_P_2, VEX_W_0F41_P_2_LEN_1,
173 VEX_W_0F42_P_2_LEN_1, VEX_W_0F44_P_2_LEN_0, VEX_W_0F45_P_2_LEN_1,
174 VEX_W_0F46_P_2_LEN_1, VEX_W_0F47_P_2_LEN_1, VEX_W_0F4A_P_0_LEN_1,
175 VEX_W_0F4A_P_2_LEN_1, VEX_W_0F4B_P_0_LEN_1, VEX_W_0F90_P_2_LEN_0,
176 VEX_W_0F91_P_2_LEN_0, VEX_W_0F92_P_3_LEN_0, VEX_W_0F93_P_3_LEN_0,
177 VEX_W_0F98_P_2_LEN_0, VEX_W_0F99_P_0_LEN_0, VEX_W_0F99_P_2_LEN_0,
178 VEX_W_0F3A31_P_2_LEN_0, VEX_W_0F3A33_P_2_LEN_0.
179 (VEX_W enum): Add EVEX_W_0F6B_P_2, EVEX_W_0F6F_P_3, EVEX_W_0F7F_P_3,
180 EVEX_W_0F3810_P_1, EVEX_W_0F3810_P_2, EVEX_W_0F3811_P_2, EVEX_W_0F3812_P_2,
181 EVEX_W_0F3820_P_1, EVEX_W_0F3826_P_1, EVEX_W_0F3826_P_2, EVEX_W_0F3828_P_1,
182 EVEX_W_0F3829_P_1, EVEX_W_0F382B_P_2, EVEX_W_0F3830_P_1, EVEX_W_0F3866_P_2,
183 EVEX_W_0F3875_P_2, EVEX_W_0F3878_P_2, EVEX_W_0F3879_P_2, EVEX_W_0F387A_P_2,
184 EVEX_W_0F387B_P_2, EVEX_W_0F387D_P_2, EVEX_W_0F388D_P_2, EVEX_W_0F3A3E_P_2,
185 EVEX_W_0F3A3F_P_2, EVEX_W_0F3A42_P_2.
186 (prefix_table): Add entries for new instructions.
187 (vex_table) : Ditto.
188 (vex_len_table): Ditto.
189 (vex_w_table): Ditto.
190 (intel_operand_size): Add db_mode, dw_mode, dqw_swap_mode,
191 mask_bd_mode handling.
192 (OP_E_register): Add dqw_swap_mode, dw_mode, db_mode, mask_bd_mode
193 handling.
194 (OP_E_memory): Add dqw_mode, dw_mode, dqw_swap_mode, dqb_mode, db_mode
195 handling.
196 (OP_G): Add db_mode, dw_mode, dqw_swap_mode, mask_bd_mode handling.
197 (OP_EX): Add dqw_swap_mode handling.
198 (OP_VEX): Add mask_bd_mode handling.
199 (OP_Mask): Add mask_bd_mode handling.
200 * i386-gen.c (cpu_flag_init): Add CPU_AVX512BW_FLAGS.
201 (cpu_flags): Add CpuAVX512BW.
202 * i386-init.h: Regenerated.
203 * i386-opc.h (CpuAVX512BW): New.
204 (i386_cpu_flags): Add cpuavx512bw.
205 * i386-opc.tbl: Add AVX512BW instructions.
206 * i386-tbl.h: Regenerate.
207
99282af6
IT
2082014-07-22 Sergey Guriev <sergey.s.guriev@intel.com>
209 Alexander Ivchenko <alexander.ivchenko@intel.com>
210 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
211 Sergey Lega <sergey.s.lega@intel.com>
212 Anna Tikhonova <anna.tikhonova@intel.com>
213 Ilya Tocar <ilya.tocar@intel.com>
214 Andrey Turetskiy <andrey.turetskiy@intel.com>
215 Ilya Verbin <ilya.verbin@intel.com>
216 Kirill Yukhin <kirill.yukhin@intel.com>
217 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
218
219 * i386-opc.tbl: Add AVX512VL and AVX512CD instructions.
220 * i386-tbl.h: Regenerate.
221
b28d1bda
IT
2222014-07-22 Sergey Guriev <sergey.s.guriev@intel.com>
223 Alexander Ivchenko <alexander.ivchenko@intel.com>
224 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
225 Sergey Lega <sergey.s.lega@intel.com>
226 Anna Tikhonova <anna.tikhonova@intel.com>
227 Ilya Tocar <ilya.tocar@intel.com>
228 Andrey Turetskiy <andrey.turetskiy@intel.com>
229 Ilya Verbin <ilya.verbin@intel.com>
230 Kirill Yukhin <kirill.yukhin@intel.com>
231 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
232
233 * i386-dis.c (intel_operand_size): Support 128/256 length in
234 vex_vsib_q_w_dq_mode.
235 (OP_E_memory): Add ymmq_mode handling, handle new broadcast.
236 * i386-gen.c (cpu_flag_init): Add CPU_AVX512VL_FLAGS.
237 (cpu_flags): Add CpuAVX512VL.
238 * i386-init.h: Regenerated.
239 * i386-opc.h (CpuAVX512VL): New.
240 (i386_cpu_flags): Add cpuavx512vl.
241 (BROADCAST_1TO4, BROADCAST_1TO2): Define.
242 * i386-opc.tbl: Add AVX512VL instructions.
243 * i386-tbl.h: Regenerate.
244
018dc9be
SK
2452014-07-20 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
246
247 * or1k-desc.c, * or1k-desc.h, * or1k-opc.c, * or1k-opc.h,
248 * or1k-opinst.c: Regenerate.
249
792f7758
IT
2502014-07-08 Ilya Tocar <ilya.tocar@intel.com>
251
252 * i386-dis-evex.h (EVEX_W_0F10_P_1_M_1): Fix vmovss.
253 (EVEX_W_0F10_P_3_M_1): Fix vmovsd.
254
35eafcc7
AM
2552014-07-04 Alan Modra <amodra@gmail.com>
256
257 * configure.ac: Rename from configure.in.
258 * Makefile.in: Regenerate.
259 * config.in: Regenerate.
260
2e98a7bd
AM
2612014-07-04 Alan Modra <amodra@gmail.com>
262
263 * configure.in: Include bfd/version.m4.
264 (AC_INIT, AM_INIT_AUTOMAKE): Use modern form.
265 (BFD_VERSION): Delete.
266 * Makefile.am (CONFIG_STATUS_DEPENDENCIES): Remove bfd/configure.in.
267 * configure: Regenerate.
268 * Makefile.in: Regenerate.
269
f36e8886
BS
2702014-07-01 Barney Stratford <barney_stratford@fastmail.fm>
271 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
272 Pitchumani Sivanupandi <pitchumani.s@atmel.com>
273 Soundararajan <Sounderarajan.D@atmel.com>
274
275 * avr-dis.c (avr_operand): Handle constraint j for 16 bit lds/sts.
2e98a7bd
AM
276 (print_insn_avr): Do not select opcode if insn ISA is avrtiny and
277 machine is not avrtiny.
f36e8886 278
6ddf779d
PDM
2792014-06-26 Philippe De Muyter <phdm@macqel.be>
280
281 * or1k-desc.h (spr_field_masks): Add U suffix to the end of long
282 constants.
283
c151b1c6
AM
2842014-06-12 Alan Modra <amodra@gmail.com>
285
286 * or1k-asm.c, * or1k-desc.c, * or1k-desc.h, * or1k-dis.c,
287 * or1k-ibld.c, * or1k-opc.c, * or1k-opc.h, * or1k-opinst.c: Regenerate.
288
d9949a36
L
2892014-06-10 H.J. Lu <hongjiu.lu@intel.com>
290
291 * i386-dis.c (fwait_prefix): New.
292 (ckprefix): Set fwait_prefix.
293 (print_insn): Properly print prefixes before fwait.
294
a47622ac
AM
2952014-06-07 Alan Modra <amodra@gmail.com>
296
297 * ppc-opc.c (UISIGNOPT): Define and use with cmpli.
298
270c9937
JB
2992014-06-05 Joel Brobecker <brobecker@adacore.com>
300
301 * Makefile.am (CONFIG_STATUS_DEPENDENCIES): Add dependency on
302 bfd's development.sh.
303 * Makefile.in, configure: Regenerate.
304
9f445129
NC
3052014-06-03 Nick Clifton <nickc@redhat.com>
306
307 * msp430-dis.c (msp430_doubleoperand): Use extension_word to
308 decide when extended addressing is being used.
309
ec9a8169
EB
3102014-06-02 Eric Botcazou <ebotcazou@adacore.com>
311
312 * sparc-opc.c (cas): Disable for LEON.
313 (casl): Likewise.
314
cdf2a8b7
AM
3152014-05-20 Alan Modra <amodra@gmail.com>
316
317 * m68k-dis.c: Don't include setjmp.h.
318
df18fdba
L
3192014-05-09 H.J. Lu <hongjiu.lu@intel.com>
320
321 * i386-dis.c (ADDR16_PREFIX): Removed.
322 (ADDR32_PREFIX): Likewise.
323 (DATA16_PREFIX): Likewise.
324 (DATA32_PREFIX): Likewise.
325 (prefix_name): Updated.
326 (print_insn): Simplify data and address size prefixes processing.
327
999b995d
SK
3282014-05-08 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
329
330 * or1k-desc.c: Regenerated.
331 * or1k-desc.h: Likewise.
332 * or1k-opc.c: Likewise.
333 * or1k-opc.h: Likewise.
334 * or1k-opinst.c: Likewise.
335
ae52f483
AB
3362014-05-07 Andrew Bennett <andrew.bennett@imgtec.com>
337
338 * mips-opc.c (mips_builtin_opcodes): Add MIPS32r5 eretnc instruction.
339 (I34): New define.
340 (I36): New define.
341 (I66): New define.
342 (I68): New define.
343 * mips-dis.c (mips_arch_choices): Add mips32r3, mips32r5, mips64r3 and
344 mips64r5.
345 (parse_mips_dis_option): Update MSA and virtualization support to
9f445129 346 allow mips64r3 and mips64r5.
ae52f483 347
f7730599
AB
3482014-05-07 Andrew Bennett <andrew.bennett@imgtec.com>
349
350 * mips-opc.c (G3): Remove I4.
351
285ca992
L
3522014-05-05 H.J. Lu <hongjiu.lu@intel.com>
353
354 PR binutils/16893
355 * i386-dis.c (twobyte_has_mandatory_prefix): New variable.
356 (end_codep): Likewise.
357 (mandatory_prefix): Likewise.
358 (active_seg_prefix): Likewise.
359 (ckprefix): Set active_seg_prefix to the active segment register
360 prefix.
361 (seg_prefix): Removed.
362 (get_valid_dis386): Use the last of PREFIX_REPNZ and PREFIX_REPZ
363 for prefix index. Ignore the index if it is invalid and the
364 mandatory prefix isn't required.
365 (print_insn): Set mandatory_prefix if the PREFIX_XXX prefix is
366 mandatory. Don't set PREFIX_REPZ/PREFIX_REPNZ/PREFIX_LOCK bits
367 in used_prefixes here. Don't print unused prefixes. Check
368 active_seg_prefix for the active segment register prefix.
369 Restore the DFLAG bit in sizeflag if the data size prefix is
370 unused. Check the unused mandatory PREFIX_XXX prefixes
371 (append_seg): Only print the segment register which gets used.
372 (OP_E_memory): Check active_seg_prefix for the segment register
373 prefix.
374 (OP_OFF): Likewise.
375 (OP_OFF64): Likewise.
376 (OP_DSreg): Set active_seg_prefix to PREFIX_DS if it is unset.
377
8df14d78
L
3782014-05-02 H.J. Lu <hongjiu.lu@intel.com>
379
380 PR binutils/16886
381 * config.in: Regenerated.
382 * configure: Likewise.
383 * configure.in: Check if sigsetjmp is available.
384 * h8500-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
385 (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
386 (print_insn_h8500): Replace setjmp with OPCODES_SIGSETJMP.
387 * i386-dis.c (dis_private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
388 (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
389 (print_insn): Replace setjmp with OPCODES_SIGSETJMP.
390 * ns32k-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
391 (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
392 (print_insn_ns32k): Replace setjmp with OPCODES_SIGSETJMP.
393 * sysdep.h (OPCODES_SIGJMP_BUF): New macro.
394 (OPCODES_SIGSETJMP): Likewise.
395 (OPCODES_SIGLONGJMP): Likewise.
396 * vax-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
397 (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
398 (print_insn_vax): Replace setjmp with OPCODES_SIGSETJMP.
399 * xtensa-dis.c (dis_private): Replace jmp_buf with
400 OPCODES_SIGJMP_BUF.
401 (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
402 (print_insn_xtensa): Replace setjmp with OPCODES_SIGSETJMP.
403 * z8k-dis.c(instr_data_s): Replace jmp_buf with OPCODES_SIGJMP_BUF.
404 (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
405 (print_insn_z8k): Replace setjmp with OPCODES_SIGSETJMP.
406
86a80a50
L
4072014-05-01 H.J. Lu <hongjiu.lu@intel.com>
408
409 PR binutils/16891
410 * i386-dis.c (print_insn): Handle prefixes before fwait.
411
a9e18c6a
AM
4122014-04-26 Alan Modra <amodra@gmail.com>
413
414 * po/POTFILES.in: Regenerate.
415
7d64c587
AB
4162014-04-23 Andrew Bennett <andrew.bennett@imgtec.com>
417
418 * mips-dis.c (mips_arch_choices): Update mips32r2 and mips64r2
419 to allow the MIPS XPA ASE.
420 (parse_mips_dis_option): Process the -Mxpa option.
421 * mips-opc.c (XPA): New define.
422 (mips_builtin_opcodes): Add MIPS XPA instructions and move the
423 locations of the ctc0 and cfc0 instructions.
424
73589c9d
CS
4252014-04-22 Christian Svensson <blue@cmd.nu>
426
427 * Makefile.am: Remove openrisc and or32 support. Add support for or1k.
428 * configure.in: Likewise.
429 * disassemble.c: Likewise.
430 * or1k-asm.c: New file.
431 * or1k-desc.c: New file.
432 * or1k-desc.h: New file.
433 * or1k-dis.c: New file.
434 * or1k-ibld.c: New file.
435 * or1k-opc.c: New file.
436 * or1k-opc.h: New file.
437 * or1k-opinst.c: New file.
438 * Makefile.in: Regenerate.
439 * configure: Regenerate.
440 * openrisc-asm.c: Delete.
441 * openrisc-desc.c: Delete.
442 * openrisc-desc.h: Delete.
443 * openrisc-dis.c: Delete.
444 * openrisc-ibld.c: Delete.
445 * openrisc-opc.c: Delete.
446 * openrisc-opc.h: Delete.
447 * or32-dis.c: Delete.
448 * or32-opc.c: Delete.
449
2cf200a4
IT
4502014-04-04 Ilya Tocar <ilya.tocar@intel.com>
451
452 * i386-dis.c (rm_table): Add encls, enclu.
453 * i386-gen.c (cpu_flag_init): Add CPU_SE1_FLAGS,
454 (cpu_flags): Add CpuSE1.
455 * i386-opc.h (enum): Add CpuSE1.
456 (i386_cpu_flags): Add cpuse1.
457 * i386-opc.tbl: Add encls, enclu.
458 * i386-init.h: Regenerated.
459 * i386-tbl.h: Likewise.
460
31c981bc
AG
4612014-04-02 Anthony Green <green@moxielogic.com>
462
463 * moxie-opc.c (moxie_form1_opc_info): Add sign-extension
464 instructions, sex.b and sex.s.
465
76dfed02
YZ
4662014-03-26 Jiong Wang <jiong.wang@arm.com>
467
468 * aarch64-dis.c (aarch64_ext_ldst_elemlist): Check H/S undefined
469 instructions.
470
5fc35d96
IT
4712014-03-20 Ilya Tocar <ilya.tocar@intel.com>
472
473 * i386-opc.tbl: Change memory size for vgatherpf0qps, vgatherpf1qps,
474 vscatterpf0qps, vscatterpf1qps, vgatherqps, vpgatherqd, vpscatterqd,
475 vscatterqps.
476 * i386-tbl.h: Regenerate.
477
ec92c392
JM
4782014-03-19 Jose E. Marchesi <jose.marchesi@oracle.com>
479
480 * sparc-dis.c (v9_hpriv_reg_names): Names for %hstick_offset and
481 %hstick_enable added.
482
b8985e5c
NC
4832014-03-19 Nick Clifton <nickc@redhat.com>
484
485 * rx-decode.opc (bwl): Allow for bogus instructions with a size
486 field of 3.
b41c812c 487 (sbwl, ubwl, SCALE): Likewise.
b8985e5c
NC
488 * rx-decode.c: Regenerate.
489
fa47fa92
AM
4902014-03-12 Alan Modra <amodra@gmail.com>
491
492 * Makefile.in: Regenerate.
493
4b95cf5c
AM
4942014-03-05 Alan Modra <amodra@gmail.com>
495
496 Update copyright years.
497
cd0c81e9 4982014-03-04 Heiher <r@hev.cc>
4ba154f5
RS
499
500 * mips-dis.c (mips_arch_choices): Usee ISA_MIPS64R2 for Loongson-3A.
501
079b5aec
RS
5022014-03-04 Richard Sandiford <rdsandiford@googlemail.com>
503
504 * mips-opc.c (mips_builtin_opcodes): Move the udi* instructions
505 so that they come after the Loongson extensions.
506
2c80b753
AM
5072014-03-03 Alan Modra <amodra@gmail.com>
508
509 * i386-gen.c (process_copyright): Emit copyright notice on one line.
510
b721f1fa
AM
5112014-02-28 Alan Modra <amodra@gmail.com>
512
513 * msp430-decode.c: Regenerate.
514
f17c8bfc
YZ
5152014-02-27 Jiong Wang <jiong.wang@arm.com>
516
517 * aarch64-tbl.h (aarch64_opcode_table): Replace IMM0 with
518 FPIMM0 for fcmeq, fcmgt, fcmge, fcmlt and fcmle.
519
a58549dd
YZ
5202014-02-27 Yufeng Zhang <yufeng.zhang@arm.com>
521
522 * aarch64-opc.c (print_register_offset_address): Call
523 get_int_reg_name to prepare the register name.
524
d6e9dd78
IT
5252014-02-25 Ilya Tocar <ilya.tocar@intel.com>
526
527 * i386-opc.tbl: Remove wrong variant of vcvtps2ph
528 * i386-tbl.h: Regenerate.
529
5302014-02-20 Ilya Tocar <ilya.tocar@intel.com>
dcf893b5
IT
531
532 * i386-gen.c (cpu_flag_init): Add CPU_PREFETCHWT1_FLAGS/
533 (cpu_flags): Add CpuPREFETCHWT1.
534 * i386-init.h: Regenerate.
535 * i386-opc.h (CpuPREFETCHWT1): New.
536 (i386_cpu_flags): Add cpuprefetchwt1.
537 * i386-opc.tbl: Cahnge CPU of prefetchwt1 from CpuAVX512PF to CpuPREFETCHWT1.
538 * i386-tbl.h: Regenerate.
539
957d0955
IT
5402014-02-20 Ilya Tocar <ilya.tocar@intel.com>
541
542 * i386-opc.tbl: Change CPU of vptestnmq, vptestnmd from CpuAVX512CD,
543 to CpuAVX512F.
544 * i386-tbl.h: Regenerate.
545
10632b79
L
5462014-02-19 H.J. Lu <hongjiu.lu@intel.com>
547
548 * i386-gen.c (output_cpu_flags): Don't output trailing space.
549 (output_opcode_modifier): Likewise.
550 (output_operand_type): Likewise.
551 * i386-init.h: Regenerated.
552 * i386-tbl.h: Likewise.
553
963f3586
IT
5542014-02-12 Ilya Tocar <ilya.tocar@intel.com>
555
556 * i386-dis.c (MOD enum): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4,
557 MOD_0FC7_REG_5.
558 (PREFIX enum): Add PREFIX_0FAE_REG_7.
559 (reg_table): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4 MOD_0FC7_REG_5.
560 (prefix_table): Add clflusopt.
561 (mod_table): Add xrstors, xsavec, xsaves.
562 * i386-gen.c (cpu_flag_init): Add CPU_CLFLUSHOPT_FLAGS,
563 CPU_XSAVES_FLAGS, CPU_XSAVEC_FLAGS.
564 (cpu_flags): Add CpuClflushOpt, CpuXSAVES, CpuXSAVEC.
565 * i386-init.h: Regenerate.
566 * i386-opc.tbl: Add clflushopt, xrstors, xrstors64, xsaves,
567 xsaves64, xsavec, xsavec64.
568 * i386-tbl.h: Regenerate.
569
c1c69e83
AM
5702014-02-10 Alan Modra <amodra@gmail.com>
571
572 * po/POTFILES.in: Regenerate.
573 * po/opcodes.pot: Regenerate.
574
eaa9d1ad
MZ
5752014-01-30 Michael Zolotukhin <michael.v.zolotukhin@gmail.com>
576 Jan Beulich <jbeulich@suse.com>
577
578 PR binutils/16490
579 * i386-dis.c (OP_E_memory): Fix shift computation for
580 vex_vsib_q_w_dq_mode.
581
e2e6193d
RM
5822014-01-09 Bradley Nelson <bradnelson@google.com>
583 Roland McGrath <mcgrathr@google.com>
584
585 * i386-dis.c (print_insn): Do not touch all_prefixes[-1] when
586 last_rex_prefix is -1.
587
221fd5d5
L
5882014-01-08 H.J. Lu <hongjiu.lu@intel.com>
589
590 * i386-gen.c (process_copyright): Update copyright year to 2014.
591
b0b0c9fc
MR
5922014-01-03 Maciej W. Rozycki <macro@codesourcery.com>
593
594 * nds32-asm.c (parse_operand): Fix out-of-range integer constant.
595
5fb776a6 596For older changes see ChangeLog-2013
252b5132 597\f
5fb776a6 598Copyright (C) 2014 Free Software Foundation, Inc.
752937aa
NC
599
600Copying and distribution of this file, with or without modification,
601are permitted in any medium without royalty provided the copyright
602notice and this notice are preserved.
603
252b5132 604Local Variables:
2f6d2f85
NC
605mode: change-log
606left-margin: 8
607fill-column: 74
252b5132
RH
608version-control: never
609End:
This page took 0.866967 seconds and 4 git commands to generate.