[deliverable/binutils-gdb.git] / opcodes / ChangeLog

2012-04-30  DJ Delorie  <dj@redhat.com>

	* rx-decode.opc (MOV): Do not sign-extend immediates which are
	already the maximum bit size.
	* rx-decode.c: Regenerate.

2012-04-27  David S. Miller  <davem@davemloft.net>

	* sparc-dis.c (v9a_asr_reg_names): Add 'cfr'.
	* sparc-opc.c (sparc_opcodes): Add rd/wr cases for %cfr.

	* sparc-opc.c (sparc_opcodes): Add 'wr X, %pause' and 'pause'.
	* sparc-dis.c (v9a_asr_reg_names): Add 'pause'.

	* sparc-opc.c (CBCOND): New define.
	(CBCOND_XCC): Likewise.
	(cbcond): New helper macro.
	(sparc_opcodes): Add compare-and-branch instructions.

	* sparc-dis.c (print_insn_sparc): Handle ')'.
	* sparc-opc.c (sparc_opcodes): Add crypto instructions.

	* sparc-opc.c (sparc_opcodes): Rework table to put HWCAP values
	into new struct sparc_opcode 'hwcaps' field instead of 'flags'.

2012-04-12  David S. Miller  <davem@davemloft.net>

	* sparc-dis.c (X_DISP10): Define.
	(print_insn_sparc): Handle '='.

2012-04-01  Mike Frysinger  <vapier@gentoo.org>

	* bfin-dis.c (fmtconst): Replace decimal handling with a single
	sprintf call and the '*' field width.

2012-03-23  Maxim Kuvyrkov  <maxim@codesourcery.com>

	* mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.

2012-03-16  Alan Modra  <amodra@gmail.com>

	* ppc-dis.c (PPC_OPC_SEGS, PPC_OP_TO_SEG): Delete.
	(powerpc_opcd_indices): Bump array size.
	(disassemble_init_powerpc): Set powerpc_opcd_indices entries
	corresponding to unused opcodes to following entry.
	(lookup_powerpc): New function, extracted and optimised from..
	(print_insn_powerpc): ..here.

2012-03-15  Alan Modra  <amodra@gmail.com>
	    James Lemke  <jwlemke@codesourcery.com>

	* disassemble.c (disassemble_init_for_target): Handle ppc init.
	* ppc-dis.c (private): New var.
	(powerpc_init_dialect): Don't return calloc failure, instead use
	private.
	(PPC_OPCD_SEGS, PPC_OP_TO_SEG): Define.
	(powerpc_opcd_indices): New array.
	(disassemble_init_powerpc): New function.
	(print_insn_big_powerpc): Don't init dialect here.
	(print_insn_little_powerpc): Likewise.
	(print_insn_powerpc): Start search using powerpc_opcd_indices.

2012-03-10  Edmar Wienskoski  <edmar@freescale.com>

	* ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
	* ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
	(PPCVEC2, PPCTMR, E6500): New short names.
	(powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
	mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
	lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
	lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
	lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
	optional operands on sync instruction for E6500 target.

2012-03-08  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	* s390-opc.txt: Set instruction type of pku to SS_L2RDRD.

2012-02-27  Alan Modra  <amodra@gmail.com>

	* mt-dis.c: Regenerate.

2012-02-27  Alan Modra  <amodra@gmail.com>

	* v850-opc.c (extract_v8): Rearrange to make it obvious this
	is the inverse of corresponding insert function.
	(extract_d22, extract_u9, extract_r4): Likewise.
	(extract_d9): Correct sign extension.
	(extract_d16_15): Don't assume "long" is 32 bits, and don't
	rely on implementation defined behaviour for shift right of
	signed types.
	(extract_d16_16, extract_d17_16, extract_i9): Likewise.
	(extract_d23): Likewise, and correct mask.

2012-02-27  Alan Modra  <amodra@gmail.com>

	* crx-dis.c (print_arg): Mask constant to 32 bits.
	* crx-opc.c (cst4_map): Use int array.

2012-02-27  Alan Modra  <amodra@gmail.com>

	* arc-dis.c (BITS): Don't use shifts to mask off bits.
	(FIELDD): Sign extend with xor,sub.

2012-02-25  Walter Lee  <walt@tilera.com>

	* tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
	* tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
	TILEPRO_OPC_LW_TLS_SN.

2012-02-21  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.h (HLEPrefixNone): New.
	(HLEPrefixLock): Likewise.
	(HLEPrefixAny): Likewise.
	(HLEPrefixRelease): Likewise.

2012-02-08  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (HLE_Fixup1): New.
	(HLE_Fixup2): Likewise.
	(HLE_Fixup3): Likewise.
	(Ebh1): Likewise.
	(Evh1): Likewise.
	(Ebh2): Likewise.
	(Evh2): Likewise.
	(Ebh3): Likewise.
	(Evh3): Likewise.
	(MOD_C6_REG_7): Likewise.
	(MOD_C7_REG_7): Likewise.
	(RM_C6_REG_7): Likewise.
	(RM_C7_REG_7): Likewise.
	(XACQUIRE_PREFIX): Likewise.
	(XRELEASE_PREFIX): Likewise.
	(dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
	cmpxchg, dec, inc, neg, not, or, sbb, sub, xor and xadd. Use
	Ebh2/Evh2 on xchg.  Use Ebh3/Evh3 on mov.
	(reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
	not, or, sbb, sub and xor.  Use Ebh3/Evh3 on mov.  Use
	MOD_C6_REG_7 and MOD_C7_REG_7.
	(mod_table): Add MOD_C6_REG_7 and MOD_C7_REG_7.
	(rm_table): Add RM_C6_REG_7 and RM_C7_REG_7.  Add xend and
	xtest.
	(prefix_name): Handle XACQUIRE_PREFIX and XRELEASE_PREFIX.
	(CMPXCHG8B_Fixup): Handle HLE prefix on cmpxchg8b.

	* i386-gen.c (cpu_flag_init): Add CPU_HLE_FLAGS and
	CPU_RTM_FLAGS.
	(cpu_flags): Add CpuHLE and CpuRTM.
	(opcode_modifiers): Add HLEPrefixOk.

	* i386-opc.h (CpuHLE): New.
	(CpuRTM): Likewise.
	(HLEPrefixOk): Likewise.
	(i386_cpu_flags): Add cpuhle and cpurtm.
	(i386_opcode_modifier): Add hleprefixok.

	* i386-opc.tbl: Add HLEPrefixOk=3 to mov.  Add HLEPrefixOk to
	add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
	sbb, sub, xor and xadd.  Add HLEPrefixOk=2 to xchg with memory
	operand.  Add xacquire, xrelease, xabort, xbegin, xend and
	xtest.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

2012-01-24  DJ Delorie  <dj@redhat.com>

	* rl78-decode.opc (rl78_decode_opcode): Add NOT1.
	* rl78-decode.c: Regenerate.

2012-01-17  James Murray  <jsm@jsm-net.demon.co.uk>

	PR binutils/10173
	* cr16-dis.c (print_arg): Test symtab_size not num_symbols.

2012-01-17  Andreas Schwab  <schwab@linux-m68k.org>

	* m68k-opc.c (m68k_opcodes): Fix entries for pmove with BADx/BACx
	register and move them after pmove with PSR/PCSR register.

2012-01-13  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (mod_table): Add vmfunc.

	* i386-gen.c (cpu_flag_init): Add CPU_VMFUNC_FLAGS.
	(cpu_flags): CpuVMFUNC.

	* i386-opc.h (CpuVMFUNC): New.
	(i386_cpu_flags): Add cpuvmfunc.

	* i386-opc.tbl: Add vmfunc.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

For older changes see ChangeLog-2011
\f
Local Variables:
mode: change-log
left-margin: 8
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Commit	Line	Data
78e98aab DD	1	2012-04-30 DJ Delorie <dj@redhat.com>
	2
	3	* rx-decode.opc (MOV): Do not sign-extend immediates which are
	4	already the maximum bit size.
	5	* rx-decode.c: Regenerate.
	6
ec668d69 DM	7	2012-04-27 David S. Miller <davem@davemloft.net>
ec668d69 DM	8
2e52845b DM	9	* sparc-dis.c (v9a_asr_reg_names): Add 'cfr'.
	10	* sparc-opc.c (sparc_opcodes): Add rd/wr cases for %cfr.
	11
58004e23 DM	12	* sparc-opc.c (sparc_opcodes): Add 'wr X, %pause' and 'pause'.
	13	* sparc-dis.c (v9a_asr_reg_names): Add 'pause'.
	14
698544e1 DM	15	* sparc-opc.c (CBCOND): New define.
	16	(CBCOND_XCC): Likewise.
	17	(cbcond): New helper macro.
	18	(sparc_opcodes): Add compare-and-branch instructions.
	19
6cda1326 DM	20	* sparc-dis.c (print_insn_sparc): Handle ')'.
	21	* sparc-opc.c (sparc_opcodes): Add crypto instructions.
	22
ec668d69 DM	23	* sparc-opc.c (sparc_opcodes): Rework table to put HWCAP values
	24	into new struct sparc_opcode 'hwcaps' field instead of 'flags'.
	25
2615994e DM	26	2012-04-12 David S. Miller <davem@davemloft.net>
	27
	28	* sparc-dis.c (X_DISP10): Define.
	29	(print_insn_sparc): Handle '='.
	30
5de10af0 MF	31	2012-04-01 Mike Frysinger <vapier@gentoo.org>
	32
	33	* bfin-dis.c (fmtconst): Replace decimal handling with a single
	34	sprintf call and the '*' field width.
	35
55a36193 MK	36	2012-03-23 Maxim Kuvyrkov <maxim@codesourcery.com>
	37
	38	* mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.
	39
d6688282 AM	40	2012-03-16 Alan Modra <amodra@gmail.com>
	41
	42	* ppc-dis.c (PPC_OPC_SEGS, PPC_OP_TO_SEG): Delete.
	43	(powerpc_opcd_indices): Bump array size.
	44	(disassemble_init_powerpc): Set powerpc_opcd_indices entries
	45	corresponding to unused opcodes to following entry.
	46	(lookup_powerpc): New function, extracted and optimised from..
	47	(print_insn_powerpc): ..here.
	48
b240011a AM	49	2012-03-15 Alan Modra <amodra@gmail.com>
	50	James Lemke <jwlemke@codesourcery.com>
	51
	52	* disassemble.c (disassemble_init_for_target): Handle ppc init.
	53	* ppc-dis.c (private): New var.
	54	(powerpc_init_dialect): Don't return calloc failure, instead use
	55	private.
	56	(PPC_OPCD_SEGS, PPC_OP_TO_SEG): Define.
	57	(powerpc_opcd_indices): New array.
	58	(disassemble_init_powerpc): New function.
	59	(print_insn_big_powerpc): Don't init dialect here.
	60	(print_insn_little_powerpc): Likewise.
	61	(print_insn_powerpc): Start search using powerpc_opcd_indices.
	62
aea77599 AM	63	2012-03-10 Edmar Wienskoski <edmar@freescale.com>
	64
	65	* ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
	66	* ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
	67	(PPCVEC2, PPCTMR, E6500): New short names.
	68	(powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
	69	mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
	70	lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
	71	lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
	72	lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
	73	optional operands on sync instruction for E6500 target.
	74
5333187a AK	75	2012-03-08 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
	76
	77	* s390-opc.txt: Set instruction type of pku to SS_L2RDRD.
	78
a597d2d3 AM	79	2012-02-27 Alan Modra <amodra@gmail.com>
	80
	81	* mt-dis.c: Regenerate.
	82
3f26eb3a AM	83	2012-02-27 Alan Modra <amodra@gmail.com>
	84
	85	* v850-opc.c (extract_v8): Rearrange to make it obvious this
	86	is the inverse of corresponding insert function.
	87	(extract_d22, extract_u9, extract_r4): Likewise.
	88	(extract_d9): Correct sign extension.
	89	(extract_d16_15): Don't assume "long" is 32 bits, and don't
	90	rely on implementation defined behaviour for shift right of
	91	signed types.
	92	(extract_d16_16, extract_d17_16, extract_i9): Likewise.
	93	(extract_d23): Likewise, and correct mask.
	94
1f42f8b3 AM	95	2012-02-27 Alan Modra <amodra@gmail.com>
	96
	97	* crx-dis.c (print_arg): Mask constant to 32 bits.
	98	* crx-opc.c (cst4_map): Use int array.
	99
cdb06235 AM	100	2012-02-27 Alan Modra <amodra@gmail.com>
	101
	102	* arc-dis.c (BITS): Don't use shifts to mask off bits.
	103	(FIELDD): Sign extend with xor,sub.
	104
6f7be959 WL	105	2012-02-25 Walter Lee <walt@tilera.com>
	106
	107	* tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
	108	* tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
	109	TILEPRO_OPC_LW_TLS_SN.
	110
82c2def5 L	111	2012-02-21 H.J. Lu <hongjiu.lu@intel.com>
	112
	113	* i386-opc.h (HLEPrefixNone): New.
	114	(HLEPrefixLock): Likewise.
	115	(HLEPrefixAny): Likewise.
	116	(HLEPrefixRelease): Likewise.
	117
42164a71 L	118	2012-02-08 H.J. Lu <hongjiu.lu@intel.com>
	119
	120	* i386-dis.c (HLE_Fixup1): New.
	121	(HLE_Fixup2): Likewise.
	122	(HLE_Fixup3): Likewise.
	123	(Ebh1): Likewise.
	124	(Evh1): Likewise.
	125	(Ebh2): Likewise.
	126	(Evh2): Likewise.
	127	(Ebh3): Likewise.
	128	(Evh3): Likewise.
	129	(MOD_C6_REG_7): Likewise.
	130	(MOD_C7_REG_7): Likewise.
	131	(RM_C6_REG_7): Likewise.
	132	(RM_C7_REG_7): Likewise.
	133	(XACQUIRE_PREFIX): Likewise.
	134	(XRELEASE_PREFIX): Likewise.
	135	(dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
	136	cmpxchg, dec, inc, neg, not, or, sbb, sub, xor and xadd. Use
	137	Ebh2/Evh2 on xchg. Use Ebh3/Evh3 on mov.
	138	(reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
	139	not, or, sbb, sub and xor. Use Ebh3/Evh3 on mov. Use
	140	MOD_C6_REG_7 and MOD_C7_REG_7.
	141	(mod_table): Add MOD_C6_REG_7 and MOD_C7_REG_7.
	142	(rm_table): Add RM_C6_REG_7 and RM_C7_REG_7. Add xend and
	143	xtest.
	144	(prefix_name): Handle XACQUIRE_PREFIX and XRELEASE_PREFIX.
	145	(CMPXCHG8B_Fixup): Handle HLE prefix on cmpxchg8b.
	146
	147	* i386-gen.c (cpu_flag_init): Add CPU_HLE_FLAGS and
	148	CPU_RTM_FLAGS.
	149	(cpu_flags): Add CpuHLE and CpuRTM.
	150	(opcode_modifiers): Add HLEPrefixOk.
	151
	152	* i386-opc.h (CpuHLE): New.
	153	(CpuRTM): Likewise.
	154	(HLEPrefixOk): Likewise.
	155	(i386_cpu_flags): Add cpuhle and cpurtm.
	156	(i386_opcode_modifier): Add hleprefixok.
	157
	158	* i386-opc.tbl: Add HLEPrefixOk=3 to mov. Add HLEPrefixOk to
	159	add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
	160	sbb, sub, xor and xadd. Add HLEPrefixOk=2 to xchg with memory
	161	operand. Add xacquire, xrelease, xabort, xbegin, xend and
	162	xtest.
	163	* i386-init.h: Regenerated.
	164	* i386-tbl.h: Likewise.
	165
21abe33a DD	166	2012-01-24 DJ Delorie <dj@redhat.com>
	167
	168	* rl78-decode.opc (rl78_decode_opcode): Add NOT1.
	169	* rl78-decode.c: Regenerate.
	170
e20cc039 AM	171	2012-01-17 James Murray <jsm@jsm-net.demon.co.uk>
	172
	173	PR binutils/10173
	174	* cr16-dis.c (print_arg): Test symtab_size not num_symbols.
	175
e143d25c AS	176	2012-01-17 Andreas Schwab <schwab@linux-m68k.org>
	177
	178	* m68k-opc.c (m68k_opcodes): Fix entries for pmove with BADx/BACx
	179	register and move them after pmove with PSR/PCSR register.
	180
8729a6f6 L	181	2012-01-13 H.J. Lu <hongjiu.lu@intel.com>
	182
	183	* i386-dis.c (mod_table): Add vmfunc.
	184
	185	* i386-gen.c (cpu_flag_init): Add CPU_VMFUNC_FLAGS.
	186	(cpu_flags): CpuVMFUNC.
	187
	188	* i386-opc.h (CpuVMFUNC): New.
	189	(i386_cpu_flags): Add cpuvmfunc.
	190
	191	* i386-opc.tbl: Add vmfunc.
	192	* i386-init.h: Regenerated.
	193	* i386-tbl.h: Likewise.
5011093d	194
23e1d329	195	For older changes see ChangeLog-2011
252b5132 RH	196	\f
252b5132 RH	197	Local Variables:
2f6d2f85 NC	198	mode: change-log
	199	left-margin: 8
	200	fill-column: 74
252b5132 RH	201	version-control: never
252b5132 RH	202	End: