Commit | Line | Data |
---|---|---|
2721d702 JW |
1 | 2018-01-15 Jim Wilson <jimw@sifive.com> |
2 | ||
3 | * riscv-opc.c (match_c_nop): New. | |
4 | (riscv_opcodes) <addi>: Handle an addi that compresses to c.nop. | |
5 | ||
616dcb87 NC |
6 | 2018-01-15 Nick Clifton <nickc@redhat.com> |
7 | ||
8 | * po/uk.po: Updated Ukranian translation. | |
9 | ||
3957a496 NC |
10 | 2018-01-13 Nick Clifton <nickc@redhat.com> |
11 | ||
12 | * po/opcodes.pot: Regenerated. | |
13 | ||
769c7ea5 NC |
14 | 2018-01-13 Nick Clifton <nickc@redhat.com> |
15 | ||
16 | * configure: Regenerate. | |
17 | ||
faf766e3 NC |
18 | 2018-01-13 Nick Clifton <nickc@redhat.com> |
19 | ||
20 | 2.30 branch created. | |
21 | ||
888a89da IT |
22 | 2018-01-11 Igor Tsimbalist <igor.v.tsimbalist@intel.com> |
23 | ||
24 | * i386-opc.tbl: Remove VL variants for 4FMAPS and 4VNNIW insns. | |
25 | * i386-tbl.h: Regenerate. | |
26 | ||
cbda583a JB |
27 | 2018-01-10 Jan Beulich <jbeulich@suse.com> |
28 | ||
29 | * i386-opc.tbl (v4fmaddss, v4fnmaddss): Adjust Disp8MemShift. | |
30 | * i386-tbl.h: Re-generate. | |
31 | ||
c9e92278 JB |
32 | 2018-01-10 Jan Beulich <jbeulich@suse.com> |
33 | ||
34 | * i386-opc.tbl (vpcmpeqb, vpcmpleb, vpcmpltb, vpcmpneqb, | |
35 | vpcmpnleb, vpcmpnltb, vpcmpequb, vpcmpleub, vpcmpltub, | |
36 | vpcmpnequb, vpcmpnleub, vpcmpnltub, vpcmpeqw, vpcmplew, | |
37 | vpcmpltw, vpcmpneqw, vpcmpnlew, vpcmpnltw, vpcmpequw, vpcmpleuw, | |
38 | vpcmpltuw, vpcmpnequw, vpcmpnleuw, vpcmpnltuw): Adjust | |
39 | Disp8MemShift of AVX512VL forms. | |
40 | * i386-tbl.h: Re-generate. | |
41 | ||
35fd2b2b JW |
42 | 2018-01-09 Jim Wilson <jimw@sifive.com> |
43 | ||
44 | * riscv-dis.c (maybe_print_address): If base_reg is zero, | |
45 | then the hi_addr value is zero. | |
46 | ||
91d8b670 JG |
47 | 2018-01-09 James Greenhalgh <james.greenhalgh@arm.com> |
48 | ||
49 | * arm-dis.c (arm_opcodes): Add csdb. | |
50 | (thumb32_opcodes): Add csdb. | |
51 | ||
be2e7d95 JG |
52 | 2018-01-09 James Greenhalgh <james.greenhalgh@arm.com> |
53 | ||
54 | * aarch64-tbl.h (aarch64_opcode_table): Add "csdb". | |
55 | * aarch64-asm-2.c: Regenerate. | |
56 | * aarch64-dis-2.c: Regenerate. | |
57 | * aarch64-opc-2.c: Regenerate. | |
58 | ||
704a705d L |
59 | 2018-01-08 H.J. Lu <hongjiu.lu@intel.com> |
60 | ||
61 | PR gas/22681 | |
62 | * i386-opc.tbl: Properly encode vmovd with Qword memeory operand. | |
63 | Remove AVX512 vmovd with 64-bit operands. | |
64 | * i386-tbl.h: Regenerated. | |
65 | ||
35eeb78f JW |
66 | 2018-01-05 Jim Wilson <jimw@sifive.com> |
67 | ||
68 | * riscv-dis.c (print_insn_args) <'s'>: Call maybe_print_address for a | |
69 | jalr. | |
70 | ||
219d1afa AM |
71 | 2018-01-03 Alan Modra <amodra@gmail.com> |
72 | ||
73 | Update year range in copyright notice of all files. | |
74 | ||
1508bbf5 JB |
75 | 2018-01-02 Jan Beulich <jbeulich@suse.com> |
76 | ||
77 | * i386-gen.c (operand_type_init): Restore OPERAND_TYPE_REGYMM | |
78 | and OPERAND_TYPE_REGZMM entries. | |
79 | ||
1e563868 | 80 | For older changes see ChangeLog-2017 |
3499769a | 81 | \f |
1e563868 | 82 | Copyright (C) 2018 Free Software Foundation, Inc. |
3499769a AM |
83 | |
84 | Copying and distribution of this file, with or without modification, | |
85 | are permitted in any medium without royalty provided the copyright | |
86 | notice and this notice are preserved. | |
87 | ||
88 | Local Variables: | |
89 | mode: change-log | |
90 | left-margin: 8 | |
91 | fill-column: 74 | |
92 | version-control: never | |
93 | End: |