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[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
20135e4c
NC		 12009-04-15 Anthony Green <green@moxielogic.com>
2
3 * moxie-opc.c, moxie-dis.c: Created.
4 * Makefile.am: Build the moxie source files.
5 * configure.in: Add moxie support.
6 * Makefile.in, configure: Rebuilt.
7 * disassemble.c (disassembler): Add moxie support.
8 (ARCH_moxie): Define.
9
ac5c19e6
JB		 102009-04-15 Jan Beulich <jbeulich@novell.com>
11
12 * i386-opc.tbl (protb, protw, protd, protq): Set opcode
13 extension to None.
14 (pshab, pshaw, pshad, pshaq): Likewise.
15 * i386-tbl.h: Re-generate.
16
858d7a6d
PB		 172009-04-07 Peter Bergner <bergner@vnet.ibm.com>
18
19 * ppc-opc.c (powerpc_opcodes) <"tlbilxlpid", "tlbilxpid", "tlbilxva",
20 "tlbilx">: Use secondary opcode "18" as per the ISA 2.06 documentation.
21 Reorder entries so the extended mnemonics are listed before tlbilx.
22
70dc4e32
PB		 232009-04-02 Peter Bergner <bergner@vnet.ibm.com>
24
25 * ppc-dis.c (powerpc_init_dialect): Do not choose a default dialect
26 due to -many/-Many.
27 (print_insn_powerpc): Make sure we only deprecate instructions using
28 the original dialect and not a modified dialect due to -Many handling.
29 Move the handling of the condition register and default operands to
30 the end of the if/else if/else chain.
31 * ppc-opc.c (powerpc_opcodes): Reorder the opcode table so that
32 instructions from newer processors are listed before older ones.
33 <"icblce", "sync", "eieio", "tlbld">: Deprecate for processors
34 that have instructions with conflicting opcodes.
35
e401b04c
PB		 362009-04-01 Peter Bergner <bergner@vnet.ibm.com>
37
38 * ppc-opc.c (powerpc_opcodes) <"dcbzl">: Merge the POWER4 and
39 E500MC entries.
40
b8f9ee44
CL		 412009-04-01 Christophe Lyon <christophe.lyon@st.com>
42
43 * arm-dis.c (print_insn): Print BE8 opcodes in little endianness.
44
d460e92e
JM		 452009-03-30 Joseph Myers <joseph@codesourcery.com>
46
47 * arm-dis.c (print_insn): Also check section matches in backwards
48 search for mapping symbol.
49
d34b5006
L		 502009-03-26 H.J. Lu <hongjiu.lu@intel.com>
51
52 * i386-dis.c (get_valid_dis386): Abort on unhandled table.
53
8d25cc3d
AM		 542009-03-18 Alan Modra <amodra@bigpond.net.au>
55
3889c459 56 * cgen-opc.c: Include alloca-conf.h rather than alloca.h.
8d25cc3d
AM		 57 * Makefile.am: Run "make dep-am".
58 * Makefile.in: Regenerate.
59 * openrisc-opc.c: Regenerate.
60
34dd024a
NC		 612009-03-10 Nick Clifton <nickc@redhat.com>
62
63 * po/id.po: Updated Indonesian translation.
64
69fe9ce5
AM		 652009-03-10 Alan Modra <amodra@bigpond.net.au>
66
67 * ppc-dis.c: Include "opintl.h".
68 (struct ppc_mopt, ppc_opts): New.
69 (ppc_parse_cpu): New function.
70 (powerpc_init_dialect): Use it.
71 (print_ppc_disassembler_options): Dump options from ppc_opts.
72 Internationalize message.
73
d11fd249
NC		 742009-03-06 Nick Clifton <nickc@redhat.com>
75
76 * po/es.po: Updated Spanish translation.
77
51dec227
AM		 782009-03-04 Alan Modra <amodra@bigpond.net.au>
79
80 PR 6768
81 * configure.in: Test for ld --as-needed support. Link shared
82 libopcodes against libm.
83 * configure: Regenerate.
84
c72ab5f2
PB		 852009-03-03 Peter Bergner <bergner@vnet.ibm.com>
86
87 * ppc-opc.c (powerpc_opcodes): Reorder the opcode table so that
88 instructions from newer processors are listed before older ones.
89
a1f7ca36
AM		 902009-03-03 Alan Modra <amodra@bigpond.net.au>
91
92 * Makefile.am: Run "make dep-am".
93 (HFILES): Move lm32-desc.h and lm32-opc.h from..
94 (CFILES): ..here.
95 * Makefile.in: Regenerate.
96
c3b7224a
NC		 972009-03-02 Qinwei <qinwei@sunnorth.com.cn>
98
99 * score7-dis.c: New file.
100 * Makefile.am: Add dependencies for score7-dis.c.
101 * Makefile.in: Regenerate.
102 * configure.in: Add score7-dis to score files.
103 * configure: Regenerate.
104 * score-dis.c: Add support for score7 architecture.
105 * score-opc.h: Likewise.
106
58e24671
RW		 1072009-03-01 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
108
109 * configure: Regenerate.
110
d6f574e0
L		 1112009-02-27 H.J. Lu <hongjiu.lu@intel.com>
112
113 * i386-dis.c (OP_EX): Call OP_E_memory instead of OP_E.
114
066be9f7
PB		 1152009-02-26 Peter Bergner <bergner@vnet.ibm.com>
116
117 * ppc-dis.c (powerpc_init_dialect): Extend -Mpower7 to disassemble
118 the power7 and the isel instructions.
119 * ppc-opc.c (insert_xc6, extract_xc6): New static functions.
120 (insert_dm, extract_dm): Likewise.
121 (XB6): Update comment to include XX2 form.
122 (WC, XC6, SHW, DMEX, UIM, XX2, XX3RC, XX4, XX2_MASK, XX2UIM_MASK,
123 XX2BF_MASK, XX3BF_MASK, XX3SHW_MASK, XX4_MASK, XWC_MASK, POWER7): New.
124 (RemoveXX3DM): Delete.
125 (powerpc_opcodes): <"lfdp", "lfdpx", "mcrxr", "mftb", "mffgpr",
126 "mftgpr">: Deprecate for POWER7.
127 <"fres", "fres.", "frsqrtes", "frsqrtes.", "fre", "fre.", "frsqrte",
128 "frsqrte.">: Deprecate the three operand form and enable the two
129 operand form for POWER7 and later.
130 <"wait">: Extend to accept optional parameter. Enable for POWER7.
131 <"waitsrv", "waitimpl">: Add extended opcodes.
132 <"ldbrx", "stdbrx">: Enable for POWER7.
133 <"cdtbcd", "cbcdtd", "addg6s">: Add POWER6 opcodes.
134 <"bpermd", "dcbtstt", "dcbtt", "dcffix.", "dcffix", "divde.", "divde",
135 "divdeo.", "divdeo", "divdeu.", "divdeu", "divdeuo.", "divdeuo",
136 "divwe.", "divwe", "divweo.", "divweo", "divweu.", "divweu", "divweuo.",
137 "divweuo", "fcfids.", "fcfids", "fcfidu.", "fcfidu", "fcfidus.",
138 "fcfidus", "fctidu.", "fctidu", "fctiduz.", "fctiduz", "fctiwu.",
139 "fctiwu", "fctiwuz.", "fctiwuz", "ftdiv", "ftsqrt", "lbarx", "lfiwzx",
140 "lharx", "popcntd", "popcntw", "stbcx.", "sthcx.">: Add POWER7 opcodes.
141 <"lxsdux", "lxsdx", "lxvdsx", "lxvw4ux", "lxvw4x", "stxsdux", "stxsdx",
142 "stxvw4ux", "stxvw4x", "xsabsdp", "xsadddp", "xscmpodp", "xscmpudp",
143 "xscpsgndp", "xscvdpsp", "xscvdpsxds", "xscvdpsxws", "xscvdpuxds",
144 "xscvdpuxws", "xscvspdp", "xscvsxddp", "xscvuxddp", "xsdivdp",
145 "xsmaddadp", "xsmaddmdp", "xsmaxdp", "xsmindp", "xsmsubadp",
146 "xsmsubmdp", "xsmuldp", "xsnabsdp", "xsnegdp", "xsnmaddadp",
147 "xsnmaddmdp", "xsnmsubadp", "xsnmsubmdp", "xsrdpi", "xsrdpic",
148 "xsrdpim", "xsrdpip", "xsrdpiz", "xsredp", "xsrsqrtedp", "xssqrtdp",
149 "xssubdp", "xstdivdp", "xstsqrtdp", "xvabsdp", "xvabssp", "xvadddp",
150 "xvaddsp", "xvcmpeqdp.", "xvcmpeqdp", "xvcmpeqsp.", "xvcmpeqsp",
151 "xvcmpgedp.", "xvcmpgedp", "xvcmpgesp.", "xvcmpgesp", "xvcmpgtdp.",
152 "xvcmpgtdp", "xvcmpgtsp.", "xvcmpgtsp", "xvcpsgnsp", "xvcvdpsp",
153 "xvcvdpsxds", "xvcvdpsxws", "xvcvdpuxds", "xvcvdpuxws", "xvcvspdp",
154 "xvcvspsxds", "xvcvspsxws", "xvcvspuxds", "xvcvspuxws", "xvcvsxddp",
155 "xvcvsxdsp", "xvcvsxwdp", "xvcvsxwsp", "xvcvuxddp", "xvcvuxdsp",
156 "xvcvuxwdp", "xvcvuxwsp", "xvdivdp", "xvdivsp", "xvmaddadp",
157 "xvmaddasp", "xvmaddmdp", "xvmaddmsp", "xvmaxdp", "xvmaxsp",
158 "xvmindp", "xvminsp", "xvmovsp", "xvmsubadp", "xvmsubasp", "xvmsubmdp",
159 "xvmsubmsp", "xvmuldp", "xvmulsp", "xvnabsdp", "xvnabssp", "xvnegdp",
160 "xvnegsp", "xvnmaddadp", "xvnmaddasp", "xvnmaddmdp", "xvnmaddmsp",
161 "xvnmsubadp", "xvnmsubasp", "xvnmsubmdp", "xvnmsubmsp", "xvrdpi",
162 "xvrdpic", "xvrdpim", "xvrdpip", "xvrdpiz", "xvredp", "xvresp",
163 "xvrspi", "xvrspic", "xvrspim", "xvrspip", "xvrspiz", "xvrsqrtedp",
164 "xvrsqrtesp", "xvsqrtdp", "xvsqrtsp", "xvsubdp", "xvsubsp", "xvtdivdp",
165 "xvtdivsp", "xvtsqrtdp", "xvtsqrtsp", "xxland", "xxlandc", "xxlnor",
166 "xxlor", "xxlxor", "xxmrghw", "xxmrglw", "xxsel", "xxsldwi", "xxspltd",
167 "xxspltw", "xxswapd">: Add VSX opcodes.
168
4c664d7b
L		 1692009-02-23 H.J. Lu <hongjiu.lu@intel.com>
170
171 * i386-gen.c (operand_type_init): Remove OPERAND_TYPE_VEX_IMM4.
172 (operand_types): Remove Vex_Imm4.
173
174 * i386-opc.h (Vex_Imm4): Removed.
175 (OTMax): Updated.
176 (i386_operand_type): Remove vex_imm4.
177
178 * i386-opc.tbl: Remove Vex_Imm4 comments.
179 * i386-init.h: Regenerated.
180 * i386-tbl.h: Likewise.
181
4ce8808b
RE		 1822009-02-23 Richard Earnshaw <rearnsha@arm.com>
183
184 * arm-dis.c (neon_opcodes): Correct bit-mask and patterns for
185 vq{r}shr{u}n.s64 insnstructions.
186
0e55be16
PB		 1872009-02-19 Peter Bergner <bergner@vnet.ibm.com>
188
189 * ppc-opc.c (powerpc_opcodes) <"lfdepx", "stfdepx">: Fix the first
190 operand to be a float point register (FRT/FRS).
191
b1c9882d
AN		 1922009-02-18 Adam Nemet <anemet@caviumnetworks.com>
193
194 * mips-opc.c (mips_builtin_opcodes): Move the Octeon-specific
195 dmfc2 and dmtc2 before the architecture-level variants.
196
137f2437
NC		 1972009-02-18 Pierre Muller <muller@ics.u-strasbg.fr>
198
199 * fr30-opc.c: Regenerate.
200 * frv-opc.c: Regenerate.
201 * ip2k-opc.c: Regenerate.
202 * iq2000-opc.c: Regenerate.
203 * lm32-opc.c: Regenerate.
204 * m32c-opc.c: Regenerate.
205 * m32r-opc.c: Regenerate.
206 * mep-opc.c: Regenerate.
207 * mt-opc.c: Regenerate.
208 * xc16x-opc.c: Regenerate.
209 * xstormy16-opc.c: Regenerate.
210 * tic54x-dis.c (print_instruction): Avoid compiler warning on
211 sprintf call.
212
87298967
NS		 2132009-02-12 Nathan Sidwell <nathan@codesourcery.com>
214
215 * m68k-opc.c (m68k_opcodes): Add stldsr instruction.
216
80890a61
PB		 2172009-02-05 Peter Bergner <bergner@vnet.ibm.com>
218
219 * ppc-opc.c: Update copyright year.
220 (powerpc_opcodes) <"dcbt", "dcbtst">: Deprecate the Embedded operand
221 ordering for POWER4 and later and use the correct Server ordering.
222
ce2f5b3c
L		 2232009-02-04 H.J. Lu <hongjiu.lu@intel.com>
224
225 AVX Programming Reference (January, 2009)
226 * i386-dis.c (PREFIX_VEX_3A44): New.
227 (VEX_LEN_3A44_P_2): Likewise.
228 (PREFIX_VEX_3A48): Updated.
229 (VEX_LEN_3A4C_P_2): Likewise.
230 (prefix_table): Add PREFIX_VEX_3A44.
231 (vex_table): Likewise.
232 (vex_len_table): Add VEX_LEN_3A44_P_2.
233
234 * i386-opc.tbl: Add PCLMUL + AVX instructions.
235 * i386-tbl.h: Regenerated.
236
52b6b6b9
JM		 2372009-02-03 Sandip Matte <sandip@rmicorp.com>
238
239 * mips-dis.c (mips_cp0_names_xlr, mips_cp0sel_names_xlr): Define.
240 (mips_arch_choices): Add XLR entry.
241 * mips-opc.c (XLR): Define.
242 (mips_builtin_opcodes): Add XLR instructions.
243
31dd3154
JM		 2442009-02-03 Carlos O'Donell <carlos@codesourcery.com>
245
246 * Makefile.am: Add install-pdf target.
247 * po/Make-in: Add install-pdf target.
248 * Makefile.in: Regenerate.
249
c1a0a41f
DD		 2502009-02-02 DJ Delorie <dj@redhat.com>
251
252 * mep-asm.c: Regenerate.
253 * mep-desc.c: Regenerate.
254 * mep-desc.h: Regenerate.
255 * mep-dis.c: Regenerate.
256 * mep-ibld.c: Regenerate.
257 * mep-opc.c: Regenerate.
258 * mep-opc.h: Regenerate.
259
087b80de
JM		 2602009-01-29 Mark Mitchell <mark@codesourcery.com>
261
262 * arm-dis.c (thumb32_opcodes): Correct decoding for qadd, qdadd,
263 qsub, and qdsub.
264
159073e6
NC		 2652009-01-28 Chao-ying Fu <fu@mips.com>
266
267 * mips-opc.c (suxc1): Add the flag of FP_D.
268
6f3b91a6
AM		 2692009-01-20 Alan Modra <amodra@bigpond.net.au>
270
271 * fr30-asm.c, fr30-dis.c, fr30-ibld.c, frv-asm.c, frv-dis.c,
272 * frv-ibld.c, ip2k-asm.c, ip2k-dis.c, ip2k-ibld.c,
273 * iq2000-asm.c, iq2000-dis.c, iq2000-ibld.c, m32c-asm.c,
274 * m32c-dis.c, m32c-ibld.c, m32r-asm.c, m32r-dis.c,
275 * m32r-ibld.c, mep-asm.c, mep-dis.c, mep-ibld.c, mt-asm.c,
276 * mt-dis.c, mt-ibld.c, openrisc-asm.c, openrisc-dis.c,
277 * openrisc-ibld.c, xc16x-asm.c, xc16x-dis.c, xc16x-ibld.c,
278 * xstormy16-asm.c, xstormy16-dis.c, xstormy16-ibld.c: Regenerate.
279
29670fb9
AM		 2802009-01-16 Alan Modra <amodra@bigpond.net.au>
281
282 * configure.in (commonbfdlib): Delete.
283 (SHARED_LIBADD): Add pic libiberty if such is available.
284 * configure: Regenerate.
285 * po/POTFILES.in: Regenerate.
286
21169fcf
PB		 2872009-01-14 Peter Bergner <bergner@vnet.ibm.com>
288
289 * ppc-dis.c (print_insn_powerpc): Skip insn if it is deprecated.
290 * ppc-opc.c (powerpc_opcodes) <mtfsf, mtfsf.>: Deprecate the two
291 operand form and enable the four operand form for POWER6 and later.
292 <mtfsfi, mtfsfi.>: Deprecate the two operand form and enable the
293 three operand form for POWER6 and later.
294
4ca47a51
MF		 2952009-01-14 Mike Frysinger <vapier@gentoo.org>
296
297 * bfin-dis.c (OUTS): Use "%s" as format string.
298
8acd5377
L		 2992009-01-13 H.J. Lu <hongjiu.lu@intel.com>
300
301 * i386-gen.c (cpu_flag_init): Remove a white space.
302 (operand_type_init): Likewise.
303
c1ec1875
L		 3042009-01-12 H.J. Lu <hongjiu.lu@intel.com>
305
306 * i386-opc.tbl: Add NoAVX to movnti, lfence and mfence.
307 * i386-tbl.h: Regenerated.
308
c7532693
L		 3092009-01-12 H.J. Lu <hongjiu.lu@intel.com>
310
311 * i386-dis.c (dis386): Use EbS on addB, orB, adcB, sbbB, andB,
312 subB, xorB and cmpB. Use EvS on addS, orS, adcS, sbbS, andS,
313 subS, xorS and cmpS.
314
bd5295b2
L		 3152009-01-10 H.J. Lu <hongjiu.lu@intel.com>
316
317 * i386-gen.c (cpu_flag_init): Replace CpuP4 and CpuK6 with
318 CpuClflush and CpuSYSCALL, respectively. Remove CpuK8. Add
319 CPU_COREI7_FLAGS, CPU_CLFLUSH_FLAGS and CPU_SYSCALL_FLAGS.
320 (cpu_flags): Remove CpuP4, CpuK6 and CpuK8. Add CpuClflush
321 and CpuSYSCALL.
322 (lineno): Removed.
323 (set_bitfield): Take an argument, lineno. Don't report lineno
324 on error if it is -1.
325 (process_i386_cpu_flag): Take an argument, lineno.
326 (process_i386_opcode_modifier): Likewise.
327 (process_i386_operand_type): Likewise.
328 (output_i386_opcode): Likewise.
329 (opcode_hash_entry): Add lineno.
330 (process_i386_opcodes): Updated.
331 (process_i386_registers): Likewise.
332 (process_i386_initializers): Likewise.
333
334 * i386-opc.h (CpuP4): Removed.
335 (CpuK6): Likewise.
336 (CpuK8): Likewise.
337 (CpuClflush): New.
338 (CpuSYSCALL): Likewise.
339 (CpuMMX): Updated.
340 (i386_cpu_flags): Remove cpup4, cpuk6 and cpuk8. Add
341 cpuclflush and cpusyscall.
342
343 * i386-opc.tbl: Update movnti, clflush, lfence, mfence, pause,
344 syscall and sysret.
345 * i386-init.h: Regenerated.
346 * i386-tbl.h: Likewise.
347
1b7f3fb0
L		 3482009-01-09 H.J. Lu <hongjiu.lu@intel.com>
349
350 * i386-gen.c (cpu_flag_init): Add CpuRdtscp to CPU_K8_FLAGS
351 and CPU_AMDFAM10_FLAGS. Add CPU_RDTSCP_FLAGS.
352 (cpu_flags): Add CpuRdtscp.
353 (set_bitfield): Remove CpuSledgehammer check.
354
355 * i386-opc.h (CpuRdtscp): New.
356 (CpuLM): Updated.
357 (i386_cpu_flags): Add cpurdtscp.
358
359 * i386-opc.tbl: Replace CpuSledgehammer with CpuRdtscp.
360 * i386-init.h: Regenerated.
361 * i386-tbl.h: Likewise.
362
1cb0a767
PB		 3632009-01-09 Peter Bergner <bergner@vnet.ibm.com>
364
365 * ppc-opc.c (PPCNONE): Define.
366 (NOPOWER4): Delete.
367 (powerpc_opcodes): Initialize the new "deprecated" field.
368
168e3097
L		 3692009-01-06 H.J. Lu <hongjiu.lu@intel.com>
370
371 AVX Programming Reference (December, 2008)
372 * i386-dis.c (VEX_LEN_2B_M_0): Removed.
373 (VEX_LEN_E7_P_2_M_0): Likewise.
374 (VEX_LEN_2C_P_1): Updated.
375 (VEX_LEN_E8_P_2): Likewise.
376 (vex_len_table): Remove VEX_LEN_2B_M_0 and VEX_LEN_E7_P_2_M_0.
377 (mod_table): Likewise.
378
379 * i386-opc.tbl: Add 256bit vmovntdq, vmovntpd and vmovntps.
380 * i386-tbl.h: Regenerated.
381
22da050b
L		 3822009-01-05 H.J. Lu <hongjiu.lu@intel.com>
383
384 * i386-gen.c (process_copyright): Update for 2009.
385
386 * i386-init.h: Regenerated.
387 * i386-tbl.h: Likewise.
388
0bfee649 3892009-01-05 H.J. Lu <hongjiu.lu@intel.com>
6194aaab 390
0bfee649
L		 391 AVX Programming Reference (December, 2008)
392 * i386-dis.c (OP_VEX_FMA): Removed.
c0f3af97 393 (OP_EX_VexW): Likewise.
0bfee649 394 (OP_EX_VexImmW): Likewise.
c0f3af97 395 (OP_XMM_VexW): Likewise.
c0f3af97 396 (VEXI4_Fixup): Likewise.
c0f3af97 397 (VPERMIL2_Fixup): Likewise.
c0f3af97 398 (VexI4): Likewise.
0bfee649
L		 399 (VexFMA): Likewise.
400 (Vex128FMA): Likewise.
c0f3af97
L		 401 (EXVexW): Likewise.
402 (EXdVexW): Likewise.
403 (EXqVexW): Likewise.
0bfee649 404 (EXVexImmW): Likewise.
c0f3af97 405 (XMVexW): Likewise.
c0f3af97 406 (VPERMIL2): Likewise.
0bfee649
L		 407 (PREFIX_VEX_3A48...PREFIX_VEX_3A4A): Likewise.
408 (PREFIX_VEX_3A5C...PREFIX_VEX_3A5F): Likewise.
409 (PREFIX_VEX_3A68...PREFIX_VEX_3A6F): Likewise.
410 (PREFIX_VEX_3A78...PREFIX_VEX_3A7F): Likewise.
411 (VEX_LEN_3A6A_P_2...VEX_LEN_3A6F_P_2): Likewise.
412 (VEX_LEN_3A7A_P_2...VEX_LEN_3A7F_P_2): Likewise.
413 (get_vex_imm8): Likewise.
414 (OP_EX_VexReg): Likewise.
415 vpermil2_op): Likewise.
416 (EXVexWdq): New.
417 (vex_w_dq_mode): Likewise.
418 (PREFIX_VEX_3896...PREFIX_VEX_389F): Likewise.
419 (PREFIX_VEX_38A6...PREFIX_VEX_38AF): Likewise.
420 (PREFIX_VEX_38B6...PREFIX_VEX_38BF): Likewise.
421 (es_reg): Updated.
422 (PREFIX_VEX_38DB): Likewise.
423 (PREFIX_VEX_3A4A): Likewise.
424 (PREFIX_VEX_3A60): Likewise.
425 (PREFIX_VEX_3ADF): Likewise.
426 (VEX_LEN_3ADF_P_2): Likewise.
427 (prefix_table): Remove PREFIX_VEX_3A48...PREFIX_VEX_3A4A,
428 PREFIX_VEX_3A5C...PREFIX_VEX_3A5F,
429 PREFIX_VEX_3A68...PREFIX_VEX_3A6F and
430 PREFIX_VEX_3A78...PREFIX_VEX_3A7F. Add
431 PREFIX_VEX_3896...PREFIX_VEX_389F,
432 PREFIX_VEX_38A6...PREFIX_VEX_38AF and
433 PREFIX_VEX_38B6...PREFIX_VEX_38BF.
c0f3af97 434 (vex_table): Likewise.
0bfee649
L		 435 (vex_len_table): Remove VEX_LEN_3A6A_P_2...VEX_LEN_3A6F_P_2
436 and VEX_LEN_3A7A_P_2...VEX_LEN_3A7F_P_2.
437 (putop): Support "%XW".
438 (intel_operand_size): Handle vex_w_dq_mode.
58c85be7 439
0bfee649 440 * i386-opc.h (VexNDS): Add a comment for VEX NDS and VEX DDS.
58c85be7 441
0bfee649
L		 442 * i386-opc.tbl: Remove vpermil2pd/vpermil2ps and old FMA
443 instructions. Add new FMA instructions.
28dbc079
L		 444 * i386-tbl.h: Regenerated.
445
0bfee649 4462009-01-02 Matthias Klose <doko@ubuntu.com>
3fe15143 447
0bfee649
L		 448 * or32-opc.c (or32_print_register, or32_print_immediate,
449 disassemble_insn): Don't rely on undefined sprintf behaviour.
3fe15143 450
0bfee649 451For older changes see ChangeLog-2008
252b5132
RH		 452\f
453Local Variables:
2f6d2f85
NC		 454mode: change-log
455left-margin: 8
456fill-column: 74
252b5132
RH		 457version-control: never
458End:
GDB Binutils - Deliverables
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