* spu-low.c (spu_arch_string): New.
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
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12007-02-20 Thiemo Seufer <ths@mips.com>
2 Chao-Ying Fu <fu@mips.com>
3
4 * mips-dis.c (mips_arch_choices): Add DSP R2 support.
5 (print_insn_args): Add support for balign instruction.
6 * mips-opc.c (D33): New shortcut for DSP R2 instructions.
7 (mips_builtin_opcodes): Add DSP R2 instructions.
8
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92007-02-19 Andreas Krebbel <krebbel1@de.ibm.com>
10
11 * s390-opc.c (INSTR_RRF_U0FR, MASK_RRF_U0FR): Removed.
12 (INSTR_RRF_U0RF, MASK_RRF_U0RF): Added.
13 * s390-opc.txt (cfxbr, cfdbr, cfebr, cgebr, cgdbr, cgxbr, cger, cgdr,
14 cgxr, cfxr, cfdr, cfer): Instruction type set to INSTR_RRF_U0RF.
15
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162007-02-19 Andreas Krebbel <krebbel1@de.ibm.com>
17
18 * s390-opc.txt ("efpc", "sfpc"): Set to RRE_RR_OPT instruction type.
19 * s390-opc.c (s390_operands): Add RO_28 as optional gpr.
20 (INSTR_RRE_RR_OPT, MASK_RRE_RR_OPT): New instruction type for efpc
21 and sfpc.
22
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232007-02-16 Nick Clifton <nickc@redhat.com>
24
25 PR binutils/4045
26 * avr-dis.c (comment_start): New variable, contains the prefix to
27 use when printing addresses in comments.
28 (print_insn_avr): Set comment_start to an empty space if there is
29 no symbol table available as the generic address printing code
30 will prefix the numeric value of the address with 0x.
31
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322007-02-13 H.J. Lu <hongjiu.lu@intel.com>
33
34 * i386-dis.c: Updated to use an array of MAX_OPERANDS operands
35 in struct dis386.
36
bd2f2e55 372007-02-05 Dave Brolley <brolley@redhat.com>
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38 Richard Sandiford <rsandifo@redhat.com>
39 DJ Delorie <dj@redhat.com>
40 Graydon Hoare <graydon@redhat.com>
41 Frank Ch. Eigler <fche@redhat.com>
42 Ben Elliston <bje@redhat.com>
43
44 * Makefile.am (HFILES): Add mep-desc.h mep-opc.h.
45 (CFILES): Add mep-*.c
46 (ALL_MACHINES): Add mep-*.lo.
47 (CLEANFILES): Add stamp-mep.
48 (CGEN_CPUS): Add mep.
49 (MEP_DEPS): New variable.
50 (mep-*): New targets.
51 * configure.in: Handle bfd_mep_arch.
52 * disassemble.c (ARCH_mep): New macro.
53 (disassembler): Handle bfd_arch_mep.
54 (disassemble_init_for_target): Likewise.
55 * mep-*: New files for Toshiba Media Processor (MeP).
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56 * Makefile.in: Regenerated.
57 * configure: Regenerated.
58
eb7834a6 592007-02-05 H.J. Lu <hongjiu.lu@intel.com>
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60
61 * i386-dis.c (OP_J): Undo the last change. Properly handle 64K
62 wrap around within the same segment in 16bit mode.
63
eb7834a6 642007-02-02 H.J. Lu <hongjiu.lu@intel.com>
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65
66 * i386-dis.c (OP_J): Mask to 16bit only if there is a data16
67 prefix.
68
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692007-02-02 H.J. Lu <hongjiu.lu@intel.com>
70
71 * avr-dis.c (avr_operand): Correct PR number in comment.
72
fc523535 732007-02-02 H.J. Lu <hongjiu.lu@intel.com>
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74
75 * disassemble.c (disassembler_usage): Call
76 print_i386_disassembler_options for i386 disassembler.
77
78 * i386-dis.c (print_i386_disassembler_options): New.
79 (print_insn): Support the new addr64 option.
80
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812007-02-02 Hiroki Kaminaga <kaminaga@sm.sony.co.jp>
82
83 * ppc-dis.c (powerpc_dialect): Handle ppc440.
84 * ppc-dis.c (print_ppc_disassembler_options): Note the -M440 can
85 be used.
86
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872007-02-02 Alan Modra <amodra@bigpond.net.au>
88
89 * ppc-opc.c (insert_bdm): -Many comment.
90 (valid_bo): Add "extract" param. Accept both powerpc and power4
91 BO fields when disassembling with -Many.
92 (insert_bo, extract_bo, insert_boe, extract_boe): Adjust valid_bo call.
93
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942007-01-08 Kazu Hirata <kazu@codesourcery.com>
95
96 * m68k-opc.c (m68k_opcodes): Replace cpu32 with
97 cpu32 | fido_a except on tbl instructions.
98
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992007-01-04 Paul Brook <paul@codesourcery.com>
100
101 * arm-dis.c (arm_opcodes): Fix cpsie and cpsid entries.
102
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1032007-01-04 Andreas Schwab <schwab@suse.de>
104
105 * m68k-opc.c: Fix encoding of signed bit in the cpu32 tbls insns.
106
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1072007-01-04 Julian Brown <julian@codesourcery.com>
108
109 * arm-dis.c (neon_opcode): Fix disassembly for vshl, vqshl, vrshl,
110 vqrshl instructions.
111
10a2343e 112For older changes see ChangeLog-2006
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113\f
114Local Variables:
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116left-margin: 8
117fill-column: 74
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