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Regenerate files.
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
ae351704
AM		 12007-07-02 Alan Modra <amodra@bigpond.net.au>
2
3 * Makefile.am: Run "make dep-am".
4 * Makefile.in: Regenerate.
5 * aclocal.m4: Regenerate.
6 * config.in: Regenerate.
7 * po/POTFILES.in: Regenerate.
8 * po/opcodes.pot: Regenerate.
9
86b57e31
L		 102007-06-30 H.J. Lu <hongjiu.lu@intel.com>
11
12 * aclocal.m4: Regenerated.
13 * Makefile.in: Likewise.
14
f85fcb85
L		 152007-06-29 H.J. Lu <hongjiu.lu@intel.com>
16
17 * i386-reg.tbl: Remove spaces before comments.
18
3d3d428f
NC		 192007-06-29 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
20
21 * cr16-opc.c: New file.
22 * cr16-dis.c: New file.
23 * Makefile.am: Entries for cr16.
24 * Makefile.in: Regenerate.
25 * cofigure.in: Add cr16 target information.
26 * configure : Regenerate.
27 * disassemble.c: Add cr16 target information.
28
40b8e679
L		 292007-06-28 H.J. Lu <hongjiu.lu@intel.com>
30
31 * Makefile.am (HFILES): Add i386-opc.h and i386-tbl.h.
32 (CFILES): Add i386-gen.c.
33 (i386-gen): New rule.
34 (i386-gen.o): Likewise.
35 (i386-tbl.h): Likewise.
36 Run "make dep-am".
37 * Makefile.in: Regenerated.
38
39 * i386-gen.c: New file.
40 * i386-opc.tbl: Likewise.
41 * i386-reg.tbl: Likewise.
42 * i386-tbl.h: Likewise.
43
44 * i386-opc.c: Include "i386-tbl.h".
45 (i386_optab): Removed.
46 (i386_regtab): Likewise.
47 (i386_regtab_size): Likewise.
48
cd2cf30b
PB		 492007-06-26 Paul Brook <paul@codesourcery.com>
50
51 * arm-dis.c (coprocessor_opcodes): Add fmxr/fmrx mvfr0/mvfr1.
52
5f15756d
L		 532007-06-25 H.J. Lu <hongjiu.lu@intel.com>
54
55 * i386-opc.h (regKludge): Renamed to ...
56 (RegKludge): This.
57
58 * i386-opc.c (i386_optab): Replace regKludge with RegKludge.
59
09a2c6cf
L		 602007-06-23 H.J. Lu <hongjiu.lu@intel.com>
61
62 PR binutils/4667
63 * i386-dis.c (EX): Removed.
64 (EMd): New.
65 (EMq): Likewise.
66 (EXd): Likewise.
67 (EXq): Likewise.
68 (EXx): Likewise.
69 (PREGRP93...PREGRP97): Likewise.
70 (dis386_twobyte): Updated.
71 (prefix_user_table): Updated. Add PREGRP93...PREGRP97.
72 (OP_EX): Remove Intel syntax handling.
73
ddefa7f5
KH		 742007-06-18 Nathan Sidwell <nathan@codesourcery.com>
75
76 * m68k-opc.c (m68k_opcodes): Add wdebugl variants.
77
79887925
L		 782007-06-14 H.J. Lu <hongjiu.lu@intel.com>
79
80 * Makefile.am (ACLOCAL_AMFLAGS): Add -I ../config -I ../bfd.
81
82 * acinclude.m4: Removed.
83
84 * Makefile.in: Regenerated.
85 * doc/Makefile.in: Likewise.
86 * aclocal.m4: Likewise.
87 * configure: Likewise.
88
79d49516
PB		 892007-06-05 Paul Brook <paul@codesourcery.com>
90
91 * arm-dis.c (thumb32_opcodes): Display writeback ldrd/strd addresses.
92
37ad9514
SE		 932007-05-24 Steve Ellcey <sje@cup.hp.com>
94
95 * Makefile.in: Regnerate.
96 * configure: Regenerate.
97 * aclocal.m4: Regenerate.
98
65b650b4
AM		 992007-05-18 Alan Modra <amodra@bigpond.net.au>
100
101 * ppc-dis.c (print_insn_powerpc): Don't skip all operands
102 after setting skip_optional.
103
ea192fa3
PB		 1042007-05-16 Peter Bergner <bergner@vnet.ibm.com>
105
106 * ppc-dis.c (operand_value_powerpc, skip_optional_operands): New.
107 (print_insn_powerpc): Use the new operand_value_powerpc and
108 skip_optional_operands functions to omit or print all optional
109 operands as a group.
110 * ppc-opc.c (BFF, W, XFL_L, XWRA_MASK): New.
111 (XFL_MASK): Delete L and W bits from the mask.
112 (mtfsfi, mtfsfi.): Replace use of BF with BFF. Relpace use of XRA_MASK
113 with XWRA_MASK. Use W.
114 (mtfsf, mtfsf.): Use XFL_L and W.
115
9beff690
L		 1162007-05-14 H.J. Lu <hongjiu.lu@intel.com>
117
118 PR binutils/4502
119 * i386-dis.c (Suffix3DNow): Replace "pfmulhrw" with "pmulhrw".
120
4d67a4d3
L		 1212007-05-10 H.J. Lu <hongjiu.lu@intel.com>
122
123 * i386-opc.h (ShortForm): Redefined.
124 (Jump): Likewise.
125 (JumpDword): Likewise.
126 (JumpByte): Likewise.
127 (JumpInterSegment): Likewise.
128 (FloatMF): Likewise.
129 (FloatR): Likewise.
130 (FloatD): Likewise.
131 (Size16): Likewise.
132 (Size32): Likewise.
133 (Size64): Likewise.
134 (IgnoreSize): Likewise.
135 (DefaultSize): Likewise.
136 (No_bSuf): Likewise.
137 (No_wSuf): Likewise.
138 (No_lSuf): Likewise.
139 (No_sSuf): Likewise.
140 (No_qSuf): Likewise.
141 (No_xSuf): Likewise.
142 (FWait): Likewise.
143 (IsString): Likewise.
144 (regKludge): Likewise.
145 (IsPrefix): Likewise.
146 (ImmExt): Likewise.
147 (NoRex64): Likewise.
148 (Rex64): Likewise.
149 (Ugh): Likewise.
150
8de28984
L		 1512007-05-07 H.J. Lu <hongjiu.lu@intel.com>
152
153 * i386-dis.c (threebyte_0x38_uses_DATA_prefix): Correct entries
154 for some SSE4 instructions.
155 (threebyte_0x3a_uses_DATA_prefix): Likewise.
156
20592a94
L		 1572007-05-03 H.J. Lu <hongjiu.lu@intel.com>
158
159 * i386-dis.c (CRC32_Fixup): Don't print suffix in Intel mode.
160
161 * i386-opc.c (i386_optab): Remove IgnoreSize and correct operand
162 type for crc32.
163
9344ff29
L		 1642007-05-01 H.J. Lu <hongjiu.lu@intel.com>
165
166 * i386-dis.c (CRC32_Fixup): Properly handle Intel mode and
167 check data size prefix in 16bit mode.
168
169 * i386-opc.c (i386_optab): Default crc32 to non-8bit and
170 support Intel mode.
171
53289dcd 1722007-04-30 Mark Salter <msalter@redhat.com>
65b650b4 173
53289dcd
MS		 174 * frv-desc.c: Regenerate.
175 * frv-desc.h: Regenerate.
65b650b4 176
eb42fac1
AM		 1772007-04-30 Alan Modra <amodra@bigpond.net.au>
178
179 PR 4436
180 * ppc-opc.c (powerpc_operands): Correct bitm for second entry of MBE.
181
484c222e
L		 1822007-04-27 H.J. Lu <hongjiu.lu@intel.com>
183
184 * i386-dis.c (modrm): Put reg before rm.
185
5d669648
L		 1862007-04-26 H.J. Lu <hongjiu.lu@intel.com>
187
188 PR binutils/4430
189 * i386-dis.c (print_displacement): New.
190 (OP_E): Call print_displacement instead of print_operand_value
191 to output displacement when either base or index exist. Print
192 the explicit zero displacement in 16bit mode.
193
185b1163
L		 1942007-04-26 H.J. Lu <hongjiu.lu@intel.com>
195
196 PR binutils/4429
197 * i386-dis.c (print_insn): Also swap the order of op_riprel
198 when swapping op_index. Break when the RIP relative address
199 is printed.
200 (OP_E): Properly handle RIP relative addressing and print the
201 explicit zero displacement for Intel mode.
202
eddc20ad
AM		 2032007-04-27 Alan Modra <amodra@bigpond.net.au>
204
205 * Makefile.am: Run "make dep-am".
206 * Makefile.in: Regenerate.
207 * ns32k-dis.c: Include sysdep.h first.
208
dacc8b01
MS		 2092007-04-24 Andreas Krebbel <krebbel1@de.ibm.com>
210
211 * opcodes/s390-opc.c (MASK_SSF_RRDRD): Fourth nybble belongs to the
212 opcode.
eddc20ad
AM		 213 * opcodes/s390-opc.txt (pfpo, ectg, csst): Add new z9-ec instructions.
214
fbb92301
NC		 2152007-04-24 Nick Clifton <nickc@redhat.com>
216
217 * arm-dis.c (print_insn): Initialise type.
218
4c273957
AM		 2192007-04-24 Alan Modra <amodra@bigpond.net.au>
220
221 * cgen-types.h: Include bfd_stdint.h, not stdint.h.
222 * Makefile.am: Run "make dep-am".
223 * Makefile.in: Regenerate.
224
9a2e615a
NS		 2252007-04-23 Nathan Sidwell <nathan@codesourcery.com>
226
227 * m68k-opc.c: Mark mcfisa_c instructions.
228
37b37b2d
RE		 2292007-04-21 Richard Earnshaw <rearnsha@arm.com>
230
231 * arm-dis.c (arm_opcodes): Disassemble to unified syntax.
232 (thumb_opcodes): Add missing white space in adr.
65b650b4 233 (arm_decode_shift): New parameter, print_shift. Only decode the
37b37b2d
RE		 234 shift parameter if set. Adjust callers.
235 (print_insn_arm): Support for operand type q with no shift decode.
236
717bbdf1
AM		 2372007-04-21 Alan Modra <amodra@bigpond.net.au>
238
db557034
AM		 239 * i386-opc.c (i386_float_regtab, i386_float_regtab_size): Delete.
240 Move contents to..
241 (i386_regtab): ..here.
242 * i386-opc.h (i386_float_regtab, i386_float_regtab_size): Delete.
243
717bbdf1
AM		 244 * ppc-opc.c (powerpc_operands): Delete duplicate entries.
245 (BA_MASK, FXM_MASK, STRM_MASK, VA_MASK, VB_MASK, VC_MASK): Delete.
246 (VD_MASK, WS_MASK, MTMSRD_L, XRT_L): Delete.
247 (powerpc_opcodes): Replace uses of MTMSRD_L and XRT_L.
248
78336706
NS		 2492007-04-20 Nathan Sidwell <nathan@codesourcery.com>
250
251 * m68k-dis.c (print_insn_arg): Show c04 as rambar0 and c05 as
252 rambar1.
253
b84bf58a
AM		 2542007-04-20 Alan Modra <amodra@bigpond.net.au>
255
256 * ppc-dis.c (print_insn_powerpc): Adjust for struct powerpc_operand
257 change.
258 * ppc-opc.c (powerpc_operands): Replace bit count with bit mask
259 in all entries. Add PPC_OPERAND_SIGNED to DE entry. Remove
260 references to following deleted functions.
261 (insert_bd, extract_bd, insert_dq, extract_dq): Delete.
262 (insert_ds, extract_ds, insert_de, extract_de): Delete.
263 (insert_des, extract_des, insert_li, extract_li): Delete.
264 (insert_nb, insert_rsq, insert_rtq, insert_ev2, extract_ev2): Delete.
265 (insert_ev4, extract_ev4, insert_ev8, extract_ev8): Delete.
266 (num_powerpc_operands): New constant.
267 (XSPRG_MASK): Remove entire SPRG field.
268 (powerpc_opcodes <bcctre, bcctrel>): Use XLBB_MASK not XLYBB_MASK.
269
0bbdef92
AM		 2702007-04-20 Alan Modra <amodra@bigpond.net.au>
271
272 * ppc-opc.c (DCM, DGM, TE, RMC, R, SP, S): Correct shift.
273 (Z2_MASK): Define.
274 (powerpc_opcodes): Use Z2_MASK in all insns taking RMC operand.
275
86ad2a13
RE		 2762007-04-20 Richard Earnshaw <rearnsha@arm.com>
277
278 * arm-dis.c (print_insn): Only look for a mapping symbol in the section
279 being disassembled.
280
a33e055d
AM		 2812007-04-19 Alan Modra <amodra@bigpond.net.au>
282
283 * Makefile.am: Run "make dep-am".
284 * Makefile.in: Regenerate.
285 * po/POTFILES.in: Regenerate.
286
360b1600
AM		 2872007-04-19 Alan Modra <amodra@bigpond.net.au>
288
289 * ppc-opc.c (powerpc_opcodes): Add cctpl, cctpm, cctph, db8cyc,
290 db10cyc, db12cyc, db16cyc.
291
b20ae55e
AM		 2922007-04-19 Nathan Froyd <froydnj@codesourcery.com>
293
294 * ppc-opc.c (powerpc_opcodes): Recognize three-operand tlbsxe.
295
381d071f
L		 2962007-04-18 H.J. Lu <hongjiu.lu@intel.com>
297
298 * i386-dis.c (CRC32_Fixup): New.
299 (PREGRP85, PREGRP86, PREGRP87, PREGRP88, PREGRP89, PREGRP90,
300 PREGRP91): New.
301 (threebyte_0x38_uses_DATA_prefix): Updated for SSE4.2.
302 (threebyte_0x3a_uses_DATA_prefix): Likewise.
303 (prefix_user_table): Add PREGRP85, PREGRP86, PREGRP87,
304 PREGRP88, PREGRP89, PREGRP90 and PREGRP91.
305 (three_byte_table): Likewise.
306
307 * i386-opc.c (i386_optab): Add SSE4.2 opcodes.
308
f6fdceb7 309 * i386-opc.h (CpuSSE4_2): New.
381d071f
L		 310 (CpuSSE4): Likewise.
311 (CpuUnknownFlags): Add CpuSSE4_2.
312
42903f7f
L		 3132007-04-18 H.J. Lu <hongjiu.lu@intel.com>
314
315 * i386-dis.c (XMM_Fixup): New.
316 (Edqb): New.
317 (Edqd): New.
318 (XMM0): New.
319 (dqb_mode): New.
320 (dqd_mode): New.
321 (PREGRP39 ... PREGRP85): New.
322 (threebyte_0x38_uses_DATA_prefix): Updated for SSE4.
323 (threebyte_0x3a_uses_DATA_prefix): Likewise.
324 (prefix_user_table): Add PREGRP39 ... PREGRP85.
325 (three_byte_table): Likewise.
326 (putop): Handle 'K'.
327 (intel_operand_size): Handle dqb_mode, dqd_mode):
328 (OP_E): Likewise.
329 (OP_G): Likewise.
330
331 * i386-opc.c (i386_optab): Add SSE4.1 opcodes.
332
333 * i386-opc.h (CpuSSE4_1): New.
334 (CpuUnknownFlags): Add CpuSSE4_1.
335 (regKludge): Update comment.
336
ee5c21a0
DJ		 3372007-04-18 Matthias Klose <doko@ubuntu.com>
338
339 * Makefile.am (libopcodes_la_LDFLAGS): Use bfd soversion.
340 * Makefile.in: Regenerate.
341
b7d19ba6
SE		 3422007-04-14 Steve Ellcey <sje@cup.hp.com>
343
344 * Makefile.am: Add ACLOCAL_AMFLAGS.
345 * Makefile.in: Regenerate.
346
246c51aa
L		 3472007-04-13 H.J. Lu <hongjiu.lu@intel.com>
348
349 * i386-dis.c: Remove trailing white spaces.
6e26e51a
L		 350 * i386-opc.c: Likewise.
351 * i386-opc.h: Likewise.
246c51aa 352
7967e09e
L		 3532007-04-11 H.J. Lu <hongjiu.lu@intel.com>
354
355 PR binutils/4333
356 * i386-dis.c (GRP1a): New.
357 (GRP1b ... GRPPADLCK2): Update index.
358 (dis386): Use GRP1a for entry 0x8f.
359 (mod, rm, reg): Removed. Replaced by ...
360 (modrm): This.
361 (grps): Add GRP1a.
362
56dc1f8a
KH		 3632007-04-09 Kazu Hirata <kazu@codesourcery.com>
364
365 * m68k-dis.c (print_insn_m68k): Restore info->fprintf_func and
366 info->print_address_func if longjmp is called.
367
144f4bc6
DD		 3682007-03-29 DJ Delorie <dj@redhat.com>
369
370 * m32c-desc.c: Regenerate.
371 * m32c-dis.c: Regenerate.
372 * m32c-opc.c: Regenerate.
373
e72cf3ec
L		 3742007-03-28 H.J. Lu <hongjiu.lu@intel.com>
375
376 * i386-opc.c (i386_optab): Change InvMem to RegMem for mov and
377 movq. Remove InvMem from sldt, smsw and str.
378
379 * i386-opc.h (InvMem): Renamed to ...
380 (RegMem): Update comments.
381 (AnyMem): Remove InvMem.
382
831480e9 3832007-03-27 Paul Brook <paul@codesourcery.com>
b74ed8f5 384
b74ed8f5
PB		 385 * arm-dis.c (thumb_opcodes): Add entry for undefined insns (0xbe??).
386
4146fd53
PB		 3872007-03-24 Paul Brook <paul@codesourcery.com>
388
389 * arm-dis.c (coprocessor_opcodes): Remove superfluous 0x.
390 (print_insn_coprocessor): Handle %<bitfield>x.
391
b6702015 3922007-03-24 Paul Brook <paul@codesourcery.com>
e72cf3ec 393 Mark Shinwell <shinwell@codesourcery.com>
b6702015
PB		 394
395 * arm-dis.c (arm_opcodes): Print SRS base register.
396
831480e9 3972007-03-23 H.J. Lu <hongjiu.lu@intel.com>
0003779b
L		 398
399 * i386-dis.c (prefix_name): Replace rex64XYZ with rex.WRXB.
400
401 * i386-opc.c (i386_optab): Add rex.wrxb.
402
831480e9 4032007-03-21 H.J. Lu <hongjiu.lu@intel.com>
161a04f6
L		 404
405 * i386-dis.c (REX_MODE64): Remove definition.
406 (REX_EXTX): Likewise.
407 (REX_EXTY): Likewise.
408 (REX_EXTZ): Likewise.
409 (USED_REX): Use REX_OPCODE instead of 0x40.
410 Replace REX_MODE64, REX_EXTX, REX_EXTY and REX_EXTZ with REX_W,
411 REX_R, REX_X and REX_B respectively.
412
831480e9 4132007-03-21 H.J. Lu <hongjiu.lu@intel.com>
8b38ad71
L		 414
415 PR binutils/4218
416 * i386-dis.c (PREGRP38): New.
417 (dis386): Use PREGRP38 for 0x90.
418 (prefix_user_table): Add PREGRP38.
419 (print_insn): Set uses_REPZ_prefix to 1 for pause.
420 (NOP_Fixup1): Properly handle REX bits.
421 (NOP_Fixup2): Likewise.
422
423 * i386-opc.c (i386_optab): Allow %eax with xchg in 64bit.
424 Allow register with nop.
425
75b06e7b
DD		 4262007-03-20 DJ Delorie <dj@redhat.com>
427
428 * m32c-asm.c: Regenerate.
429 * m32c-desc.c: Regenerate.
430 * m32c-desc.h: Regenerate.
431 * m32c-dis.h: Regenerate.
432 * m32c-ibld.c: Regenerate.
433 * m32c-opc.c: Regenerate.
434 * m32c-opc.h: Regenerate.
435
c3fe08fa
L		 4362007-03-15 H.J. Lu <hongjiu.lu@intel.com>
437
438 * i386-opc.c: Include "libiberty.h".
439 (i386_regtab): Remove the last entry.
440 (i386_regtab_size): New.
441 (i386_float_regtab_size): Likewise.
442
443 * i386-opc.h (i386_regtab_size): New.
444 (i386_float_regtab_size): Likewise.
445
0b1cf022
L		 4462007-03-15 H.J. Lu <hongjiu.lu@intel.com>
447
448 * Makefile.am (CFILES): Add i386-opc.c.
449 (ALL_MACHINES): Add i386-opc.lo.
450 Run "make dep-am".
451 * Makefile.in: Regenerated.
452
453 * configure.in: Add i386-opc.lo for bfd_i386_arch.
454 * configure: Regenerated.
455
456 * i386-dis.c: Include "opcode/i386.h".
457 (MAXLEN): Renamed to MAX_MNEM_SIZE. Remove definition.
458 (FWAIT_OPCODE): Remove definition.
459 (UNIXWARE_COMPAT): Renamed to SYSV386_COMPAT. Remove definition.
460 (MAX_OPERANDS): Remove definition.
461
462 * i386-opc.c: New file.
463 * i386-opc.h: Likewise.
464
56eced12
L		 4652007-03-15 H.J. Lu <hongjiu.lu@intel.com>
466
467 * Makefile.in: Regenerated.
468
6f74c397
L		 4692007-03-09 H.J. Lu <hongjiu.lu@intel.com>
470
471 * i386-dis.c (OP_Rd): Renamed to ...
472 (OP_R): This.
473 (Rd): Updated.
474 (Rm): Likewise.
475
a6d04ec4
AM		 4762007-03-08 Alan Modra <amodra@bigpond.net.au>
477
1620f33d
AM		 478 * fr30-asm.c: Regenerate.
479 * frv-asm.c: Regenerate.
480 * ip2k-asm.c: Regenerate.
481 * iq2000-asm.c: Regenerate.
482 * m32c-asm.c: Regenerate.
483 * m32r-asm.c: Regenerate.
484 * m32r-dis.c: Regenerate.
485 * mt-asm.c: Regenerate.
486 * mt-ibld.c: Regenerate.
487 * mt-opc.c: Regenerate.
488 * openrisc-asm.c: Regenerate.
489 * xc16x-asm.c: Regenerate.
490 * xstormy16-asm.c: Regenerate.
491
a6d04ec4
AM		 492 * Makefile.am: Run "make dep-am".
493 * Makefile.in: Regenerate.
494 * po/POTFILES.in: Regenerate.
495
b5639b37
MS		 4962007-03-06 Andreas Krebbel <krebbel1@de.ibm.com>
497
498 * opcodes/s390-opc.c (INSTR_RRE_FR, INSTR_RRF_F0FF2, INSTR_RRF_F0FR,
499 INSTR_RRF_UUFF, INSTR_RRF_0UFF, INSTR_RRF_FFFU, INSTR_RRR_F0FF): New
500 instruction formats added.
501 (MASK_RRE_FR, MASK_RRF_F0FF2, MASK_RRF_F0FR, MASK_RRF_UUFF,
502 MASK_RRF_0UFF, MASK_RRF_FFFU, MASK_RRR_F0FF): New instruction format
503 masks added.
504 * opcodes/s390-opc.txt (lpdfr - tgxt): Decimal floating point
505 instructions added.
506 * opcodes/s390-mkopc.c (s390_opcode_cpu_val): S390_OPCODE_Z9_EC added.
507 (main): z9-ec cpu type option added.
508 * include/opcode/s390.h (s390_opcode_cpu_val): S390_OPCODE_Z9_EC added.
509
b2e818b7
DD		 5102007-02-22 DJ Delorie <dj@redhat.com>
511
512 * s390-opc.c (INSTR_SS_L2RDRD): New.
513 (MASK_SS_L2RDRD): New.
514 * s390-opc.txt (pka): Use it.
515
8b082fb1
TS		 5162007-02-20 Thiemo Seufer <ths@mips.com>
517 Chao-Ying Fu <fu@mips.com>
518
519 * mips-dis.c (mips_arch_choices): Add DSP R2 support.
520 (print_insn_args): Add support for balign instruction.
521 * mips-opc.c (D33): New shortcut for DSP R2 instructions.
522 (mips_builtin_opcodes): Add DSP R2 instructions.
523
929e4d1a
MS		 5242007-02-19 Andreas Krebbel <krebbel1@de.ibm.com>
525
526 * s390-opc.c (INSTR_RRF_U0FR, MASK_RRF_U0FR): Removed.
527 (INSTR_RRF_U0RF, MASK_RRF_U0RF): Added.
528 * s390-opc.txt (cfxbr, cfdbr, cfebr, cgebr, cgdbr, cgxbr, cger, cgdr,
529 cgxr, cfxr, cfdr, cfer): Instruction type set to INSTR_RRF_U0RF.
530
b8e55848
MS		 5312007-02-19 Andreas Krebbel <krebbel1@de.ibm.com>
532
533 * s390-opc.txt ("efpc", "sfpc"): Set to RRE_RR_OPT instruction type.
534 * s390-opc.c (s390_operands): Add RO_28 as optional gpr.
535 (INSTR_RRE_RR_OPT, MASK_RRE_RR_OPT): New instruction type for efpc
536 and sfpc.
537
af692060
NC		 5382007-02-16 Nick Clifton <nickc@redhat.com>
539
540 PR binutils/4045
541 * avr-dis.c (comment_start): New variable, contains the prefix to
542 use when printing addresses in comments.
543 (print_insn_avr): Set comment_start to an empty space if there is
544 no symbol table available as the generic address printing code
545 will prefix the numeric value of the address with 0x.
546
ce518a5f
L		 5472007-02-13 H.J. Lu <hongjiu.lu@intel.com>
548
549 * i386-dis.c: Updated to use an array of MAX_OPERANDS operands
550 in struct dis386.
551
bd2f2e55 5522007-02-05 Dave Brolley <brolley@redhat.com>
8c9c183d
DB		 553 Richard Sandiford <rsandifo@redhat.com>
554 DJ Delorie <dj@redhat.com>
555 Graydon Hoare <graydon@redhat.com>
556 Frank Ch. Eigler <fche@redhat.com>
557 Ben Elliston <bje@redhat.com>
558
559 * Makefile.am (HFILES): Add mep-desc.h mep-opc.h.
560 (CFILES): Add mep-*.c
561 (ALL_MACHINES): Add mep-*.lo.
562 (CLEANFILES): Add stamp-mep.
563 (CGEN_CPUS): Add mep.
564 (MEP_DEPS): New variable.
565 (mep-*): New targets.
566 * configure.in: Handle bfd_mep_arch.
567 * disassemble.c (ARCH_mep): New macro.
568 (disassembler): Handle bfd_arch_mep.
569 (disassemble_init_for_target): Likewise.
570 * mep-*: New files for Toshiba Media Processor (MeP).
bd2f2e55
DB		 571 * Makefile.in: Regenerated.
572 * configure: Regenerated.
573
eb7834a6 5742007-02-05 H.J. Lu <hongjiu.lu@intel.com>
65ca155d
L		 575
576 * i386-dis.c (OP_J): Undo the last change. Properly handle 64K
577 wrap around within the same segment in 16bit mode.
578
eb7834a6 5792007-02-02 H.J. Lu <hongjiu.lu@intel.com>
206717e8
L		 580
581 * i386-dis.c (OP_J): Mask to 16bit only if there is a data16
582 prefix.
583
c4f5c3d7
L		 5842007-02-02 H.J. Lu <hongjiu.lu@intel.com>
585
586 * avr-dis.c (avr_operand): Correct PR number in comment.
587
fc523535 5882007-02-02 H.J. Lu <hongjiu.lu@intel.com>
f59a29b9
L		 589
590 * disassemble.c (disassembler_usage): Call
591 print_i386_disassembler_options for i386 disassembler.
592
593 * i386-dis.c (print_i386_disassembler_options): New.
594 (print_insn): Support the new addr64 option.
595
64a3a6fc
NC		 5962007-02-02 Hiroki Kaminaga <kaminaga@sm.sony.co.jp>
597
598 * ppc-dis.c (powerpc_dialect): Handle ppc440.
599 * ppc-dis.c (print_ppc_disassembler_options): Note the -M440 can
600 be used.
601
ba4e851b
AM		 6022007-02-02 Alan Modra <amodra@bigpond.net.au>
603
604 * ppc-opc.c (insert_bdm): -Many comment.
605 (valid_bo): Add "extract" param. Accept both powerpc and power4
606 BO fields when disassembling with -Many.
607 (insert_bo, extract_bo, insert_boe, extract_boe): Adjust valid_bo call.
608
3bdcfdf4
KH		 6092007-01-08 Kazu Hirata <kazu@codesourcery.com>
610
611 * m68k-opc.c (m68k_opcodes): Replace cpu32 with
612 cpu32 | fido_a except on tbl instructions.
613
a028a6f5
PB		 6142007-01-04 Paul Brook <paul@codesourcery.com>
615
616 * arm-dis.c (arm_opcodes): Fix cpsie and cpsid entries.
617
baee4c9e
AS		 6182007-01-04 Andreas Schwab <schwab@suse.de>
619
620 * m68k-opc.c: Fix encoding of signed bit in the cpu32 tbls insns.
621
62ac925e
JB		 6222007-01-04 Julian Brown <julian@codesourcery.com>
623
624 * arm-dis.c (neon_opcode): Fix disassembly for vshl, vqshl, vrshl,
625 vqrshl instructions.
626
10a2343e 627For older changes see ChangeLog-2006
252b5132
RH		 628\f
629Local Variables:
2f6d2f85
NC		 630mode: change-log
631left-margin: 8
632fill-column: 74
252b5132
RH		 633version-control: never
634End:
GDB Binutils - Deliverables
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