Add MIPS r3 and r5 support.
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
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ae52f483
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12014-05-07 Andrew Bennett <andrew.bennett@imgtec.com>
2
3 * mips-opc.c (mips_builtin_opcodes): Add MIPS32r5 eretnc instruction.
4 (I34): New define.
5 (I36): New define.
6 (I66): New define.
7 (I68): New define.
8 * mips-dis.c (mips_arch_choices): Add mips32r3, mips32r5, mips64r3 and
9 mips64r5.
10 (parse_mips_dis_option): Update MSA and virtualization support to
11 allow mips64r3 and mips64r5.
12
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132014-05-07 Andrew Bennett <andrew.bennett@imgtec.com>
14
15 * mips-opc.c (G3): Remove I4.
16
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172014-05-05 H.J. Lu <hongjiu.lu@intel.com>
18
19 PR binutils/16893
20 * i386-dis.c (twobyte_has_mandatory_prefix): New variable.
21 (end_codep): Likewise.
22 (mandatory_prefix): Likewise.
23 (active_seg_prefix): Likewise.
24 (ckprefix): Set active_seg_prefix to the active segment register
25 prefix.
26 (seg_prefix): Removed.
27 (get_valid_dis386): Use the last of PREFIX_REPNZ and PREFIX_REPZ
28 for prefix index. Ignore the index if it is invalid and the
29 mandatory prefix isn't required.
30 (print_insn): Set mandatory_prefix if the PREFIX_XXX prefix is
31 mandatory. Don't set PREFIX_REPZ/PREFIX_REPNZ/PREFIX_LOCK bits
32 in used_prefixes here. Don't print unused prefixes. Check
33 active_seg_prefix for the active segment register prefix.
34 Restore the DFLAG bit in sizeflag if the data size prefix is
35 unused. Check the unused mandatory PREFIX_XXX prefixes
36 (append_seg): Only print the segment register which gets used.
37 (OP_E_memory): Check active_seg_prefix for the segment register
38 prefix.
39 (OP_OFF): Likewise.
40 (OP_OFF64): Likewise.
41 (OP_DSreg): Set active_seg_prefix to PREFIX_DS if it is unset.
42
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432014-05-02 H.J. Lu <hongjiu.lu@intel.com>
44
45 PR binutils/16886
46 * config.in: Regenerated.
47 * configure: Likewise.
48 * configure.in: Check if sigsetjmp is available.
49 * h8500-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
50 (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
51 (print_insn_h8500): Replace setjmp with OPCODES_SIGSETJMP.
52 * i386-dis.c (dis_private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
53 (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
54 (print_insn): Replace setjmp with OPCODES_SIGSETJMP.
55 * ns32k-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
56 (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
57 (print_insn_ns32k): Replace setjmp with OPCODES_SIGSETJMP.
58 * sysdep.h (OPCODES_SIGJMP_BUF): New macro.
59 (OPCODES_SIGSETJMP): Likewise.
60 (OPCODES_SIGLONGJMP): Likewise.
61 * vax-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
62 (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
63 (print_insn_vax): Replace setjmp with OPCODES_SIGSETJMP.
64 * xtensa-dis.c (dis_private): Replace jmp_buf with
65 OPCODES_SIGJMP_BUF.
66 (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
67 (print_insn_xtensa): Replace setjmp with OPCODES_SIGSETJMP.
68 * z8k-dis.c(instr_data_s): Replace jmp_buf with OPCODES_SIGJMP_BUF.
69 (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
70 (print_insn_z8k): Replace setjmp with OPCODES_SIGSETJMP.
71
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722014-05-01 H.J. Lu <hongjiu.lu@intel.com>
73
74 PR binutils/16891
75 * i386-dis.c (print_insn): Handle prefixes before fwait.
76
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772014-04-26 Alan Modra <amodra@gmail.com>
78
79 * po/POTFILES.in: Regenerate.
80
7d64c587
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812014-04-23 Andrew Bennett <andrew.bennett@imgtec.com>
82
83 * mips-dis.c (mips_arch_choices): Update mips32r2 and mips64r2
84 to allow the MIPS XPA ASE.
85 (parse_mips_dis_option): Process the -Mxpa option.
86 * mips-opc.c (XPA): New define.
87 (mips_builtin_opcodes): Add MIPS XPA instructions and move the
88 locations of the ctc0 and cfc0 instructions.
89
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902014-04-22 Christian Svensson <blue@cmd.nu>
91
92 * Makefile.am: Remove openrisc and or32 support. Add support for or1k.
93 * configure.in: Likewise.
94 * disassemble.c: Likewise.
95 * or1k-asm.c: New file.
96 * or1k-desc.c: New file.
97 * or1k-desc.h: New file.
98 * or1k-dis.c: New file.
99 * or1k-ibld.c: New file.
100 * or1k-opc.c: New file.
101 * or1k-opc.h: New file.
102 * or1k-opinst.c: New file.
103 * Makefile.in: Regenerate.
104 * configure: Regenerate.
105 * openrisc-asm.c: Delete.
106 * openrisc-desc.c: Delete.
107 * openrisc-desc.h: Delete.
108 * openrisc-dis.c: Delete.
109 * openrisc-ibld.c: Delete.
110 * openrisc-opc.c: Delete.
111 * openrisc-opc.h: Delete.
112 * or32-dis.c: Delete.
113 * or32-opc.c: Delete.
114
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1152014-04-04 Ilya Tocar <ilya.tocar@intel.com>
116
117 * i386-dis.c (rm_table): Add encls, enclu.
118 * i386-gen.c (cpu_flag_init): Add CPU_SE1_FLAGS,
119 (cpu_flags): Add CpuSE1.
120 * i386-opc.h (enum): Add CpuSE1.
121 (i386_cpu_flags): Add cpuse1.
122 * i386-opc.tbl: Add encls, enclu.
123 * i386-init.h: Regenerated.
124 * i386-tbl.h: Likewise.
125
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1262014-04-02 Anthony Green <green@moxielogic.com>
127
128 * moxie-opc.c (moxie_form1_opc_info): Add sign-extension
129 instructions, sex.b and sex.s.
130
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1312014-03-26 Jiong Wang <jiong.wang@arm.com>
132
133 * aarch64-dis.c (aarch64_ext_ldst_elemlist): Check H/S undefined
134 instructions.
135
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1362014-03-20 Ilya Tocar <ilya.tocar@intel.com>
137
138 * i386-opc.tbl: Change memory size for vgatherpf0qps, vgatherpf1qps,
139 vscatterpf0qps, vscatterpf1qps, vgatherqps, vpgatherqd, vpscatterqd,
140 vscatterqps.
141 * i386-tbl.h: Regenerate.
142
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JM
1432014-03-19 Jose E. Marchesi <jose.marchesi@oracle.com>
144
145 * sparc-dis.c (v9_hpriv_reg_names): Names for %hstick_offset and
146 %hstick_enable added.
147
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1482014-03-19 Nick Clifton <nickc@redhat.com>
149
150 * rx-decode.opc (bwl): Allow for bogus instructions with a size
151 field of 3.
b41c812c 152 (sbwl, ubwl, SCALE): Likewise.
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153 * rx-decode.c: Regenerate.
154
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1552014-03-12 Alan Modra <amodra@gmail.com>
156
157 * Makefile.in: Regenerate.
158
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1592014-03-05 Alan Modra <amodra@gmail.com>
160
161 Update copyright years.
162
cd0c81e9 1632014-03-04 Heiher <r@hev.cc>
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RS
164
165 * mips-dis.c (mips_arch_choices): Usee ISA_MIPS64R2 for Loongson-3A.
166
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1672014-03-04 Richard Sandiford <rdsandiford@googlemail.com>
168
169 * mips-opc.c (mips_builtin_opcodes): Move the udi* instructions
170 so that they come after the Loongson extensions.
171
2c80b753
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1722014-03-03 Alan Modra <amodra@gmail.com>
173
174 * i386-gen.c (process_copyright): Emit copyright notice on one line.
175
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1762014-02-28 Alan Modra <amodra@gmail.com>
177
178 * msp430-decode.c: Regenerate.
179
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1802014-02-27 Jiong Wang <jiong.wang@arm.com>
181
182 * aarch64-tbl.h (aarch64_opcode_table): Replace IMM0 with
183 FPIMM0 for fcmeq, fcmgt, fcmge, fcmlt and fcmle.
184
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1852014-02-27 Yufeng Zhang <yufeng.zhang@arm.com>
186
187 * aarch64-opc.c (print_register_offset_address): Call
188 get_int_reg_name to prepare the register name.
189
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1902014-02-25 Ilya Tocar <ilya.tocar@intel.com>
191
192 * i386-opc.tbl: Remove wrong variant of vcvtps2ph
193 * i386-tbl.h: Regenerate.
194
1952014-02-20 Ilya Tocar <ilya.tocar@intel.com>
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196
197 * i386-gen.c (cpu_flag_init): Add CPU_PREFETCHWT1_FLAGS/
198 (cpu_flags): Add CpuPREFETCHWT1.
199 * i386-init.h: Regenerate.
200 * i386-opc.h (CpuPREFETCHWT1): New.
201 (i386_cpu_flags): Add cpuprefetchwt1.
202 * i386-opc.tbl: Cahnge CPU of prefetchwt1 from CpuAVX512PF to CpuPREFETCHWT1.
203 * i386-tbl.h: Regenerate.
204
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2052014-02-20 Ilya Tocar <ilya.tocar@intel.com>
206
207 * i386-opc.tbl: Change CPU of vptestnmq, vptestnmd from CpuAVX512CD,
208 to CpuAVX512F.
209 * i386-tbl.h: Regenerate.
210
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2112014-02-19 H.J. Lu <hongjiu.lu@intel.com>
212
213 * i386-gen.c (output_cpu_flags): Don't output trailing space.
214 (output_opcode_modifier): Likewise.
215 (output_operand_type): Likewise.
216 * i386-init.h: Regenerated.
217 * i386-tbl.h: Likewise.
218
963f3586
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2192014-02-12 Ilya Tocar <ilya.tocar@intel.com>
220
221 * i386-dis.c (MOD enum): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4,
222 MOD_0FC7_REG_5.
223 (PREFIX enum): Add PREFIX_0FAE_REG_7.
224 (reg_table): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4 MOD_0FC7_REG_5.
225 (prefix_table): Add clflusopt.
226 (mod_table): Add xrstors, xsavec, xsaves.
227 * i386-gen.c (cpu_flag_init): Add CPU_CLFLUSHOPT_FLAGS,
228 CPU_XSAVES_FLAGS, CPU_XSAVEC_FLAGS.
229 (cpu_flags): Add CpuClflushOpt, CpuXSAVES, CpuXSAVEC.
230 * i386-init.h: Regenerate.
231 * i386-opc.tbl: Add clflushopt, xrstors, xrstors64, xsaves,
232 xsaves64, xsavec, xsavec64.
233 * i386-tbl.h: Regenerate.
234
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2352014-02-10 Alan Modra <amodra@gmail.com>
236
237 * po/POTFILES.in: Regenerate.
238 * po/opcodes.pot: Regenerate.
239
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2402014-01-30 Michael Zolotukhin <michael.v.zolotukhin@gmail.com>
241 Jan Beulich <jbeulich@suse.com>
242
243 PR binutils/16490
244 * i386-dis.c (OP_E_memory): Fix shift computation for
245 vex_vsib_q_w_dq_mode.
246
e2e6193d
RM
2472014-01-09 Bradley Nelson <bradnelson@google.com>
248 Roland McGrath <mcgrathr@google.com>
249
250 * i386-dis.c (print_insn): Do not touch all_prefixes[-1] when
251 last_rex_prefix is -1.
252
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2532014-01-08 H.J. Lu <hongjiu.lu@intel.com>
254
255 * i386-gen.c (process_copyright): Update copyright year to 2014.
256
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2572014-01-03 Maciej W. Rozycki <macro@codesourcery.com>
258
259 * nds32-asm.c (parse_operand): Fix out-of-range integer constant.
260
5fb776a6 261For older changes see ChangeLog-2013
252b5132 262\f
5fb776a6 263Copyright (C) 2014 Free Software Foundation, Inc.
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264
265Copying and distribution of this file, with or without modification,
266are permitted in any medium without royalty provided the copyright
267notice and this notice are preserved.
268
252b5132 269Local Variables:
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270mode: change-log
271left-margin: 8
272fill-column: 74
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273version-control: never
274End:
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