gas/arc: Additional work to support multiple arc_opcode chains
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
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820f03ff
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12016-04-05 Andrew Burgess <andrew.burgess@embecosm.com>
2
3 * arc-nps400-tbl.h: Add movbi, decode1, fbset, fbclear, encode0,
4 encode1, rflt, crc16, and crc32 instructions.
5 * arc-opc.c (arc_flag_operands): Add F_NPS_R.
6 (arc_flag_classes): Add C_NPS_R.
7 (insert_nps_bitop_size_2b): New function.
8 (extract_nps_bitop_size_2b): Likewise.
9 (insert_nps_bitop_uimm8): Likewise.
10 (extract_nps_bitop_uimm8): Likewise.
11 (arc_operands): Add new operand entries.
12
8ddf6b2a
CZ
132016-04-05 Claudiu Zissulescu <claziss@synopsys.com>
14
15 * arc-regs.h: Add a new subclass field. Add double assist
16 accumulator register values.
17 * arc-tbl.h: Use DPA subclass to mark the double assist
18 instructions. Use DPX/SPX subclas to mark the FPX instructions.
19 * arc-opc.c (RSP): Define instead of SP.
20 (arc_aux_regs): Add the subclass field.
21
589a7d88
JW
222016-04-05 Jiong Wang <jiong.wang@arm.com>
23
24 * arm-dis.c: Support FP16 vmul, vmla, vmls (by scalar).
25
0a191de9 262016-03-31 Andrew Burgess <andrew.burgess@embecosm.com>
2cce10e7
AB
27
28 * arc-opc.c (arc_operands): Fix operand flags for NPS_R_DST, and
29 NPS_R_SRC1.
30
0a106562
AB
312016-03-30 Andrew Burgess <andrew.burgess@embecosm.com>
32
33 * arc-nps400-tbl.h: Add a header comment, and fix some whitespace
34 issues. No functional changes.
35
bd05ac5f
CZ
362016-03-30 Claudiu Zissulescu <claziss@synopsys.com>
37
38 * arc-regs.h (IC_RAM_ADDRESS, IC_TAG, IC_WP, IC_DATA, CONTROL0)
39 (AX2, AY2, MX2, MY2, AY0, AY1, DC_RAM_ADDR, DC_TAG, CONTROL1)
40 (RTT): Remove duplicate.
41 (LCDINSTR, LCDDATA, LCDSTAT, CC_*, PCT_COUNT*, PCT_SNAP*)
42 (PCT_CONFIG*): Remove.
43 (D1L, D1H, D2H, D2L): Define.
44
9885948f
CZ
452016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
46
47 * arc-ext-tbl.h (dsp_fp_i2flt): Fix typo.
48
f2dd8838
CZ
492016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
50
51 * arc-tbl.h (invld07): Remove.
52 * arc-ext-tbl.h: New file.
53 * arc-dis.c (FIELDA, FIELDB, FIELDC): Remove.
54 * arc-opc.c (arc_opcodes): Add ext-tbl include.
55
0d2f91fe
JK
562016-03-24 Jan Kratochvil <jan.kratochvil@redhat.com>
57
58 Fix -Wstack-usage warnings.
59 * aarch64-dis.c (print_operands): Substitute size.
60 * aarch64-opc.c (print_register_offset_address): Substitute tblen.
61
a6b71f42
JM
622016-03-22 Jose E. Marchesi <jose.marchesi@oracle.com>
63
64 * sparc-opc.c (sparc_opcodes): Reorder entries for `rd' in order
65 to get a proper diagnostic when an invalid ASR register is used.
66
9780e045
NC
672016-03-22 Nick Clifton <nickc@redhat.com>
68
69 * configure: Regenerate.
70
e23e8ebe
AB
712016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
72
73 * arc-nps400-tbl.h: New file.
74 * arc-opc.c: Add top level comment.
75 (insert_nps_3bit_dst): New function.
76 (extract_nps_3bit_dst): New function.
77 (insert_nps_3bit_src2): New function.
78 (extract_nps_3bit_src2): New function.
79 (insert_nps_bitop_size): New function.
80 (extract_nps_bitop_size): New function.
81 (arc_flag_operands): Add nps400 entries.
82 (arc_flag_classes): Add nps400 entries.
83 (arc_operands): Add nps400 entries.
84 (arc_opcodes): Add nps400 include.
85
1ae8ab47
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862016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
87
88 * arc-opc.c (arc_flag_classes): Convert all flag classes to use
89 the new class enum values.
90
8699fc3e
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912016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
92
93 * arc-dis.c (print_insn_arc): Handle nps400.
94
24740d83
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952016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
96
97 * arc-opc.c (BASE): Delete.
98
8678914f
NC
992016-03-18 Nick Clifton <nickc@redhat.com>
100
101 PR target/19721
102 * aarch64-tbl.h (aarch64_opcode_table): Fix type of second operand
103 of MOV insn that aliases an ORR insn.
104
cc933301
JW
1052016-03-16 Jiong Wang <jiong.wang@arm.com>
106
107 * arm-dis.c (neon_opcodes): Support new FP16 instructions.
108
f86f5863
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1092016-03-07 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
110
111 * mcore-opc.h: Add const qualifiers.
112 * microblaze-opc.h (struct op_code_struct): Likewise.
113 * sh-opc.h: Likewise.
114 * tic4x-dis.c (tic4x_print_indirect): Likewise.
115 (tic4x_print_op): Likewise.
116
62de1c63
AM
1172016-03-02 Alan Modra <amodra@gmail.com>
118
d11698cd 119 * or1k-desc.h: Regenerate.
62de1c63 120 * fr30-ibld.c: Regenerate.
c697cf0b 121 * rl78-decode.c: Regenerate.
62de1c63 122
020efce5
NC
1232016-03-01 Nick Clifton <nickc@redhat.com>
124
125 PR target/19747
126 * rl78-dis.c (print_insn_rl78_common): Fix typo.
127
b0c11777
RL
1282016-02-24 Renlin Li <renlin.li@arm.com>
129
130 * arm-dis.c (coprocessor_opcodes): Add fp16 instruction entries.
131 (print_insn_coprocessor): Support fp16 instructions.
132
3e309328
RL
1332016-02-24 Renlin Li <renlin.li@arm.com>
134
135 * arm-dis.c (print_insn_coprocessor): Fix mask for vsel, vmaxnm,
136 vminnm, vrint(mpna).
137
8afc7bea
RL
1382016-02-24 Renlin Li <renlin.li@arm.com>
139
140 * arm-dis.c (print_insn_coprocessor): Check co-processor number for
141 cpd/cpd2, mcr/mcr2, mrc/mrc2, ldc/ldc2, stc/stc2.
142
4fd7268a
L
1432016-02-15 H.J. Lu <hongjiu.lu@intel.com>
144
145 * i386-dis.c (print_insn): Parenthesize expression to prevent
146 truncated addresses.
147 (OP_J): Likewise.
148
4670103e
CZ
1492016-02-10 Claudiu Zissulescu <claziss@synopsys.com>
150 Janek van Oirschot <jvanoirs@synopsys.com>
151
152 * arc-opc.c (arc_relax_opcodes, arc_num_relax_opcodes): New
153 variable.
154
c1d9289f
NC
1552016-02-04 Nick Clifton <nickc@redhat.com>
156
157 PR target/19561
158 * msp430-dis.c (print_insn_msp430): Add a special case for
159 decoding an RRC instruction with the ZC bit set in the extension
160 word.
161
a143b004
AB
1622016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
163
164 * cgen-ibld.in (insert_normal): Rework calculation of shift.
165 * epiphany-ibld.c: Regenerate.
166 * fr30-ibld.c: Regenerate.
167 * frv-ibld.c: Regenerate.
168 * ip2k-ibld.c: Regenerate.
169 * iq2000-ibld.c: Regenerate.
170 * lm32-ibld.c: Regenerate.
171 * m32c-ibld.c: Regenerate.
172 * m32r-ibld.c: Regenerate.
173 * mep-ibld.c: Regenerate.
174 * mt-ibld.c: Regenerate.
175 * or1k-ibld.c: Regenerate.
176 * xc16x-ibld.c: Regenerate.
177 * xstormy16-ibld.c: Regenerate.
178
b89807c6
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1792016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
180
181 * epiphany-dis.c: Regenerated from latest cpu files.
182
d8c823c8
MM
1832016-02-01 Michael McConville <mmcco@mykolab.com>
184
185 * cgen-dis.c (count_decodable_bits): Use unsigned value for mask
186 test bit.
187
5bc5ae88
RL
1882016-01-25 Renlin Li <renlin.li@arm.com>
189
190 * arm-dis.c (mapping_symbol_for_insn): New function.
191 (find_ifthen_state): Call mapping_symbol_for_insn().
192
0bff6e2d
MW
1932016-01-20 Matthew Wahab <matthew.wahab@arm.com>
194
195 * aarch64-opc.c (operand_general_constraint_met_p): Check validity
196 of MSR UAO immediate operand.
197
100b4f2e
MR
1982016-01-18 Maciej W. Rozycki <macro@imgtec.com>
199
200 * mips-dis.c (print_insn_micromips): Remove 48-bit microMIPS
201 instruction support.
202
5c14705f
AM
2032016-01-17 Alan Modra <amodra@gmail.com>
204
205 * configure: Regenerate.
206
4d82fe66
NC
2072016-01-14 Nick Clifton <nickc@redhat.com>
208
209 * rl78-decode.opc (rl78_decode_opcode): Add 's' operand to movw
210 instructions that can support stack pointer operations.
211 * rl78-decode.c: Regenerate.
212 * rl78-dis.c: Fix display of stack pointer in MOVW based
213 instructions.
214
651657fa
MW
2152016-01-14 Matthew Wahab <matthew.wahab@arm.com>
216
217 * aarch64-opc.c (aarch64_sys_reg_supported_p): Merge conditionals
218 testing for RAS support. Add checks for erxfr_el1, erxctlr_el1,
219 erxtatus_el1 and erxaddr_el1.
220
105bde57
MW
2212016-01-12 Matthew Wahab <matthew.wahab@arm.com>
222
223 * arm-dis.c (arm_opcodes): Add "esb".
224 (thumb_opcodes): Likewise.
225
afa8d405
PB
2262016-01-11 Peter Bergner <bergner@vnet.ibm.com>
227
228 * ppc-opc.c <xscmpnedp>: Delete.
229 <xvcmpnedp>: Likewise.
230 <xvcmpnedp.>: Likewise.
231 <xvcmpnesp>: Likewise.
232 <xvcmpnesp.>: Likewise.
233
83c3256e
AS
2342016-01-08 Andreas Schwab <schwab@linux-m68k.org>
235
236 PR gas/13050
237 * m68k-opc.c (moveb, movew): For ISA_B/C only allow #,d(An) in
238 addition to ISA_A.
239
6f2750fe
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2402016-01-01 Alan Modra <amodra@gmail.com>
241
242 Update year range in copyright notice of all files.
243
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244For older changes see ChangeLog-2015
245\f
246Copyright (C) 2016 Free Software Foundation, Inc.
247
248Copying and distribution of this file, with or without modification,
249are permitted in any medium without royalty provided the copyright
250notice and this notice are preserved.
251
252Local Variables:
253mode: change-log
254left-margin: 8
255fill-column: 74
256version-control: never
257End:
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