projects / deliverable / binutils-gdb.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
Fix -Wshadow warnings (seen on ppc-aix)
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
2426c15f
L		 12009-12-19 H.J. Lu <hongjiu.lu@intel.com>
2
3 * i386-gen.c (opcode_modifiers): Remove VexNDS, VexNDD and
4 VexLWP. Add VexVVVV.
5
6 * i386-opc.h (VexNDS): Removed.
7 (VexNDD): Likewise.
8 (VexLWP): Likewise.
9 (VEXXDS): New.
10 (VEXNDD): Likewise.
11 (VEXLWP): Likewise.
12 (VexVVVV): Likewise.
13 (i386_opcode_modifier): Remove vexnds, vexndd and vexlwp.
14 Add vexvvvv.
15
16 * i386-opc.tbl: Replace VexNDS with VexVVVV=1, VexNDD with
17 VexVVVV=2 and VexLWP with VexVVVV=3.
18 * i386-tbl.h: Regenerated.
19
94ff3a50
L		 202009-12-18 H.J. Lu <hongjiu.lu@intel.com>
21
22 * i386-gen.c (operand_types): Move Imm1 before Imm8.
23
ff4a8d2b
NC		 242009-12-17 Nick Clifton <nickc@redhat.com>
25
26 PR binutils/10924
27 * arm-dis.c: Add support for %<>ru and %<>rU formats to enforce
28 unique register numbers. Extend support for %<>R format to
29 thumb32 and coprocessor instructions.
30
2eb952a4
L		 312009-12-16 H.J. Lu <hongjiu.lu@intel.com>
32
33 * i386-gen.c (opcode_modifiers): Remove ByteOkIntel.
34
35 * i386-opc.h (ByteOkIntel): Removed.
36 (i386_opcode_modifier): Remove byteokintel.
37
38 * i386-opc.tbl: Remove ByteOkIntel.
39 * i386-tbl.h: Regenerated.
40
7f399153
L		 412009-12-16 H.J. Lu <hongjiu.lu@intel.com>
42
43 * i386-gen.c (opcode_modifiers): Remove Vex0F, Vex0F38,
44 Vex0F3A, XOP08, XOP09 and XOP0A. Add VexOpcode.
45
46 * i386-opc.h (Vex0F): Removed.
47 (Vex0F38): Likewise.
48 (Vex0F3A): Likewise.
49 (VexOpcode): New.
50 (VEX0F): Likewise.
51 (VEX0F38): Likewise.
52 (VEX0F3A): Likewise.
53 (XOP08): Defined as a macro.
54 (XOP09): Likewise.
55 (XOP0A): Likewise.
56 (i386_opcode_modifier): Remove vex0f, vex0f38, vex0f3a, xop08,
57 xop09 and xop0a. Add vexopcode.
58
59 * i386-opc.tbl: Replace Vex0F with VexOpcode=0, Vex0F38 with
60 VexOpcode=1, Vex0F3A with VexOpcode=2, XOP08 with VexOpcode=3,
61 XOP09 with VexOpcode=4 and XOP0A with VexOpcode=5.
62 * i386-tbl.h: Regenerated.
63
8c43a48b
L		 642009-12-15 H.J. Lu <hongjiu.lu@intel.com>
65
66 * i386-opc.h (VEX2SOURCES): Renamed to ...
67 (XOP2SOURCES): This.
68
8cd7925b
L		 692009-12-15 H.J. Lu <hongjiu.lu@intel.com>
70
71 * i386-gen.c (opcode_modifiers): Remove Vex3Sources and
72 Vex2Sources. Add VexSources.
73
25ac7f26 74 * i386-opc.h (Vex2Sources): Removed.
8cd7925b
L		 75 (Vex3Sources): Likewise.
76 (VEX2SOURCES): New.
77 (VEX3SOURCES): Likewise.
78 (VexSources): Likewise.
79 (i386_opcode_modifier): Remove vex2sources and vex3sources.
80 Add vexsources.
81
82 * i386-opc.tbl: Replace Vex2Sources with VexSources=1 and
83 Vex3Sourceswith VexSources=2.
84 * i386-tbl.h: Regenerated.
85
1ef99a7b
L		 862009-12-15 H.J. Lu <hongjiu.lu@intel.com>
87
88 * i386-gen.c (opcode_modifiers): Remove VexW0 and VexW1. Add
89 VexW.
90
91 * i386-opc.h (VexW0): Removed.
92 (VexW1): Likewise.
93 (VEXW0): New.
94 (VEXW1): Likewise.
95 (VexW): Likewise.
96 (i386_opcode_modifier): Remove vexw0 and vexw1. Add vexw.
97
98 * i386-opc.tbl: Replace VexW0 with VexW=1 and VexW1 with
99 Vex=2.
8cd7925b 100 * i386-tbl.h: Regenerated.
1ef99a7b 101
bcf2684f
L		 1022009-12-15 H.J. Lu <hongjiu.lu@intel.com>
103
104 * i386-dis.c (VEX_W_3818_P_2_M_0): New.
105 (vex_w_table): Add VEX_W_3818_P_2_M_0.
106 (mod_table): Use VEX_W_3818_P_2_M_0.
107
a179a9fd
L		 1082009-12-15 H.J. Lu <hongjiu.lu@intel.com>
109
110 * i386-dis.c (vex_w_table): Reformat.
111
53aa04a0
L		 1122009-12-15 H.J. Lu <hongjiu.lu@intel.com>
113
114 * i386-dis.c (VEX_W_382X_P_2_M_0): New.
115 (vex_w_table): Add VEX_W_382X_P_2_M_0.
116 (mod_table): Use VEX_W_382X_P_2_M_0.
117
efdb52b7
L		 1182009-12-15 H.J. Lu <hongjiu.lu@intel.com>
119
120 * i386-dis.c (vex_w_table): Reformat.
121
9e30b8e0
L		 1222009-12-15 H.J. Lu <hongjiu.lu@intel.com>
123
124 * i386-dis.c (USE_VEX_W_TABLE): New.
125 (VEX_W_TABLE): Likewise.
126 (VEX_W_XXX): Likewise.
127 (vex_w_table): Likewise.
128 (prefix_table): Use VEX_W_XXX.
129 (vex_table): Likewise.
130 (vex_len_table): Likewise.
131 (mod_table): Likewise.
132 (get_valid_dis386): Handle USE_VEX_W_TABLE.
133
134 * i386-opc.tbl: Add VexW0 to AVX instructions where the VEX.W bit
135 isn't used.
136 * i386-tbl.h: Regenerated.
137
e3c58833
L		 1382009-12-15 H.J. Lu <hongjiu.lu@intel.com>
139
140 * i386-opc.h (VEX128): New.
141 (VEX256): Likewise.
142
4c807e72
L		 1432009-12-14 H.J. Lu <hongjiu.lu@intel.com>
144
145 * i386-dis.c (vex_len_table): Reformat.
146
976f1fde
L		 1472009-12-14 H.J. Lu <hongjiu.lu@intel.com>
148
149 * i386-dis.c (MOD_VEX_51): Renamed to ...
150 (MOD_VEX_50): This.
151 (vex_table): Updated.
152 (mod_table): Likewise.
153
ab8e2090
NC		 1542009-12-14 Nick Clifton <nickc@redhat.com>
155
156 PR binutils/10924
157 * arm-dis.c (arm_opcodes): Specify %R in cases where using r15
158 results in unpredictable behaviour.
159 (print_insn_arm): Handle %R.
160
759a05ce
L		 1612009-12-11 H.J. Lu <hongjiu.lu@intel.com>
162
163 * i386-dis.c (get_valid_dis386): Set vex.w to 0 for VEX C5
164 prefix.
165 (print_insn): Don't set vex.w here.
166
5639ff87
L		 1672009-12-11 H.J. Lu <hongjiu.lu@intel.com>
168
169 * i386-dis.c (print_insn): Set vex.w to 0.
170
02e647f9
SP		 1712009-12-11 Quentin Neill <quentin.neill@amd.com>
172
173 * i386-dis.c (get_vex_imm8): Extend logic to apply in all cases,
174 to avoid fetching ahead for the immediate bytes when OP_E_memory
175 has already been called. Fix indentation.
176
91d6fa6a
NC		 1772009-12-11 Nick Clifton <nickc@redhat.com>
178
179 * Makefile.in: Regenerate.
180 * configure: Regenerate.
181 * arm-dis.c: Fix shadowed variable warnings.
182 * cgen-opc.c: Likewise.
183 * cr16-dis.c: Likewise.
184 * crx-dis.c: Likewise.
185 * d30v-dis.c: Likewise.
186 * fr30-dis.c: Likewise.
187 * frv-opc.c: Likewise.
188 * h8500-dis.c: Likewise.
189 * i386-dis.c: Likewise.
190 * i960-dis.c: Likewise.
191 * ia64-gen.c: Likewise.
192 * ia64-opc.c: Likewise.
193 * m32c-asm.c: Likewise.
194 * m32c-dis.c: Likewise.
195 * m68k-dis.c: Likewise.
196 * maxq-dis.c: Likewise.
197 * mcore-dis.c: Likewise.
198 * mep-asm.c: Likewise.
199 * microblaze-dis.c: Likewise.
200 * mmix-dis.c: Likewise.
201 * ns32k-dis.c: Likewise.
202 * or32-opc.c: Likewise.
203 * s390-dis.c: Likewise.
204 * sh64-dis.c: Likewise.
205 * spu-dis.c: Likewise.
206 * tic30-dis.c: Likewise.
207
07a28fab
NC		 2082009-12-09 Nick Clifton <nickc@redhat.com>
209
210 PR 10924
211 * arm-dis.c (print_insn_arm): Mark insns that use the PC in
212 post-indexed addressing as unpredictable.
213
eacc9c89
L		 2142009-12-03 H.J. Lu <hongjiu.lu@intel.com>
215
216 * i386-dis.c (FXSAVE_Fixup): New.
217 (FXSAVE): Likewise.
218 (mod_table): Use FXSAVE on fxsave and fxrstor.
219
220 * i386-opc.tbl: Add fxsave64 and fxrstor64.
221 * i386-tbl.h: Regenerated.
222
03ee1b7f
NC		 2232009-12-02 Nick Clifton <nickc@redhat.com>
224 Richard Earnshaw <rearnsha@arm.com>
225
226 PR gas/11013
227 * arm-dis.c (thumb32_opc): Adjust disassembly of QADD, QDADD, QSUB
228 and QDSUB.
229
ee9fd255
NC		 2302009-11-30 Massimo Ruo Roch <massimo.ruoroch@polito.it>
231
232 PR gas/11030
233 * m68k-opc.c (m68k_opcodes): Allow the STLDSR instruction on the
234 Coldfire ISA A+.
235
ccc5981b
SP		 2362009-11-17 Quentin Neill <quentin.neill@amd.com>
237 Sebastian Pop <sebastian.pop@amd.com>
238
239 * i386-dis.c (get_vex_imm8): Increase bytes_before_imm when
240 decoding the second source operand from the immediate byte.
241 (OP_EX_VexW): Pass an extra integer to identify the second
242 and third source arguments.
243
18d0c96e
L		 2442009-11-19 H.J. Lu <hongjiu.lu@intel.com>
245
246 * i386-opc.tbl: Add IsLockable to cmpxch16b.
247 * i386-tbl.h: Regenerated.
248
945ee430
NC		 2492009-11-19 Nick Clifton <nickc@redhat.com>
250
251 PR binutils/10924
252 * arm-dis.c (print_insn_arm): Do not print an offset of zero when
253 decoding Immediaate Offset addressing.
254
41effecb
SP		 2552009-11-18 Sebastian Pop <sebastian.pop@amd.com>
256
257 PR binutils/10973
258 * i386-dis.c (get_vex_imm8): Do not increment codep.
259 Avoid incrementing bytes_before_imm when OP_E_memory
260 has already forwarded the codep pointer.
261 (OP_EX_VexW): Increment codep to skip mod/rm byte.
262
f0ae4a24
SP		 2632009-11-18 Sebastian Pop <sebastian.pop@amd.com>
264
265 * i386-dis.c (VEX_LEN_XOP_08_A0): Removed.
266 (VEX_LEN_XOP_08_A1): Removed.
267 (xop_table): Remove entries for VEX_LEN_XOP_08_A0 and
268 VEX_LEN_XOP_08_A1.
269 (vex_len_table): Same.
270 * i386-gen.c (CPU_CVT16_FLAGS): Removed.
271 (cpu_flags): Remove field for CpuCVT16.
272 * i386-opc.h (CpuCVT16): Removed.
273 (i386_cpu_flags): Remove bitfield cpucvt16.
274 (i386-opc.tbl): Remove CVT16 instructions.
275 * i386-init.h: Regenerated.
276 * i386-tbl.h: Regenerated.
277
5dd85c99
SP		 2782009-11-17 Sebastian Pop <sebastian.pop@amd.com>
279 Quentin Neill <quentin.neill@amd.com>
280
281 * i386-dis.c (OP_Vex_2src_1): New.
282 (OP_Vex_2src_2): New.
283 (Vex_2src_1): New.
284 (Vex_2src_2): New.
285 (XOP_08): Added.
286 (VEX_LEN_XOP_08_A0): Added.
287 (VEX_LEN_XOP_08_A1): Added.
288 (VEX_LEN_XOP_09_80): Added.
289 (VEX_LEN_XOP_09_81): Added.
290 (xop_table): Added an entry for XOP_08. Handle xop instructions.
291 (vex_len_table): Added entries for VEX_LEN_XOP_08_A0,
292 VEX_LEN_XOP_08_A1, VEX_LEN_XOP_09_80, VEX_LEN_XOP_09_81.
293 (get_valid_dis386): Handle XOP_08.
294 (OP_Vex_2src): New.
295 * i386-gen.c (cpu_flag_init): Add CPU_XOP_FLAGS and CPU_CVT16_FLAGS.
296 (cpu_flags): Add CpuXOP and CpuCVT16.
297 (opcode_modifiers): Add XOP08, Vex2Sources.
298 * i386-opc.h (CpuXOP): Added.
299 (CpuCVT16): Added.
300 (i386_cpu_flags): Add cpuxop and cpucvt16.
301 (XOP08): Added.
302 (Vex2Sources): Added.
303 (i386_opcode_modifier): Add xop08, vex2sources.
304 * i386-opc.tbl: Add entries for XOP and CVT16 instructions.
305 * i386-init.h: Regenerated.
306 * i386-tbl.h: Regenerated.
307
aefd8a40
NC		 3082009-11-17 Nick Clifton <nickc@redhat.com>
309
310 PR binutils/10924
311 * arm-dis.c (arm_opcodes): Add patterns to match undefined LDRB
312 instruction variants. Add pattern for MRS variant that was being
313 confused with CMP.
314 (arm_decode_shift): Place error message in a comment.
315 (print_insn_arm): Note that writing back to the PC is
316 unpredictable.
317 Only print 'p' variants of cmp/cmn/teq/tst instructions if
318 decoding for pre-V6 architectures.
319
0bb027fd
RR		 3202009-11-17 Edward Nevill <edward.nevill@arm.com>
321
322 * arm-dis.c (print_insn_thumb32): Handle undefined instruction.
323
c7e770a0
DE		 3242009-11-14 Doug Evans <dje@sebabeach.org>
325
326 * Makefile.am (stamp-xc16x): Use ../cpu/xc16x.cpu instead of
327 ../cgen/cpu.
328 * Makefile.in: Regenerate.
329
8b3f93e7
L		 3302009-11-13 H.J. Lu <hongjiu.lu@intel.com>
331
332 * i386-dis.c (OP_E_extended): Removed.
333
2a70cca4
L		 3342009-11-13 H.J. Lu <hongjiu.lu@intel.com>
335
336 * i386-dis.c (print_insn): Check rex_ignored.
337
f16cd0d5
L		 3382009-11-13 H.J. Lu <hongjiu.lu@intel.com>
339
340 * i386-dis.c (ckprefix): Updated to return 0 if number of
341 prefixes > 14 and record the last position for each prefix.
342 (lock_prefix): Removed.
343 (data_prefix): Likewise.
344 (addr_prefix): Likewise.
345 (repz_prefix): Likewise.
346 (repnz_prefix): Likewise.
347 (last_lock_prefix): New.
348 (last_repz_prefix): Likewise.
349 (last_repnz_prefix): Likewise.
350 (last_data_prefix): Likewise.
351 (last_addr_prefix): Likewise.
352 (last_rex_prefix): Likewise.
353 (last_seg_prefix): Likewise.
354 (MAX_CODE_LENGTH): Likewise.
355 (ADDR16_PREFIX): Likewise.
356 (ADDR32_PREFIX): Likewise.
357 (DATA16_PREFIX): Likewise.
358 (DATA32_PREFIX): Likewise.
359 (REP_PREFIX): Likewise.
360 (seg_prefix): Likewise.
361 (all_prefixes): Change size to MAX_CODE_LENGTH - 1.
362 (prefix_name): Handle ADDR16_PREFIX, ADDR32_PREFIX,
363 DATA16_PREFIX, DATA32_PREFIX and REP_PREFIX.
364 (get_valid_dis386): Updated.
365 (OP_C): Likewise.
366 (OP_Monitor): Likewise.
367 (REP_Fixup): Likewise.
368 (print_insn): Display all prefixes.
369 (putop): Set PREFIX_DATA on used_prefixes only if it is used.
370 (intel_operand_size): Likewise.
371 (OP_E_register): Likewise.
372 (OP_G): Likewise.
373 (OP_REG): Likewise.
374 (OP_IMREG): Likewise.
375 (OP_I): Likewise.
376 (OP_I64): Likewise.
377 (OP_sI): Likewise.
378 (CRC32_Fixup): Likewise.
379 (MOVBE_Fixup): Likewise.
380 (OP_E_memory): Set REFIX_DATA on used_prefixes when it is used
381 in 16bit mode.
382 (OP_J): Set REX_W used if it is used. Set PREFIX_DATA on
383 used_prefixes only if it is used.
384
20efc689
L		 3852009-11-12 H.J. Lu <hongjiu.lu@intel.com>
386
387 * i386-opc.tbl: Remove IsLockable from add, adc, and, dec, inc,
388 or, sbb, sub, xor and xchg with register only operands.
389 * i386-tbl.h: Regenerated.
390
c32fa91d
L		 3912009-11-12 H.J. Lu <hongjiu.lu@intel.com>
392
393 * i386-gen.c (opcode_modifiers): Add IsLockable.
394
395 * i386-opc.h (IsLockable): New.
396 (i386_opcode_modifier): Add islockable.
397
398 * i386-opc.tbl: Add IsLockable to add, adc, and, btc, btr,
399 bts, cmpxchg, cmpxch8b, dec, inc, neg, not, or, sbb, sub,
400 xor, xadd and xchg.
401 * i386-tbl.h: Regenerated.
402
79862e45
DJ		 4032009-11-12 Daniel Jacobowitz <dan@codesourcery.com>
404
405 * arm-dis.c (coprocessor_opcodes): Use %A instead of %C. Remove
406 generic coprocessor instructions for FPA loads and stores.
407 (print_insn_coprocessor): Remove %C support. Display address for
408 PC-relative offsets in %A.
409
f310f33d
L		 4102009-11-11 H.J. Lu <hongjiu.lu@intel.com>
411
412 * i386-dis.c (all_prefixes): New.
413 (ckprefix): Set all_prefixes.
414 (print_insn): Print all_prefixes instead of lock_prefix,
415 repz_prefix, repnz_prefix, addr_prefix and data_prefix.
416
c1e26897
NC		 4172009-11-11 Nick Clifton <nickc@redhat.com>
418
419 PR binutils/10924
420 * arm-dis.c (UNPREDICTABLE_INSTRUCTION): New macro.
421 (print_insn_arm): Extend %s format control code to check for
422 unpredictable addressing modes. Add support for %S format control
423 code which suppresses this check.
424 (W_BIT, I_BIT, U_BIT, P_BIT): New macros.
425 (WRITEBACK_BIT_SET, IMMEDIATE_BIT_SET, NEGATIVE_BIT_SET,
426 PRE_BIT_SET): New macros.
427 (print_insn_coprocessor): Use the new macros instead of magic
428 constants.
429 (print_arm_address): Likewise.
430 (pirnt_insn_arm): Likewise.
431 (print_insn_thumb32): Likewise.
432
41327c9d
NC		 4332009-11-11 Nick Clifton <nickc@redhat.com>
434
435 * po/id.po: Updated Indonesian translation.
436
0d999f33
MK		 4372009-11-10 Maxim Kuvyrkov <maxim@codesourcery.com>
438
439 * m68k-dis.c (print_insn_arg): Handle RGPIOBAR, ACR[4-7] and MBAR[01].
440
c48244a5
SP		 4412009-11-06 Sebastian Pop <sebastian.pop@amd.com>
442
443 * i386-dis.c (reg_table): Add XOP_8F_TABLE (XOP_09) to
444 reg_table[REG_8F][1]: for XOP instructions, ModRM.reg first points to
445 B.mm in the RXB.mmmmm byte, and so when B is set, we still should use
446 the xop_table.
447 (get_valid_dis386): Removed unused condition (from cut/n/paste) for
448 XOP instructions.
449
f88c9eb0
SP		 4502009-11-05 Sebastian Pop <sebastian.pop@amd.com>
451 Quentin Neill <quentin.neill@amd.com>
452
453 * opcodes/i386-dis.c (OP_LWPCB_E): New.
454 (OP_LWP_E): New.
455 (OP_LWP_I): New.
456 (USE_XOP_8F_TABLE): New.
457 (XOP_8F_TABLE): New.
458 (REG_XOP_LWPCB): New.
459 (REG_XOP_LWP): New.
460 (XOP_09): New.
461 (XOP_0A): New.
462 (reg_table): Redirect REG_8F to XOP_8F_TABLE.
463 Add entries for REG_XOP_LWPCB and REG_XOP_LWP.
464 (xop_table): New.
465 (get_valid_dis386): Handle USE_XOP_8F_TABLE.
466 Use the offsets VEX_0F, VEX_0F38, and VEX_0F3A instead of their values
467 to access to the vex_table.
468 (OP_LWPCB_E): New.
469 (OP_LWP_E): New.
470 (OP_LWP_I): New.
471 * opcodes/i386-gen.c (cpu_flag_init): Add CPU_LWP_FLAGS, CpuLWP.
472 (cpu_flags): Add CpuLWP.
473 (opcode_modifiers): Add VexLWP, XOP09, and XOP0A.
474 * opcodes/i386-opc.h (CpuLWP): New.
475 (i386_cpu_flags): Add bit cpulwp.
476 (VexLWP): New.
477 (XOP09): New.
478 (XOP0A): New.
479 (i386_opcode_modifier): Add vexlwp, xop09, and xop0a.
480 * opcodes/i386-opc.tbl (llwpcb): Added.
481 (lwpval): Added.
482 (lwpins): Added.
483
0d734b5d
DD		 4842009-11-04 DJ Delorie <dj@redhat.com>
485
486 * rx-decode.opc (rx_decode_opcode) (mvtipl): Add.
487 (mvtcp, mvfcp, opecp): Remove.
488 * rx-decode.c: Regenerate.
489 * rx-dis.c (cpen): Remove.
490
d51b88d3
DE		 4912009-11-03 Doug Evans <dje@sebabeach.org>
492
493 * m32c-desc.c: Regenerate.
494 * mep-desc.c: Regenerate.
495
62f3b8c8
PB		 4962009-11-02 Paul Brook <paul@codesourcery.com>
497
498 * arm-dis.c (coprocessor_opcodes): Update to use new feature flags.
499 Add VFPv4 instructions.
500
206c2556
L		 5012009-10-29 Sebastian Pop <sebastian.pop@amd.com>
502
503 * i386-dis.c (OP_VEX_FMA): Removed.
504 (VexFMA): Removed.
505 (Vex128FMA): Removed.
506 (prefix_table): First source operand of FMA4 insns is decoded
507 with Vex not with VexFMA.
508 (OP_EX_VexW): Second source operand is decoded with get_vex_imm8
509 when vex.w is set. Third source operand is decoded with
510
a2b2318d
AM		 5112009-10-27 Alan Modra <amodra@bigpond.net.au>
512
513 * Makefile.am (HFILES): Remove cgen-ops.h and cgen-types.h.
514 * Makefile.in: Regenerate.
515 * po/POTFILES.in: Regenerate.
516
ac1e9eca
DE		 5172009-10-23 Doug Evans <dje@sebabeach.org>
518
519 * cgen-ops.h: Delete, moved to ../include/cgen/basic-ops.h.
520 * cgen-types.h: Delete, moved to ../include/cgen/basic-modes.h.
521 * cgen-bitset.c: Update.
522 * fr30-desc.h: Regenerate.
523 * frv-desc.h: Regenerate.
524 * ip2k-desc.h: Regenerate.
525 * iq2000-desc.h: Regenerate.
526 * lm32-desc.h: Regenerate.
527 * m32c-desc.h: Regenerate.
528 * m32c-opc.h: Regenerate.
529 * m32r-desc.h: Regenerate.
530 * mep-desc.h: Regenerate.
531 * mt-desc.h: Regenerate.
532 * openrisc-desc.h: Regenerate.
533 * xc16x-desc.h: Regenerate.
534 * xstormy16-desc.h: Regenerate.
535
f282425e
DD		 5362009-10-22 DJ Delorie <dj@redhat.com>
537
538 * rx-decode.opc (decode_opcode): Fix flags for MUL, SUNTIL, and SWHILE.
539 * rx-decode.c: Regenerated.
540
4b06377f
L		 5412009-10-20 H.J. Lu <hongjiu.lu@intel.com>
542
543 PR gas/10775
544 * i386-dis.c: Document LB, LS and LV macros.
545 (dis386): Use mov%LB, mov%LS and mov%LV on mov instruction
546 with the 64-bit displacement or immediate operand.
547 (putop): Handle LB, LS and LV macros.
548
cedb97b6
DE		 5492009-10-18 Doug Evans <dje@sebabeach.org>
550
551 * lm32-opinst.c: Regenerate.
552 * m32c-desc.c: Regenerate.
553 * m32r-opinst.c: Regenerate.
554 * openrisc-ibld.c: Regenerate.
555 * xc16x-desc.c: Regenerate.
556 * xc16x-desc.h: Regenerate.
557
d1119f7a
DE		 5582009-10-17 Doug Evans <dje@sebabeach.org>
559
560 * Makefile.am (CGEN_CPUS): Add iq2000, lm32.
561 (FR30_DEPS, FRV_DEPS, IQ2000_DEPS): Move so all cgen *_DEPS are
562 sorted alphabetically.
563 (stamp-fr30, stamp-frv, stamp-iq2000, stamp-xc16x): Move so all cgen
564 stamp-* rules are sorted alphabetically.
565 * Makefile.in: Regenerate.
566
52a6c1fe
L		 5672009-10-16 H.J. Lu <hongjiu.lu@intel.com>
568
569 * i386-opc.h: Use enum instead of nested macros.
570
3873ba12
L		 5712009-10-16 H.J. Lu <hongjiu.lu@intel.com>
572
573 * i386-dis.c: Simplify enums.
574
51e7da1b
L		 5752009-10-15 H.J. Lu <hongjiu.lu@intel.com>
576 Ineiev <ineiev@gmail.com>
577
578 PR binutils/10767
579 * i386-dis.c: Use enum instead of nested macros.
580
c39846ed
L		 5812009-10-15 H.J. Lu <hongjiu.lu@intel.com>
582
583 * i386-dis.c (MAX_BYTEMODE): Removed.
584
6a327e17
AM		 5852009-10-14 Tomas Hurka <tom@hukatronic.cz>
586
587 PR 969
588 * m68k-opc.c (m68k_opcodes): Correct mask for macl and msacl.
589
55b126d4
L		 5902009-10-13 H.J. Lu <hongjiu.lu@intel.com>
591
592 * i386-dis.c (print_insn): Always clear need_vex, need_vex_reg
593 and vex_w_done.
594
ef299415
ME		 5952009-10-07 Michael Eager <eager@eagercon.com>
596
55b126d4 597 * microblaze-dis.c: Add include for microblaze-dis.h,
ef299415 598 eliminate local extern decls.
55b126d4 599 * microblaze-dis.h: New.
ef299415 600
245caaea
NC		 6012009-10-06 Nick Clifton <nickc@redhat.com>
602
603 * po/fi.po: Updated Finnish translation.
604
49293ef7
NC		 6052009-10-03 Andreas Schwab <schwab@linux-m68k.org>
606
607 * opc2c.c: Include "libiberty.h" and <errno.h>.
608 (orig_filename): Constify.
609 (dump_lines): Fix line number directive.
610 (main): Set orig_filename to basename of input file. Use
611 xstrerror.
612
613 * Makefile.am (rx-dis.lo): Remove explicit dependencies.
614 ($(srcdir)/rx-decode.c): Use @MAINT@. Use $(EXEEXT_FOR_BUILD)
615 instead of $(EXEEXT).
616 (opc2c$(EXEEXT_FOR_BUILD)): Renamed from opc2c$(EXEEXT) and use
617 $(LINK_FOR_BUILD). Link with libiberty.
618 (MOSTLYCLEANFILES): Add opc2c$(EXEEXT_FOR_BUILD).
619 (MAINTAINERCLEANFILES): Add $(srcdir)/rx-decode.c.
620 * Makefile.in: Regenerated.
621 * rx-decode.c: Regenerated.
622
8977d4b2
AM		 6232009-10-03 Paul Reed <paulreed@paddedcell.com>
624
625 * arm-dis.c (print_insn): Check symtab_size not *symtab.
626
f98fa534
L		 6272009-10-02 H.J. Lu <hongjiu.lu@intel.com>
628
629 * i386-opc.tbl: Drop Disp64 on jump and loop instructions.
630 * i386-tbl.h: Regenerated.
631
9fe54b1c
PB		 6322009-10-02 Peter Bergner <bergner@vnet.ibm.com>
633
634 * ppc-dis.c (ppc_opts): Add "476" entry.
635 * ppc-opc.c (PPC476): Define.
636 (powerpc_opcodes): Update mnemonics where required for 476.
637
634b50f2
PB		 6382009-10-01 Peter Bergner <bergner@vnet.ibm.com>
639
640 * ppc-opc.c (PPCA2): Use renamed mask PPC_OPCODE_A2.
641 * ppc-dis.c (ppc_opts): Likewise.
642 Rename "ppca2" to "a2".
643
4ded9dda
SR		 6442009-10-01 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
645
646 * crx-dis.c (match_opcode): Truncate mcode to 32-bit.
647
c7927a3c
NC		 6482009-09-29 DJ Delorie <dj@redhat.com>
649
650 * Makefile.am: Add RX files.
651 * configure.in: Add support for RX target.
652 * disassemble.c: Likewise.
653 * Makefile.in: Regenerate.
654 * configure: Regenerate.
655 * opc2c.c: New file.
656 * rx-decode.c: New file.
657 * rx-decode.opc: New file.
658 * rx-dis.c: New file.
659
8765b556
PB		 6602009-09-29 Peter Bergner <bergner@vnet.ibm.com>
661
662 * ppc-opc.c (powerpc_opcodes): Remove support for the the "lxsdux",
663 "lxvd2ux", "lxvw4ux", "stxsdux", "stxvd2ux" and "stxvw4ux" opcodes.
664
fe2d172c
ME		 6652009-09-25 Michael Eager <eager@eagercon.com>
666
e0c483d6
AM		 667 * microblaze-dis.c (get_insn_microblaze, microblaze_get_target_address,
668 microblaze_decode_insn): Add declarations.
669 (get_delay_slots_microblaze): Remove.
fe2d172c 670
21d799b5
NC		 6712009-09-25 Martin Thuresson <martint@google.com>
672
e0c483d6 673 Update sources to make arc and arm targets compile cleanly with
21d799b5
NC		 674 -Wc++-compat:
675 * arc-dis.c Fix casts.
676 * arc-ext.c: Add casts.
677 * arm-dis.c (enum opcode_sentinel_enum): Gave name to anonymous
678 enum.
679
2bf05e57
L		 6802009-09-24 H.J. Lu <hongjiu.lu@intel.com>
681
682 * i386-gen.c (opcode_modifiers): Remove Vex256.
683 (set_bitfield): Handle XXX=V.
684
685 * i386-opc.h (Vex): Update comments.
686 (Vex256): Removed.
687 (VexNDS): Updated.
e0c483d6 688 (i386_opcode_modifier): Change vex to 2 bits. Remove vex256.
2bf05e57
L		 689
690 * i386-opc.tbl: Replace "Vex|Vex256" with Vex=2.
691 * i386-tbl.h: Regenerated.
692
8a00d392
NC		 6932009-09-23 Nick Clifton <nickc@redhat.com>
694
695 * po/fr.po: Updated French translation.
696
e0d602ec
BE		 6972009-09-21 Ben Elliston <bje@au.ibm.com>
698 Peter Bergner <bergner@vnet.ibm.com>
699
700 * ppc-dis.c (ppc_opts): Add "ppca2" entry.
701 * ppc-opc.c (powerpc_opcodes): Add eratilx, eratsx, eratsx.,
702 eratre, wchkall, eratwe, ldawx., mdfcrx., mfdcr. mtdcrx., icswx,
703 icswx., mtdcr., dci, wclrone, wclrall, wclr, erativax, tlbsrx.,
704 ici mnemonics.
705 (ERAT_T): New operand.
706 (XWC_MASK): New mask.
707 (XOPL2): New macro.
708 (PPCA2): Define.
709
ca58b19f
NC		 7102009-09-18 Nick Clifton <nickc@redhat.com>
711
712 * po/es.po: Updated Spanish translation.
713 * po/vi.po: Updated Vietnamese translation.
714
05203043
L		 7152009-09-15 H.J. Lu <hongjiu.lu@intel.com>
716
717 * i386-dis.c (OP_E_memory): Don't print '-' in Intel mode if
718 disp == -disp.
719
df58f7b0
NC		 7202009-09-14 Nick Clifton <nickc@redhat.com>
721
722 * po/nl.po: Updated Dutch translation.
723
1e9cc1c2
NC		 7242009-09-11 Nick Clifton <nickc@redhat.com>
725
726 * po/opcodes.pot: Updated by the Translation project.
727
7282009-09-11 Martin Thuresson <martint@google.com>
729
730 Updated sources to compile cleanly with -Wc++-compat:
731 * ld.h (enum endian_enum,enum symbolic_enum,enum dynamic_list_enum): Move to top level.
732 * ldcref.c: Add casts.
733 * ldctor.c: Add casts.
734 * ldexp.c
735 * ldexp.h (enum node_tree_enum,enum phase_enum): Move to top level.
736 * ldlang.c: Add casts. (lang_insert_orphan): Use enum name instead of integer.
737 * ldlang.h (enum statement_enum): Move to top level.
738 * ldmain.c: Add casts.
739 * ldwrite.c: Add casts.
740 * lexsup.c: Add casts. (enum control_enum): Move to top level.
741 * mri.c: Add casts. (mri_draw_tree): Use enum name instead of integer.
742
c8676ae4 7432009-09-10 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
e0c483d6 744
c8676ae4
AK		 745 * s390-dis.c (print_insn_s390): Avoid 'long long'.
746
7330f9c3 7472009-09-10 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
e0c483d6 748
7330f9c3
AK		 749 * s390-dis.c (s390_extract_operand): Remove the shift for pcrel operands.
750 (print_insn_s390): Signextend and shift pcrel operands before printing.
751
9daa0d29
L		 7522009-09-09 H.J. Lu <hongjiu.lu@intel.com>
753
754 * i386-dis.c (vex_len_table): Change VEX_LEN_AE_R_X_M0 to
755 VEX_LEN_AE_R_X_M_0 in comments.
756
495c5f87
DD		 7572009-09-08 DJ Delorie <dj@redhat.com>
758
759 * mep-opc.c: Regenerate.
760
84c71969
AS		 7612009-09-08 Andreas Schwab <schwab@linux-m68k.org>
762
763 * z8kgen.c (struct op): Replace unused flavor with id.
764 (opt): Remove extra xorb entry.
765 (func): Use id field as fallback.
766 (sub): Return new string, caller changed.
767 (internal): Allocate end marker. Assign unique id before sorting.
768 (gas): Likewise. Fix loop end condition.
769 * z8k-opc.h: Regenerate.
770
bdc7fcfe
AM		 7712009-09-08 Alan Modra <amodra@bigpond.net.au>
772
773 * ppc-opc.c (powerpc_macros <extrdi>): Allow n+b of 64.
774
815c0482
AM		 7752009-09-07 Alan Modra <amodra@bigpond.net.au>
776
777 * z8kgen.c (func): Fix thinko last patch.
778
eae14d64
AM		 7792009-09-07 Alan Modra <amodra@bigpond.net.au>
780
781 * z8kgen.c (func): Stabilize qsort of identically named entries.
782 * z8k-opc.h: Regenerate.
783
23f938f1
TG		 7842009-09-07 Tristan Gingold <gingold@adacore.com>
785
786 * po/opcodes.pot: Regenerate.
787
2eee5593
AM		 7882009-09-07 Alan Modra <amodra@bigpond.net.au>
789
790 * configure.in (BUILD_LIBS, BUILD_LIB_DEPS): Define and subst.
791 * configure: Regenerate.
792 * Makefile.am (LIBIBERTY, BUILD_LIBIBERTY, BUILD_LIBINTL): Delete.
793 (BUILD_LIBS, BUILD_LIB_DEPS): Define. Use..
794 (i386-gen, ia64-gen, z8kgen): ..here.
795 * Makefile.in: Regenerate.
796
ae794f60
TG		 7972009-09-07 Tristan Gingold <gingold@adacore.com>
798
799 * z8k-opc.h: Regenerate.
800
96d56e9f
NC		 8012009-09-05 Martin Thuresson <martin@mtme.org>
802
803 * ia64-dis.c (print_insn_ia64): Update code to use renamed member.
804 * m88k-dis.c (m88kdis): Rename variable class to in_class.
805 * tic80-opc.c (tic80_symbol_to_value, tic80_value_to_symbol):
806 Rename argument class to symbol_class.
807
66a6900a
JZ		 8082009-09-04 Jie Zhang <jie.zhang@analog.com>
809
810 * bfin-dis.c (decode_pseudodbg_assert_0): Change according
811 to the new encoding of DBGA, DBGAH, and DBGAL.
812 (_print_insn_bfin): Likewise.
813
ad15c38e
JZ		 8142009-09-03 Jie Zhang <jie.zhang@analog.com>
815
816 * bfin-dis.c (_print_insn_bfin): Don't declare.
817 (print_insn_bfin): Don't declare.
818 (dregs_pair): Remove.
819 (ignore_bits): Remove.
820 (ccstat): Remove.
821
c958a8a8
JZ		 8222009-09-03 Jie Zhang <jie.zhang@analog.com>
823
824 * bfin-dis.c (IS_DREG): Define.
825 (IS_PREG): Define.
826 (IS_AREG): Define.
827 (IS_GENREG): Define.
828 (IS_DAGREG): Define.
829 (IS_SYSREG): Define.
830 (decode_REGMV_0): Check illegal register move instructions.
831
3df5879c
DK		 8322009-09-03 Dave Korn <dave.korn.cygwin@gmail.com>
833
834 * Makefile.am (BUILD_LIBINTL): New variable.
835 (i386-gen$(EXEEXT_FOR_BUILD)): Use it.
836 (ia64-gen$(EXEEXT_FOR_BUILD)): And here.
837 (z8kgen$(EXEEXT_FOR_BUILD)): And here.
838 * Makefile.in: Regenerate.
839
05316052
DD		 8402009-09-01 DJ Delorie <dj@redhat.com>
841
842 * mep-asm.c: Regenerate.
843 * mep-desc.c: Regenerate.
844 * mep-opc.c: Regenerate.
845
e06ae0d4
TG		 8462009-09-01 Tristan Gingold <gingold@adacore.com>
847
848 * makefile.vms: Ported to Itanium VMS. Remove useless targets and
849 dependencies. Remove unused FORMAT variable.
850 * configure.com: New file to create build.com DCL script for
851 Itanium VMS or Alpha VMS.
852
d3ce72d0
NC		 8532009-08-29 Martin Thuresson <martin@mtme.org>
854
855 * cris-dis.c (bytes_to_skip): Update code to use new name.
856 * i386-dis.c (putop): Update code to use new name.
857 * i386-gen.c (process_i386_opcodes): Update code to use
858 new name.
859 * i386-opc.h (struct template): Rename struct template to
860 insn_template. Update code accordingly.
861 * i386-tbl.h (i386_optab): Update type to use new name.
862 * ia64-dis.c (print_insn_ia64): Rename variable template
863 to template_val.
864 * tic30-dis.c (struct instruction, get_tic30_instruction):
865 Update code to use new name.
866 * tic54x-dis.c (has_lkaddr, get_insn_size)
867 (print_parallel_instruction, print_insn_tic54x, tic54x_get_insn):
868 Update code to use new name.
869 * tic54x-opc.c (tic54x_unknown_opcode, tic54x_optab):
870 Update type to new name.
871 * z8kgen.c (internal, gas): Rename variable new to new_op.
872
791f3971
L		 8732009-08-28 H.J. Lu <hongjiu.lu@intel.com>
874
875 * Makefile.am (COMPILE_FOR_BUILD): Remove BUILD_CPPFLAGS.
876 Replace BUILD_CFLAGS with CFLAGS_FOR_BUILD.
877 (LINK_FOR_BUILD): Replace BUILD_CFLAGS/BUILD_LDFLAGS with
878 CFLAGS_FOR_BUILD/LDFLAGS_FOR_BUILD.
879 * Makefile.in: Regenerated.
880
573e8a1c
RW		 8812009-08-27 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
882
883 * Makefile.am (bfdlibdir, bfdincludedir): Move definition ...
884 [INSTALL_LIBBFD]: ... here, ...
885 [INSTALL_LIBBFD]: ... and empty overrides here.
886 [!INSTALL_LIBBFD]: (rpath_bfdlibdir): New variable.
887 [!INSTALL_LIBBFD] (libbfd_la_LDFLAGS): Use it.
888 * Makefile.in: Regenerate.
889 * configure: Regenerate.
890
f7922329
NC		 8912009-08-26 Philippe De Muyter <phdm@macqel.be>
892
893 * m68k-dis.c (print_insn_arg): Add movecr register names for
894 coldfire v4e families.
895
ff13a42d
RW		 8962009-08-25 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
897
898 * Makefile.am (SUBDIRS): Build '.' before 'po'.
899 (COMPILE_FOR_BUILD, LINK_FOR_BUILD, BUILD_LIBIBERTY)
900 (MOSTLYCLEANFILES, MAINTAINERCLEANFILES): New variables.
901 (i386-gen$(EXEEXT_FOR_BUILD)): Renamed from i386-gen, rewrite
902 using *BUILD variables, depend upon $(BUILD_LIBIBERTY).
903 (i386-gen.o): New rule.
904 ($(srcdir)/i386-init.h): Adjust.
905 (i386-opc.lo): Depend on $(srcdir)/i386-tbl.h.
906 (ia64-gen$(EXEEXT_FOR_BUILD)): Rename from ia64-gen, adjust likewise.
907 (ia64-gen.o): New rule.
908 (ia64_asmtab_deps): New variable.
909 ($(srcdir)/ia64-asmtab.c): Use it; adjust likewise.
910 (ia64-opc.lo): Depend on $(srcdir)/ia64-asmtab.c.
911 (s390-mkopc$(EXEEXT_FOR_BUILD)): Rename from s390-mkopc, adjust
912 likewise.
913 (s390-opc.tab): Adjust.
914 (z8kgen$(EXEEXT_FOR_BUILD), z8kgen.o, $(srcdir)/z8k-opc.h): New
915 rules.
916 (z8k-dis.lo): Depend on $(srcdir)/z8k-opc.h.
917 * Makefile.in: Regenerate.
918 * z8kgen.c (gas): Avoid '/*' in comment.
919 * z8k-opc.h (func): Regenerate.
920
6f01793d
RW		 9212009-08-24 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
922
923 * Makefile.am (TARGET_LIBOPCODES_CFILES): New variable, taken
924 from $(CFILES), sorted, with dis-buf.c, dis-init.c, disassemble.c,
925 i386-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-f.c, ia64-opc-i.c,
926 ia64-opc-m.c, ia64-opc-d.c, ia64-gen.c, ia64-asmtab.c removed, and
927 msp430-dis.c added.
928 (LIBOPCODES_CFILES): New variable, adding to
929 TARGET_LIBOPCODES_CFILES also non-target library sources.
930 (CFILES): Factorize based on $(LIBOPCODES_CFILES), adding generator
931 files.
932 (ALL_MACHINES): Factorize based on $(TARGET_LIBOPCODES_CFILES).
933 (EXTRA_libopcodes_la_SOURCES): Use $(LIBOPCODES_CFILES).
934 * Makefile.in: Regenerate.
935 * po/POTFILES.in: Regenerate.
936
81ecdfbb
RW		 9372009-08-22 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
938
14ec8efd
RW		 939 * Makefile.am (libopcodes_la_LDFLAGS): Initialize early.
940 [INSTALL_LIBBFD] (bfdlib_LTLIBRARIES): Set only in this condition.
941 [INSTALL_LIBBFD] (bfdinclude_DATA): New.
942 [!INSTALL_LIBBFD] (noinst_LTLIBRARIES): New.
943 [!INSTALL_LIBBFD] (libopcodes_la_LDFLAGS): Ensure libopcodes.la
944 is built shared even if it is not to be installed.
945 (install-bfdlibLTLIBRARIES,uninstall-bfdlibLTLIBRARIES)
946 (install_libopcodes, uninstall_libopcodes): Remove.
947 (AM_CPPFLAGS): Renamed from ...
948 (INCLUDES): ... this.
949 * Makefile.in: Regenerate.
950
758227f0
RW		 951 * Makefile.am (AUTOMAKE_OPTIONS): Remove 1.9 and cygnus, add
952 1.11, foreign, no-dist.
953 (MKDEP, m32c_opc_h): Remove variables.
954 (disassemble.lo): Rewrite using automake-style dependency
955 tracking rules; only list the dependency upon the primary source
956 file, but no included headers.
957 (m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo, m32c-opc.lo)
958 (i386-gen.o, ia64-gen.o): Remove dependency statements.
959 (EXTRA_libopcodes_la_SOURCES): New variable, list $(CFILES) to
960 ensure all dependency fragments are included in the Makefile.
961 (s390-opc.lo): Depend on s390-opc.tab.
962 (DEP, DEP1, dep.sed, dep, dep-in, dep-am): Remove rules.
963 (mkdep section): Remove.
964 * Makefile.in: Regenerate.
965 * po/POTFILES.in: Regenerate.
966
af542c2e
RW		 967 * Makefile.am (install-pdf, install-html): Remove.
968 * Makefile.in: Regenerate.
969
81ecdfbb
RW		 970 * Makefile.in: Regenerate.
971 * aclocal.m4: Likewise.
972 * config.in: Likewise.
973 * configure: Likewise.
974
7ba29e2a
NC		 9752009-08-06 Michael Eager <eager@eagercon.com>
976
977 * Makefile.am: Add microblaze-opc.h to HFILES, microblaze-dis.c to
978 CFILES, microblaze-dis.lo to ALL_MACHINES, targets.
979 * Makefile.in: Regenerate.
980 * configure.in: Add bfd_microblaze_arch target.
981 * configure: Regenerate.
e0c483d6 982 * disassemble.c: Define ARCH_microblaze, return
7ba29e2a
NC		 983 print_insn_microblaze().
984 * microblaze-dis.c: New MicroBlaze disassembler.
985 * microblaze-opc.h: New MicroBlaze opcode definitions.
986 * microblaze-opcm.h: New MicroBlaze opcode types.
987
8a9036a4
L		 9882009-07-25 H.J. Lu <hongjiu.lu@intel.com>
989
990 * configure.in: Handle bfd_l1om_arch.
991 * disassemble.c (disassembler): Likewise.
992
993 * configure: Regenerated.
994
995 * i386-dis.c (print_insn): Handle bfd_mach_l1om and
996 bfd_mach_l1om_intel_syntax. Use 8 bytes per line for Intel L1OM.
997
998 * i386-gen.c (cpu_flag_init): Set CPU_UNKNOWN_FLAGS to ~CpuL1OM.
999 Add CPU_L1OM_FLAGS.
1000 (cpu_flags): Add CpuL1OM.
1001 (set_bitfield): Take an argument to set the value field.
1002 (process_i386_cpu_flag): Support ~CpuXXX and ~(CpuXXX|CpuYYY).
1003 (process_i386_opcode_modifier): Updated.
1004 (process_i386_operand_type): Likewise.
1005 * i386-init.h: Regenerated.
1006 * i386-tbl.h: Likewise.
1007
1008 * i386-opc.h (CpuL1OM): New.
1009 (CpuXsave): Updated.
1010 (i386_cpu_flags): Add cpul1om.
1011
309d3373
JB		 10122009-07-24 Jan Beulich <jbeulich@novell.com>
1013
1014 * i386-dis.c (fgrps): Correct annotation for feni/fdisi. Add
1015 frstpm.
1016 * i386-gen.c (cpu_flag_init): Add FP enabling flags where needed.
1017 (cpu_flags): Add Cpu8087, Cpu287, Cpu387, Cpu687, and CpuFISTTP.
1018 (set_bitfield): Expand CpuFP to Cpu8087|Cpu287|Cpu387.
1019 * i386-opc.h (Cpu8087, Cpu287, Cpu387, Cpu687, CpuFISTTP):
1020 Define.
1021 (union i386_cpu_flags): Add cpu8087, cpu287, cpu387, cpu687,
1022 and cpufisttp.
1023 * i386-opc.tbl: Qualify floating point instructions by their
1024 respective CpuXXX flag. Fix fucom{,p,pp}, fprem1, fsin, fcos,
1025 and fsincos to be avilable only on 387. Fix fstsw ax to be
1026 available only on 287+. Add f{,n}eni, f{,n}disi, f{,n}setpm,
1027 and frstpm.
1028 * i386-init.h, i386-tbl.h: Regenerate.
1029
7769efb2
NC		 10302009-07-20 Nick Clifton <nickc@redhat.com>
1031
1032 PR 10288
1033 * arm-dis.c (arm_opcodes): Catch non-zero bits 8-11 in register
1034 offset or indexed based addressing mode 3.
1035
74bdfecf
NC		 10362009-07-14 Nick Clifton <nickc@redhat.com>
1037
1038 PR 10288
1039 * arm-dis.c (arm_opcodes): Catch illegal Addressing Mode 1
1040 patterns.
1041 (arm_decode_shift): Catch illegal register based shifts.
1042 (print_insn_arm): Properly handle negative register r0
1043 post-indexed addressing.
1044
d1aaab3c
DK		 10452009-07-10 Doug Kwan <dougkwan@google.com>
1046
1047 * arm-disc.c (print_insn_coprocessor, print_insn_arm): Print only
1048 lower 32 bits of long types to make hexadecimal output consistent
1049 on both 32-bit and 64-bit hosts.
1050
87337981
AM		 10512009-07-10 Alan Modra <amodra@bigpond.net.au>
1052
1053 * fr30-desc.c, * fr30-desc.h, * fr30-opc.c, * fr30-opc.h,
1054 * frv-desc.c, * frv-desc.h, * frv-opc.c, * frv-opc.h,
1055 * ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c, * ip2k-opc.h,
1056 * iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c, * iq2000-opc.h,
1057 * lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opc.h,
1058 * lm32-opinst.c, * m32c-desc.c, * m32c-desc.h, * m32c-opc.c,
1059 * m32c-opc.h, * m32r-desc.c, * m32r-desc.h, * m32r-opc.c,
1060 * m32r-opc.h, * m32r-opinst.c, * mt-desc.c, * mt-desc.h,
1061 * mt-opc.c, * mt-opc.h, * openrisc-desc.c, * openrisc-desc.h,
1062 * openrisc-opc.c, * openrisc-opc.h, * xc16x-desc.c, * xc16x-desc.h,
e0c483d6 1063 * xc16x-opc.c, * xc16x-opc.h, * xstormy16-desc.c, * xstormy16-desc.h,
87337981
AM		 1064 * xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
1065
1103f72c
NC		 10662009-07-07 Chung-Lin Tang <cltang@pllab.cs.nthu.edu.tw>
1067
1068 * arm-dis.c (coprocessor_opcodes): Fix mask for waddbhus.
1069
78c66db8
NC		 10702009-07-07 Nick Clifton <nickc@redhat.com>
1071
1072 PR 10288
1073 * arm-dis.c (arm_opcodes): Be more strict about decoding scaled
1074 addressing modes.
1075
22102fb0
DD		 10762009-07-06 DJ Delorie <dj@redhat.com>
1077
1078 * mep-desc.c: Regenerate.
1079 * mep-desc.h: Regenerate.
1080 * mep-opc.c: Regenerate.
1081 * mep-opc.h: Regenerate.
1082
922d8de8
DR		 10832009-07-06 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
1084
1085 * i386-opc.h (CpuFMA4): Add CpuFMA4.
1086 (i386_cpu_flags): New.
1087 * i386-gen.c: Add CPU_FMA4_FLAGS.
1088 * i386-opc.tbl: Add FMA4 instructions.
1089 * i386-tbl.h: Regenerate.
1090 * i386-init.h: Regenerate.
1091 * i386-dis.c (OP_VEX_FMA): New. Handle FMA4.
1092 (OP_XMM_VexW): Ditto.
1093 (OP_EX_VexW): Ditto.
1094 (VEXI4_Fixup): Ditto.
1095 (VexI4, VexFMA, Vex128FMA, EXVexW, EXdVexW, XMVexW): New Macros.
1096 (PREFIX_VEX_3A5C, PREFIX_VEX_3A5D, PREFIX_VEX_3A5E): New.
1097 (PREFIX_VEX_3A5F, PREFIX_VEX_3A60): New.
1098 (PREFIX_VEX_3A68, PREFIX_VEX_3A69, PREFIX_VEX_3A6A): New.
1099 (PREFIX_VEX_3A6B, PREFIX_VEX_3A6C, PREFIX_VEX_3A6D): New.
1100 (PREFIX_VEX_3A6E, PREFIX_VEX_3A6F, PREFIX_VEX_3A7A): New.
1101 (PREFIX_VEX_3A7B, PREFIX_VEX_3A7C, PREFIX_VEX_3A7D): New.
1102 (PREFIX_VEX_3A7E, PREFIX_VEX_3A7F): New.
1103 (VEX_LEN_3A6A_P_2,VEX_LEN_3A6B_P_2, VEX_LEN_3A6E_P_2): New.
1104 (VEX_LEN_3A6F_P_2,VEX_LEN_3A7A_P_2, VEX_LEN_3A7B_P_2): New.
1105 (VEX_LEN_3A7E_P_2,VEX_LEN_3A7F_P_2): New.
1106 (get_vex_imm8): New. handle FMA4.
1107 (OP_EX_VexReg): Ditto.
e0c483d6 1108
fe56b6ce
NC		 11092009-06-30 Nick Clifton <nickc@redhat.com>
1110
1111 PR 10288
1112 * arm-dis.c (coprocessor): Print the LDC and STC versions of the
1113 LFM and SFM instructions as comments,.
1114 Improve consistency of formatting for instructions displayed as
1115 comments and decimal values displayed with their hexadecimal
1116 equivalents.
1117 Formatting tidy ups.
1118
05413229
NC		 11192009-06-29 Nick Clifton <nickc@redhat.com>
1120
1121 PR 10288
1122 * arm-dis.c (enum opcode_sentinels): New: Used to mark the
1123 boundary between variaant and generic coprocessor instuctions.
1124 (coprocessor): Use it.
1125 Fix architecture version of MCRR and MRRC instructions.
1126 (arm_opcdes): Fix patterns for STRB and STRH instructions.
1127 (print_insn_coprocessor): Check architecture and extension masks.
1128 Print a hexadecimal version of any decimal constant that is
1129 outside of the range of -16 to +32.
1130 (print_arm_address): Add a return value of the offset used in the
1131 adress, if it is worth printing a hexadecimal version of it.
1132 (print_insn_neon): Print a hexadecimal version of any decimal
1133 constant that is outside of the range of -16 to +32.
1134 (print_insn_arm): Likewise.
1135 (print_insn_thumb16): Likewise.
1136 (print_insn_thumb32): Likewise.
e0c483d6 1137
05413229
NC		 1138 PR 10297
1139 * arm-dis.c (UNDEFINED_INSTRUCTION): New macro for a description
1140 of an undefined instruction.
1141 (arm_opcodes): Use it.
1142 (thumb_opcod): Use it.
1143 (thumb32_opc): Use it.
1144
378a0c07
DD		 11452009-06-23 DJ Delorie <dj@redhat.com>
1146
dab97f24
DD		 1147 * mep-desc.c: Regenerate.
1148 * mep-desc.h: Regenerate.
1149 * mep-dis.c: Regenerate.
1150 * mep-ibld.c: Regenerate.
1151 * mep-opc.c: Regenerate.
1152
378a0c07
DD		 1153 * mep-asm.c: Regenerate.
1154 * mep-opc.c: Regenerate.
1155 * mep-opc.h: Regenerate.
1156
aece7d2e
NC		 11572009-06-22 Nick Clifton <nickc@redhat.com>
1158
1159 * po/fi.po: Updated Finish translation.
1160
1998a8e0
AM		 11612009-06-22 Alan Modra <amodra@bigpond.net.au>
1162
1163 * m32c-asm.c: Regenerate.
1164
b33bafa0
AM		 11652009-06-22 Alan Modra <amodra@bigpond.net.au>
1166
1167 * score-dis.c (print_insn_score48, print_insn_score32): Move default
1168 case label to proper lexical block.
1169 * score7-dis.c (print_insn_score32): Likewise.
1170
ce21feb4
MS		 11712009-06-19 Martin Schwidefsky <sschwidefsky@de.ibm.com>
1172
1173 * s390-opc.c (INSTR_RR_0R_OPT, INSTR_RX_0RRD_OPT, MASK_RR_0R_OPT,
1174 MASK_RX_0RRD_OPT): New instruction formats with optional arguments.
1175 * s390-opc.txt (nopr, nop): Use new instruction format.
1176
0313a2b8
NC		 11772009-06-18 Nick Clifton <nickc@redhat.com>
1178
1179 PR 10288
1180 * arm-dis.c (print_insn_coprocessor): Check that a user specified
1181 ARM architecture supports the matched instruction.
1182 (print_insn_arm): Likewise.
1183 (select_arm_features): New function. Fills in the fields of an
1184 arm_feature_set structure based on a given arm machine number.
1185 (print_insn): Initialise an arm_feature_set structure.
1186
6db7e006
MR		 11872009-06-16 Maciej W. Rozycki <macro@linux-mips.org>
1188
1189 * vax-dis.c (is_function_entry): Return success for synthetic
1190 symbols too.
1191 (is_plt_tail): New function.
1192 (print_insn_vax): Decode PLT entry offset longword.
1193
522fe561
NC		 11942009-06-15 Nick Clifton <nickc@redhat.com>
1195
fe2ceba1
NC		 1196 PR 10186
1197 * arm-dis.c (thumb32_opcodes): Fix binary value of SEV.W
1198 instruction.
1199
522fe561
NC		 1200 PR 10173
1201 * cr16-dis.c (print_arg): Avoid printing the 0x prefix twice.
1202
1316c8b3
NC		 12032009-06-15 Nick Clifton <nickc@redhat.com>
1204
1205 PR 10263
1206 * arm-dis.c (print_insn): Ignore is_data if the user has requested
1207 the disassembly of data as well as instructions.
1208
f6475b48
DE		 12092009-06-11 Doug Evans <dje@sebabeach.org>
1210
1211 * cgen.sh: Handle multiple simultaneous runs for parallel makes.
1212
f865a31d
AG		 12132009-06-11 Anthony Green <green@moxielogic.com>
1214
1215 * moxie-opc.c (moxie_form1_opc_info): Remove branch instructions.
1216 (moxie_form3_opc_info): Add branch instructions.
1217 * moxie-dis.c (print_insn_moxie): Disassemble MOXIE_F3_PCREL
1218 encoded instructions.
1219
0e7c7f11
AG		 12202009-06-06 Anthony Green <green@moxielogic.com>
1221
1222 * moxie-opc.c: Recode some MOXIE_F1_4 opcodes as MOXIE_F1_M.
1223 * moxie-dis.c (print_insn_moxie): Handle MOXIE_F1_M case.
1224
67a648f1
AM		 12252009-06-04 Alan Modra <amodra@bigpond.net.au>
1226
1227 * dep-in.sed: Don't use \n in replacement part of s command.
1228 * Makefile.am (DEP1): LC_ALL for uniq.
1229 * Makefile.in: Regenerate.
1230
06c582ac
NC		 12312009-06-02 Nick Clifton <nickc@redhat.com>
1232
1233 * po/nl.po: Updated Dutch translation.
1234
3164099e
TG		 12352009-06-02 Tristan Gingold <gingold@adacore.com>
1236
1237 * ia64-gen.c (parse_resource_users, print_dependency_table,
1238 add_dis_table_ent, finish_distable, insert_bit_table_ent,
1239 add_dis_entry, compact_distree, gen_dis_table, completer_entries_eq,
1240 get_prefix_len, compute_completer_bits, insert_opcode_dependencies,
1241 insert_completer_entry, print_completer_entry, print_completer_table,
1242 opcodes_eq, add_opcode_entry, shrink): Use ISO C syntax for functions.
1243
d285268e
DD		 12442009-05-28 DJ Delorie <dj@redhat.com>
1245
1246 * mep-asm.c: Regenerate.
1247 * mep-desc.c: Regenerate.
1248
2f3565a3
DD		 12492009-05-26 DJ Delorie <dj@redhat.com>
1250
1251 * mep-asm.c: Regenerate.
1252 * mep-desc.c: Regenerate.
1253 * mep-desc.h: Regenerate.
1254 * mep-dis.c: Regenerate.
1255 * mep-ibld.c: Regenerate.
1256 * mep-opc.c: Regenerate.
1257 * mep-opc.h: Regenerate.
1258
f12e7348
NC		 12592009-05-26 Nick Clifton <nickc@redhat.com>
1260
1261 * po/id.po: Updated Indonesian translation.
1262 * po/opcodes.pot: Updated template file.
1263
9e097a72
AM		 12642009-05-26 Alan Modra <amodra@bigpond.net.au>
1265
1266 * dep-in.sed: Don't modify .o to .lo here. Output one filename
1267 per line with all lines having continuation backslash. Prefix
1268 first line with "A", following lines with "B".
1269 * Makefile.am (DEP): Don't use dep.sed here.
1270 (DEP1): Run $MKDEP on single files, modify .o to .lo here. Use
1271 dep.sed here on dependencies, sort and uniq.
1272 * Makefile.in: Regenerate.
1273
4f8318f8
TG		 12742009-05-25 Tristan Gingold <gingold@adacore.com>
1275
1276 * makefile.vms (OPT): New variable.
1277 (CFLAGS): Update compilation flags.
1278
1d74713b
DD		 12792009-05-22 DJ Delorie <dj@redhat.com>
1280
1281 * mep-asm.c: Regenerate.
1282 * mep-desc.c: Regenerate.
1283 * mep-desc.h: Regenerate.
1284 * mep-dis.c: Regenerate.
1285 * mep-ibld.c: Regenerate.
1286 * mep-opc.c: Regenerate.
1287 * mep-opc.h: Regenerate.
1288
c1e679ec
DR		 12892009-05-22 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
1290
1291 * i386-opc.h (Cpusse5): Delete.
1292 (i386_cpu_flags): Delete.
1293 * i386-gen.c: Remove CpuSSE5, Drex, Drexv and Drexc.
1294 * i386-opc.tbl: Remove SSE5 instructions.
1295 * i386-tbl.h: Regenerate.
1296 * i386-init.h: Regenerate.
1297 * i386-dis.c (OP_E_memeory, OP_E_extended): Remove drex handling.
1298 (print_drex_arg): Delete.
1299 (OP_DREX4): Delete.
1300 (OP_DREX3): Delete.
1301 (OP_DREX_ICMP): Delete.
1302 (OP_DREX_FCMP): Delete.
1303 (DREX_*): Delete.
1304 (THREE_BYTE_0F24, THREE_BYTE_0F25, THREE_BYTE_0f7B): Delete.
e0c483d6 1305
2b3decb5
AM		 13062009-05-22 Alan Modra <amodra@bigpond.net.au>
1307
1308 * Makefile.am: Run "make dep-am".
1309 * Makefile.in: Regenerate.
1310 * po/POTFILES.in: Regenerate.
1311
eb956800
DD		 13122009-05-19 DJ Delorie <dj@redhat.com>
1313
1314 * mep-asm.c: Regenerate.
1315 * mep-opc.c: Regenerate.
1316
3526b680
DD		 13172009-04-30 DJ Delorie <dj@redhat.com>
1318
1319 * mep-asm.c: Regenerate.
1320 * mep-desc.c: Regenerate.
1321 * mep-desc.h: Regenerate.
1322 * mep-dis.c: Regenerate.
1323 * mep-ibld.c: Regenerate.
1324 * mep-opc.c: Regenerate.
1325 * mep-opc.h: Regenerate.
1326
45be3704
DD		 13272009-04-17 DJ Delorie <dj@redhat.com
1328
1329 * mep-desc.c: Regenerate.
1330 * mep-ibld.c: Regenerate.
1331 * mep-opc.c: Regenerate.
1332 * mep-opc.h: Regenerate.
1333
20135e4c
NC		 13342009-04-15 Anthony Green <green@moxielogic.com>
1335
1336 * moxie-opc.c, moxie-dis.c: Created.
1337 * Makefile.am: Build the moxie source files.
1338 * configure.in: Add moxie support.
1339 * Makefile.in, configure: Rebuilt.
1340 * disassemble.c (disassembler): Add moxie support.
1341 (ARCH_moxie): Define.
1342
ac5c19e6
JB		 13432009-04-15 Jan Beulich <jbeulich@novell.com>
1344
1345 * i386-opc.tbl (protb, protw, protd, protq): Set opcode
1346 extension to None.
1347 (pshab, pshaw, pshad, pshaq): Likewise.
1348 * i386-tbl.h: Re-generate.
1349
52de720d
DD		 13502009-04-08 DJ Delorie <dj@redhat.com
1351
1352 * mep-asm.c: Regenerate.
1353 * mep-desc.c: Regenerate.
1354 * mep-desc.h: Regenerate.
1355 * mep-dis.c: Regenerate.
1356 * mep-ibld.c: Regenerate.
1357 * mep-opc.c: Regenerate.
1358 * mep-opc.h: Regenerate.
1359
858d7a6d
PB		 13602009-04-07 Peter Bergner <bergner@vnet.ibm.com>
1361
1362 * ppc-opc.c (powerpc_opcodes) <"tlbilxlpid", "tlbilxpid", "tlbilxva",
1363 "tlbilx">: Use secondary opcode "18" as per the ISA 2.06 documentation.
1364 Reorder entries so the extended mnemonics are listed before tlbilx.
1365
70dc4e32
PB		 13662009-04-02 Peter Bergner <bergner@vnet.ibm.com>
1367
1368 * ppc-dis.c (powerpc_init_dialect): Do not choose a default dialect
1369 due to -many/-Many.
1370 (print_insn_powerpc): Make sure we only deprecate instructions using
1371 the original dialect and not a modified dialect due to -Many handling.
1372 Move the handling of the condition register and default operands to
1373 the end of the if/else if/else chain.
1374 * ppc-opc.c (powerpc_opcodes): Reorder the opcode table so that
1375 instructions from newer processors are listed before older ones.
1376 <"icblce", "sync", "eieio", "tlbld">: Deprecate for processors
1377 that have instructions with conflicting opcodes.
1378
e401b04c
PB		 13792009-04-01 Peter Bergner <bergner@vnet.ibm.com>
1380
1381 * ppc-opc.c (powerpc_opcodes) <"dcbzl">: Merge the POWER4 and
1382 E500MC entries.
1383
b8f9ee44
CL		 13842009-04-01 Christophe Lyon <christophe.lyon@st.com>
1385
1386 * arm-dis.c (print_insn): Print BE8 opcodes in little endianness.
1387
d460e92e
JM		 13882009-03-30 Joseph Myers <joseph@codesourcery.com>
1389
1390 * arm-dis.c (print_insn): Also check section matches in backwards
1391 search for mapping symbol.
1392
d34b5006
L		 13932009-03-26 H.J. Lu <hongjiu.lu@intel.com>
1394
1395 * i386-dis.c (get_valid_dis386): Abort on unhandled table.
1396
8d25cc3d
AM		 13972009-03-18 Alan Modra <amodra@bigpond.net.au>
1398
3889c459 1399 * cgen-opc.c: Include alloca-conf.h rather than alloca.h.
8d25cc3d
AM		 1400 * Makefile.am: Run "make dep-am".
1401 * Makefile.in: Regenerate.
1402 * openrisc-opc.c: Regenerate.
1403
34dd024a
NC		 14042009-03-10 Nick Clifton <nickc@redhat.com>
1405
1406 * po/id.po: Updated Indonesian translation.
1407
69fe9ce5
AM		 14082009-03-10 Alan Modra <amodra@bigpond.net.au>
1409
1410 * ppc-dis.c: Include "opintl.h".
1411 (struct ppc_mopt, ppc_opts): New.
1412 (ppc_parse_cpu): New function.
1413 (powerpc_init_dialect): Use it.
1414 (print_ppc_disassembler_options): Dump options from ppc_opts.
1415 Internationalize message.
1416
d11fd249
NC		 14172009-03-06 Nick Clifton <nickc@redhat.com>
1418
1419 * po/es.po: Updated Spanish translation.
1420
51dec227
AM		 14212009-03-04 Alan Modra <amodra@bigpond.net.au>
1422
1423 PR 6768
1424 * configure.in: Test for ld --as-needed support. Link shared
1425 libopcodes against libm.
1426 * configure: Regenerate.
1427
c72ab5f2
PB		 14282009-03-03 Peter Bergner <bergner@vnet.ibm.com>
1429
1430 * ppc-opc.c (powerpc_opcodes): Reorder the opcode table so that
1431 instructions from newer processors are listed before older ones.
1432
a1f7ca36
AM		 14332009-03-03 Alan Modra <amodra@bigpond.net.au>
1434
1435 * Makefile.am: Run "make dep-am".
1436 (HFILES): Move lm32-desc.h and lm32-opc.h from..
1437 (CFILES): ..here.
1438 * Makefile.in: Regenerate.
1439
c3b7224a
NC		 14402009-03-02 Qinwei <qinwei@sunnorth.com.cn>
1441
1442 * score7-dis.c: New file.
1443 * Makefile.am: Add dependencies for score7-dis.c.
1444 * Makefile.in: Regenerate.
1445 * configure.in: Add score7-dis to score files.
1446 * configure: Regenerate.
1447 * score-dis.c: Add support for score7 architecture.
1448 * score-opc.h: Likewise.
1449
58e24671
RW		 14502009-03-01 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
1451
1452 * configure: Regenerate.
1453
d6f574e0
L		 14542009-02-27 H.J. Lu <hongjiu.lu@intel.com>
1455
1456 * i386-dis.c (OP_EX): Call OP_E_memory instead of OP_E.
1457
066be9f7
PB		 14582009-02-26 Peter Bergner <bergner@vnet.ibm.com>
1459
1460 * ppc-dis.c (powerpc_init_dialect): Extend -Mpower7 to disassemble
1461 the power7 and the isel instructions.
1462 * ppc-opc.c (insert_xc6, extract_xc6): New static functions.
1463 (insert_dm, extract_dm): Likewise.
1464 (XB6): Update comment to include XX2 form.
1465 (WC, XC6, SHW, DMEX, UIM, XX2, XX3RC, XX4, XX2_MASK, XX2UIM_MASK,
1466 XX2BF_MASK, XX3BF_MASK, XX3SHW_MASK, XX4_MASK, XWC_MASK, POWER7): New.
1467 (RemoveXX3DM): Delete.
1468 (powerpc_opcodes): <"lfdp", "lfdpx", "mcrxr", "mftb", "mffgpr",
1469 "mftgpr">: Deprecate for POWER7.
1470 <"fres", "fres.", "frsqrtes", "frsqrtes.", "fre", "fre.", "frsqrte",
1471 "frsqrte.">: Deprecate the three operand form and enable the two
1472 operand form for POWER7 and later.
1473 <"wait">: Extend to accept optional parameter. Enable for POWER7.
1474 <"waitsrv", "waitimpl">: Add extended opcodes.
1475 <"ldbrx", "stdbrx">: Enable for POWER7.
1476 <"cdtbcd", "cbcdtd", "addg6s">: Add POWER6 opcodes.
1477 <"bpermd", "dcbtstt", "dcbtt", "dcffix.", "dcffix", "divde.", "divde",
1478 "divdeo.", "divdeo", "divdeu.", "divdeu", "divdeuo.", "divdeuo",
1479 "divwe.", "divwe", "divweo.", "divweo", "divweu.", "divweu", "divweuo.",
1480 "divweuo", "fcfids.", "fcfids", "fcfidu.", "fcfidu", "fcfidus.",
1481 "fcfidus", "fctidu.", "fctidu", "fctiduz.", "fctiduz", "fctiwu.",
1482 "fctiwu", "fctiwuz.", "fctiwuz", "ftdiv", "ftsqrt", "lbarx", "lfiwzx",
1483 "lharx", "popcntd", "popcntw", "stbcx.", "sthcx.">: Add POWER7 opcodes.
1484 <"lxsdux", "lxsdx", "lxvdsx", "lxvw4ux", "lxvw4x", "stxsdux", "stxsdx",
1485 "stxvw4ux", "stxvw4x", "xsabsdp", "xsadddp", "xscmpodp", "xscmpudp",
1486 "xscpsgndp", "xscvdpsp", "xscvdpsxds", "xscvdpsxws", "xscvdpuxds",
1487 "xscvdpuxws", "xscvspdp", "xscvsxddp", "xscvuxddp", "xsdivdp",
1488 "xsmaddadp", "xsmaddmdp", "xsmaxdp", "xsmindp", "xsmsubadp",
1489 "xsmsubmdp", "xsmuldp", "xsnabsdp", "xsnegdp", "xsnmaddadp",
1490 "xsnmaddmdp", "xsnmsubadp", "xsnmsubmdp", "xsrdpi", "xsrdpic",
1491 "xsrdpim", "xsrdpip", "xsrdpiz", "xsredp", "xsrsqrtedp", "xssqrtdp",
1492 "xssubdp", "xstdivdp", "xstsqrtdp", "xvabsdp", "xvabssp", "xvadddp",
1493 "xvaddsp", "xvcmpeqdp.", "xvcmpeqdp", "xvcmpeqsp.", "xvcmpeqsp",
1494 "xvcmpgedp.", "xvcmpgedp", "xvcmpgesp.", "xvcmpgesp", "xvcmpgtdp.",
1495 "xvcmpgtdp", "xvcmpgtsp.", "xvcmpgtsp", "xvcpsgnsp", "xvcvdpsp",
1496 "xvcvdpsxds", "xvcvdpsxws", "xvcvdpuxds", "xvcvdpuxws", "xvcvspdp",
1497 "xvcvspsxds", "xvcvspsxws", "xvcvspuxds", "xvcvspuxws", "xvcvsxddp",
1498 "xvcvsxdsp", "xvcvsxwdp", "xvcvsxwsp", "xvcvuxddp", "xvcvuxdsp",
1499 "xvcvuxwdp", "xvcvuxwsp", "xvdivdp", "xvdivsp", "xvmaddadp",
1500 "xvmaddasp", "xvmaddmdp", "xvmaddmsp", "xvmaxdp", "xvmaxsp",
1501 "xvmindp", "xvminsp", "xvmovsp", "xvmsubadp", "xvmsubasp", "xvmsubmdp",
1502 "xvmsubmsp", "xvmuldp", "xvmulsp", "xvnabsdp", "xvnabssp", "xvnegdp",
1503 "xvnegsp", "xvnmaddadp", "xvnmaddasp", "xvnmaddmdp", "xvnmaddmsp",
1504 "xvnmsubadp", "xvnmsubasp", "xvnmsubmdp", "xvnmsubmsp", "xvrdpi",
1505 "xvrdpic", "xvrdpim", "xvrdpip", "xvrdpiz", "xvredp", "xvresp",
1506 "xvrspi", "xvrspic", "xvrspim", "xvrspip", "xvrspiz", "xvrsqrtedp",
1507 "xvrsqrtesp", "xvsqrtdp", "xvsqrtsp", "xvsubdp", "xvsubsp", "xvtdivdp",
1508 "xvtdivsp", "xvtsqrtdp", "xvtsqrtsp", "xxland", "xxlandc", "xxlnor",
1509 "xxlor", "xxlxor", "xxmrghw", "xxmrglw", "xxsel", "xxsldwi", "xxspltd",
1510 "xxspltw", "xxswapd">: Add VSX opcodes.
1511
4c664d7b
L		 15122009-02-23 H.J. Lu <hongjiu.lu@intel.com>
1513
1514 * i386-gen.c (operand_type_init): Remove OPERAND_TYPE_VEX_IMM4.
1515 (operand_types): Remove Vex_Imm4.
1516
1517 * i386-opc.h (Vex_Imm4): Removed.
1518 (OTMax): Updated.
1519 (i386_operand_type): Remove vex_imm4.
1520
1521 * i386-opc.tbl: Remove Vex_Imm4 comments.
1522 * i386-init.h: Regenerated.
1523 * i386-tbl.h: Likewise.
1524
4ce8808b
RE		 15252009-02-23 Richard Earnshaw <rearnsha@arm.com>
1526
1527 * arm-dis.c (neon_opcodes): Correct bit-mask and patterns for
1528 vq{r}shr{u}n.s64 insnstructions.
1529
0e55be16
PB		 15302009-02-19 Peter Bergner <bergner@vnet.ibm.com>
1531
1532 * ppc-opc.c (powerpc_opcodes) <"lfdepx", "stfdepx">: Fix the first
1533 operand to be a float point register (FRT/FRS).
1534
b1c9882d
AN		 15352009-02-18 Adam Nemet <anemet@caviumnetworks.com>
1536
1537 * mips-opc.c (mips_builtin_opcodes): Move the Octeon-specific
1538 dmfc2 and dmtc2 before the architecture-level variants.
1539
137f2437
NC		 15402009-02-18 Pierre Muller <muller@ics.u-strasbg.fr>
1541
1542 * fr30-opc.c: Regenerate.
1543 * frv-opc.c: Regenerate.
1544 * ip2k-opc.c: Regenerate.
1545 * iq2000-opc.c: Regenerate.
1546 * lm32-opc.c: Regenerate.
1547 * m32c-opc.c: Regenerate.
1548 * m32r-opc.c: Regenerate.
1549 * mep-opc.c: Regenerate.
1550 * mt-opc.c: Regenerate.
1551 * xc16x-opc.c: Regenerate.
1552 * xstormy16-opc.c: Regenerate.
1553 * tic54x-dis.c (print_instruction): Avoid compiler warning on
1554 sprintf call.
1555
87298967
NS		 15562009-02-12 Nathan Sidwell <nathan@codesourcery.com>
1557
1558 * m68k-opc.c (m68k_opcodes): Add stldsr instruction.
1559
80890a61
PB		 15602009-02-05 Peter Bergner <bergner@vnet.ibm.com>
1561
1562 * ppc-opc.c: Update copyright year.
1563 (powerpc_opcodes) <"dcbt", "dcbtst">: Deprecate the Embedded operand
1564 ordering for POWER4 and later and use the correct Server ordering.
1565
ce2f5b3c
L		 15662009-02-04 H.J. Lu <hongjiu.lu@intel.com>
1567
1568 AVX Programming Reference (January, 2009)
1569 * i386-dis.c (PREFIX_VEX_3A44): New.
1570 (VEX_LEN_3A44_P_2): Likewise.
1571 (PREFIX_VEX_3A48): Updated.
1572 (VEX_LEN_3A4C_P_2): Likewise.
1573 (prefix_table): Add PREFIX_VEX_3A44.
1574 (vex_table): Likewise.
1575 (vex_len_table): Add VEX_LEN_3A44_P_2.
1576
1577 * i386-opc.tbl: Add PCLMUL + AVX instructions.
1578 * i386-tbl.h: Regenerated.
1579
52b6b6b9
JM		 15802009-02-03 Sandip Matte <sandip@rmicorp.com>
1581
1582 * mips-dis.c (mips_cp0_names_xlr, mips_cp0sel_names_xlr): Define.
1583 (mips_arch_choices): Add XLR entry.
1584 * mips-opc.c (XLR): Define.
1585 (mips_builtin_opcodes): Add XLR instructions.
1586
31dd3154
JM		 15872009-02-03 Carlos O'Donell <carlos@codesourcery.com>
1588
1589 * Makefile.am: Add install-pdf target.
1590 * po/Make-in: Add install-pdf target.
1591 * Makefile.in: Regenerate.
1592
c1a0a41f
DD		 15932009-02-02 DJ Delorie <dj@redhat.com>
1594
1595 * mep-asm.c: Regenerate.
1596 * mep-desc.c: Regenerate.
1597 * mep-desc.h: Regenerate.
1598 * mep-dis.c: Regenerate.
1599 * mep-ibld.c: Regenerate.
1600 * mep-opc.c: Regenerate.
1601 * mep-opc.h: Regenerate.
1602
087b80de
JM		 16032009-01-29 Mark Mitchell <mark@codesourcery.com>
1604
1605 * arm-dis.c (thumb32_opcodes): Correct decoding for qadd, qdadd,
1606 qsub, and qdsub.
1607
159073e6
NC		 16082009-01-28 Chao-ying Fu <fu@mips.com>
1609
e0c483d6 1610 * mips-opc.c (suxc1): Add the flag of FP_D.
159073e6 1611
6f3b91a6
AM		 16122009-01-20 Alan Modra <amodra@bigpond.net.au>
1613
1614 * fr30-asm.c, fr30-dis.c, fr30-ibld.c, frv-asm.c, frv-dis.c,
1615 * frv-ibld.c, ip2k-asm.c, ip2k-dis.c, ip2k-ibld.c,
1616 * iq2000-asm.c, iq2000-dis.c, iq2000-ibld.c, m32c-asm.c,
1617 * m32c-dis.c, m32c-ibld.c, m32r-asm.c, m32r-dis.c,
1618 * m32r-ibld.c, mep-asm.c, mep-dis.c, mep-ibld.c, mt-asm.c,
1619 * mt-dis.c, mt-ibld.c, openrisc-asm.c, openrisc-dis.c,
1620 * openrisc-ibld.c, xc16x-asm.c, xc16x-dis.c, xc16x-ibld.c,
1621 * xstormy16-asm.c, xstormy16-dis.c, xstormy16-ibld.c: Regenerate.
1622
29670fb9
AM		 16232009-01-16 Alan Modra <amodra@bigpond.net.au>
1624
1625 * configure.in (commonbfdlib): Delete.
1626 (SHARED_LIBADD): Add pic libiberty if such is available.
1627 * configure: Regenerate.
1628 * po/POTFILES.in: Regenerate.
1629
21169fcf
PB		 16302009-01-14 Peter Bergner <bergner@vnet.ibm.com>
1631
1632 * ppc-dis.c (print_insn_powerpc): Skip insn if it is deprecated.
1633 * ppc-opc.c (powerpc_opcodes) <mtfsf, mtfsf.>: Deprecate the two
1634 operand form and enable the four operand form for POWER6 and later.
1635 <mtfsfi, mtfsfi.>: Deprecate the two operand form and enable the
1636 three operand form for POWER6 and later.
1637
4ca47a51
MF		 16382009-01-14 Mike Frysinger <vapier@gentoo.org>
1639
1640 * bfin-dis.c (OUTS): Use "%s" as format string.
1641
8acd5377
L		 16422009-01-13 H.J. Lu <hongjiu.lu@intel.com>
1643
1644 * i386-gen.c (cpu_flag_init): Remove a white space.
1645 (operand_type_init): Likewise.
1646
c1ec1875
L		 16472009-01-12 H.J. Lu <hongjiu.lu@intel.com>
1648
1649 * i386-opc.tbl: Add NoAVX to movnti, lfence and mfence.
1650 * i386-tbl.h: Regenerated.
1651
c7532693
L		 16522009-01-12 H.J. Lu <hongjiu.lu@intel.com>
1653
1654 * i386-dis.c (dis386): Use EbS on addB, orB, adcB, sbbB, andB,
1655 subB, xorB and cmpB. Use EvS on addS, orS, adcS, sbbS, andS,
1656 subS, xorS and cmpS.
1657
bd5295b2
L		 16582009-01-10 H.J. Lu <hongjiu.lu@intel.com>
1659
1660 * i386-gen.c (cpu_flag_init): Replace CpuP4 and CpuK6 with
1661 CpuClflush and CpuSYSCALL, respectively. Remove CpuK8. Add
1662 CPU_COREI7_FLAGS, CPU_CLFLUSH_FLAGS and CPU_SYSCALL_FLAGS.
1663 (cpu_flags): Remove CpuP4, CpuK6 and CpuK8. Add CpuClflush
1664 and CpuSYSCALL.
1665 (lineno): Removed.
1666 (set_bitfield): Take an argument, lineno. Don't report lineno
1667 on error if it is -1.
1668 (process_i386_cpu_flag): Take an argument, lineno.
1669 (process_i386_opcode_modifier): Likewise.
1670 (process_i386_operand_type): Likewise.
1671 (output_i386_opcode): Likewise.
1672 (opcode_hash_entry): Add lineno.
1673 (process_i386_opcodes): Updated.
1674 (process_i386_registers): Likewise.
1675 (process_i386_initializers): Likewise.
1676
1677 * i386-opc.h (CpuP4): Removed.
1678 (CpuK6): Likewise.
1679 (CpuK8): Likewise.
1680 (CpuClflush): New.
1681 (CpuSYSCALL): Likewise.
1682 (CpuMMX): Updated.
1683 (i386_cpu_flags): Remove cpup4, cpuk6 and cpuk8. Add
1684 cpuclflush and cpusyscall.
1685
1686 * i386-opc.tbl: Update movnti, clflush, lfence, mfence, pause,
1687 syscall and sysret.
1688 * i386-init.h: Regenerated.
1689 * i386-tbl.h: Likewise.
1690
1b7f3fb0
L		 16912009-01-09 H.J. Lu <hongjiu.lu@intel.com>
1692
1693 * i386-gen.c (cpu_flag_init): Add CpuRdtscp to CPU_K8_FLAGS
1694 and CPU_AMDFAM10_FLAGS. Add CPU_RDTSCP_FLAGS.
1695 (cpu_flags): Add CpuRdtscp.
1696 (set_bitfield): Remove CpuSledgehammer check.
1697
1698 * i386-opc.h (CpuRdtscp): New.
1699 (CpuLM): Updated.
1700 (i386_cpu_flags): Add cpurdtscp.
1701
1702 * i386-opc.tbl: Replace CpuSledgehammer with CpuRdtscp.
1703 * i386-init.h: Regenerated.
1704 * i386-tbl.h: Likewise.
1705
1cb0a767
PB		 17062009-01-09 Peter Bergner <bergner@vnet.ibm.com>
1707
1708 * ppc-opc.c (PPCNONE): Define.
1709 (NOPOWER4): Delete.
1710 (powerpc_opcodes): Initialize the new "deprecated" field.
1711
168e3097
L		 17122009-01-06 H.J. Lu <hongjiu.lu@intel.com>
1713
1714 AVX Programming Reference (December, 2008)
1715 * i386-dis.c (VEX_LEN_2B_M_0): Removed.
1716 (VEX_LEN_E7_P_2_M_0): Likewise.
1717 (VEX_LEN_2C_P_1): Updated.
1718 (VEX_LEN_E8_P_2): Likewise.
1719 (vex_len_table): Remove VEX_LEN_2B_M_0 and VEX_LEN_E7_P_2_M_0.
1720 (mod_table): Likewise.
1721
1722 * i386-opc.tbl: Add 256bit vmovntdq, vmovntpd and vmovntps.
1723 * i386-tbl.h: Regenerated.
1724
22da050b
L		 17252009-01-05 H.J. Lu <hongjiu.lu@intel.com>
1726
1727 * i386-gen.c (process_copyright): Update for 2009.
1728
1729 * i386-init.h: Regenerated.
1730 * i386-tbl.h: Likewise.
1731
0bfee649 17322009-01-05 H.J. Lu <hongjiu.lu@intel.com>
6194aaab 1733
0bfee649
L		 1734 AVX Programming Reference (December, 2008)
1735 * i386-dis.c (OP_VEX_FMA): Removed.
c0f3af97 1736 (OP_EX_VexW): Likewise.
0bfee649 1737 (OP_EX_VexImmW): Likewise.
c0f3af97 1738 (OP_XMM_VexW): Likewise.
c0f3af97 1739 (VEXI4_Fixup): Likewise.
c0f3af97 1740 (VPERMIL2_Fixup): Likewise.
c0f3af97 1741 (VexI4): Likewise.
0bfee649
L		 1742 (VexFMA): Likewise.
1743 (Vex128FMA): Likewise.
c0f3af97
L		 1744 (EXVexW): Likewise.
1745 (EXdVexW): Likewise.
1746 (EXqVexW): Likewise.
0bfee649 1747 (EXVexImmW): Likewise.
c0f3af97 1748 (XMVexW): Likewise.
c0f3af97 1749 (VPERMIL2): Likewise.
0bfee649
L		 1750 (PREFIX_VEX_3A48...PREFIX_VEX_3A4A): Likewise.
1751 (PREFIX_VEX_3A5C...PREFIX_VEX_3A5F): Likewise.
1752 (PREFIX_VEX_3A68...PREFIX_VEX_3A6F): Likewise.
1753 (PREFIX_VEX_3A78...PREFIX_VEX_3A7F): Likewise.
1754 (VEX_LEN_3A6A_P_2...VEX_LEN_3A6F_P_2): Likewise.
1755 (VEX_LEN_3A7A_P_2...VEX_LEN_3A7F_P_2): Likewise.
1756 (get_vex_imm8): Likewise.
1757 (OP_EX_VexReg): Likewise.
1758 vpermil2_op): Likewise.
1759 (EXVexWdq): New.
1760 (vex_w_dq_mode): Likewise.
1761 (PREFIX_VEX_3896...PREFIX_VEX_389F): Likewise.
1762 (PREFIX_VEX_38A6...PREFIX_VEX_38AF): Likewise.
1763 (PREFIX_VEX_38B6...PREFIX_VEX_38BF): Likewise.
1764 (es_reg): Updated.
1765 (PREFIX_VEX_38DB): Likewise.
1766 (PREFIX_VEX_3A4A): Likewise.
1767 (PREFIX_VEX_3A60): Likewise.
1768 (PREFIX_VEX_3ADF): Likewise.
1769 (VEX_LEN_3ADF_P_2): Likewise.
1770 (prefix_table): Remove PREFIX_VEX_3A48...PREFIX_VEX_3A4A,
e0c483d6 1771 PREFIX_VEX_3A5C...PREFIX_VEX_3A5F,
0bfee649
L		 1772 PREFIX_VEX_3A68...PREFIX_VEX_3A6F and
1773 PREFIX_VEX_3A78...PREFIX_VEX_3A7F. Add
1774 PREFIX_VEX_3896...PREFIX_VEX_389F,
1775 PREFIX_VEX_38A6...PREFIX_VEX_38AF and
1776 PREFIX_VEX_38B6...PREFIX_VEX_38BF.
c0f3af97 1777 (vex_table): Likewise.
0bfee649
L		 1778 (vex_len_table): Remove VEX_LEN_3A6A_P_2...VEX_LEN_3A6F_P_2
1779 and VEX_LEN_3A7A_P_2...VEX_LEN_3A7F_P_2.
1780 (putop): Support "%XW".
1781 (intel_operand_size): Handle vex_w_dq_mode.
58c85be7 1782
0bfee649 1783 * i386-opc.h (VexNDS): Add a comment for VEX NDS and VEX DDS.
58c85be7 1784
0bfee649
L		 1785 * i386-opc.tbl: Remove vpermil2pd/vpermil2ps and old FMA
1786 instructions. Add new FMA instructions.
28dbc079
L		 1787 * i386-tbl.h: Regenerated.
1788
e0c483d6 17892009-01-02 Matthias Klose <doko@ubuntu.com>
3fe15143 1790
e0c483d6
AM		 1791 * or32-opc.c (or32_print_register, or32_print_immediate,
1792 disassemble_insn): Don't rely on undefined sprintf behaviour.
3fe15143 1793
0bfee649 1794For older changes see ChangeLog-2008
252b5132
RH		 1795\f
1796Local Variables:
2f6d2f85
NC		 1797mode: change-log
1798left-margin: 8
1799fill-column: 74
252b5132
RH		 1800version-control: never
1801End:
GDB Binutils - Deliverables
This page took 0.606525 seconds and 4 git commands to generate.