[deliverable/binutils-gdb.git] / opcodes / ChangeLog

2012-04-27  David S. Miller  <davem@davemloft.net>

	* sparc-dis.c (v9a_asr_reg_names): Add 'cfr'.
	* sparc-opc.c (sparc_opcodes): Add rd/wr cases for %cfr.

	* sparc-opc.c (sparc_opcodes): Add 'wr X, %pause' and 'pause'.
	* sparc-dis.c (v9a_asr_reg_names): Add 'pause'.

	* sparc-opc.c (CBCOND): New define.
	(CBCOND_XCC): Likewise.
	(cbcond): New helper macro.
	(sparc_opcodes): Add compare-and-branch instructions.

	* sparc-dis.c (print_insn_sparc): Handle ')'.
	* sparc-opc.c (sparc_opcodes): Add crypto instructions.

	* sparc-opc.c (sparc_opcodes): Rework table to put HWCAP values
	into new struct sparc_opcode 'hwcaps' field instead of 'flags'.

2012-04-12  David S. Miller  <davem@davemloft.net>

	* sparc-dis.c (X_DISP10): Define.
	(print_insn_sparc): Handle '='.

2012-04-01  Mike Frysinger  <vapier@gentoo.org>

	* bfin-dis.c (fmtconst): Replace decimal handling with a single
	sprintf call and the '*' field width.

2012-03-23  Maxim Kuvyrkov  <maxim@codesourcery.com>

	* mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.

2012-03-16  Alan Modra  <amodra@gmail.com>

	* ppc-dis.c (PPC_OPC_SEGS, PPC_OP_TO_SEG): Delete.
	(powerpc_opcd_indices): Bump array size.
	(disassemble_init_powerpc): Set powerpc_opcd_indices entries
	corresponding to unused opcodes to following entry.
	(lookup_powerpc): New function, extracted and optimised from..
	(print_insn_powerpc): ..here.

2012-03-15  Alan Modra  <amodra@gmail.com>
	    James Lemke  <jwlemke@codesourcery.com>

	* disassemble.c (disassemble_init_for_target): Handle ppc init.
	* ppc-dis.c (private): New var.
	(powerpc_init_dialect): Don't return calloc failure, instead use
	private.
	(PPC_OPCD_SEGS, PPC_OP_TO_SEG): Define.
	(powerpc_opcd_indices): New array.
	(disassemble_init_powerpc): New function.
	(print_insn_big_powerpc): Don't init dialect here.
	(print_insn_little_powerpc): Likewise.
	(print_insn_powerpc): Start search using powerpc_opcd_indices.

2012-03-10  Edmar Wienskoski  <edmar@freescale.com>

	* ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
	* ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
	(PPCVEC2, PPCTMR, E6500): New short names.
	(powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
	mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
	lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
	lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
	lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
	optional operands on sync instruction for E6500 target.

2012-03-08  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	* s390-opc.txt: Set instruction type of pku to SS_L2RDRD.

2012-02-27  Alan Modra  <amodra@gmail.com>

	* mt-dis.c: Regenerate.

2012-02-27  Alan Modra  <amodra@gmail.com>

	* v850-opc.c (extract_v8): Rearrange to make it obvious this
	is the inverse of corresponding insert function.
	(extract_d22, extract_u9, extract_r4): Likewise.
	(extract_d9): Correct sign extension.
	(extract_d16_15): Don't assume "long" is 32 bits, and don't
	rely on implementation defined behaviour for shift right of
	signed types.
	(extract_d16_16, extract_d17_16, extract_i9): Likewise.
	(extract_d23): Likewise, and correct mask.

2012-02-27  Alan Modra  <amodra@gmail.com>

	* crx-dis.c (print_arg): Mask constant to 32 bits.
	* crx-opc.c (cst4_map): Use int array.

2012-02-27  Alan Modra  <amodra@gmail.com>

	* arc-dis.c (BITS): Don't use shifts to mask off bits.
	(FIELDD): Sign extend with xor,sub.

2012-02-25  Walter Lee  <walt@tilera.com>

	* tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
	* tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
	TILEPRO_OPC_LW_TLS_SN.

2012-02-21  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.h (HLEPrefixNone): New.
	(HLEPrefixLock): Likewise.
	(HLEPrefixAny): Likewise.
	(HLEPrefixRelease): Likewise.

2012-02-08  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (HLE_Fixup1): New.
	(HLE_Fixup2): Likewise.
	(HLE_Fixup3): Likewise.
	(Ebh1): Likewise.
	(Evh1): Likewise.
	(Ebh2): Likewise.
	(Evh2): Likewise.
	(Ebh3): Likewise.
	(Evh3): Likewise.
	(MOD_C6_REG_7): Likewise.
	(MOD_C7_REG_7): Likewise.
	(RM_C6_REG_7): Likewise.
	(RM_C7_REG_7): Likewise.
	(XACQUIRE_PREFIX): Likewise.
	(XRELEASE_PREFIX): Likewise.
	(dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
	cmpxchg, dec, inc, neg, not, or, sbb, sub, xor and xadd. Use
	Ebh2/Evh2 on xchg.  Use Ebh3/Evh3 on mov.
	(reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
	not, or, sbb, sub and xor.  Use Ebh3/Evh3 on mov.  Use
	MOD_C6_REG_7 and MOD_C7_REG_7.
	(mod_table): Add MOD_C6_REG_7 and MOD_C7_REG_7.
	(rm_table): Add RM_C6_REG_7 and RM_C7_REG_7.  Add xend and
	xtest.
	(prefix_name): Handle XACQUIRE_PREFIX and XRELEASE_PREFIX.
	(CMPXCHG8B_Fixup): Handle HLE prefix on cmpxchg8b.

	* i386-gen.c (cpu_flag_init): Add CPU_HLE_FLAGS and
	CPU_RTM_FLAGS.
	(cpu_flags): Add CpuHLE and CpuRTM.
	(opcode_modifiers): Add HLEPrefixOk.

	* i386-opc.h (CpuHLE): New.
	(CpuRTM): Likewise.
	(HLEPrefixOk): Likewise.
	(i386_cpu_flags): Add cpuhle and cpurtm.
	(i386_opcode_modifier): Add hleprefixok.

	* i386-opc.tbl: Add HLEPrefixOk=3 to mov.  Add HLEPrefixOk to
	add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
	sbb, sub, xor and xadd.  Add HLEPrefixOk=2 to xchg with memory
	operand.  Add xacquire, xrelease, xabort, xbegin, xend and
	xtest.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

2012-01-24  DJ Delorie  <dj@redhat.com>

	* rl78-decode.opc (rl78_decode_opcode): Add NOT1.
	* rl78-decode.c: Regenerate.

2012-01-17  James Murray  <jsm@jsm-net.demon.co.uk>

	PR binutils/10173
	* cr16-dis.c (print_arg): Test symtab_size not num_symbols.

2012-01-17  Andreas Schwab  <schwab@linux-m68k.org>

	* m68k-opc.c (m68k_opcodes): Fix entries for pmove with BADx/BACx
	register and move them after pmove with PSR/PCSR register.

2012-01-13  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (mod_table): Add vmfunc.

	* i386-gen.c (cpu_flag_init): Add CPU_VMFUNC_FLAGS.
	(cpu_flags): CpuVMFUNC.

	* i386-opc.h (CpuVMFUNC): New.
	(i386_cpu_flags): Add cpuvmfunc.

	* i386-opc.tbl: Add vmfunc.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

For older changes see ChangeLog-2011
\f
Local Variables:
mode: change-log
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Commit	Line	Data
ec668d69 DM	1	2012-04-27 David S. Miller <davem@davemloft.net>
ec668d69 DM	2
2e52845b DM	3	* sparc-dis.c (v9a_asr_reg_names): Add 'cfr'.
	4	* sparc-opc.c (sparc_opcodes): Add rd/wr cases for %cfr.
	5
58004e23 DM	6	* sparc-opc.c (sparc_opcodes): Add 'wr X, %pause' and 'pause'.
	7	* sparc-dis.c (v9a_asr_reg_names): Add 'pause'.
	8
698544e1 DM	9	* sparc-opc.c (CBCOND): New define.
	10	(CBCOND_XCC): Likewise.
	11	(cbcond): New helper macro.
	12	(sparc_opcodes): Add compare-and-branch instructions.
	13
6cda1326 DM	14	* sparc-dis.c (print_insn_sparc): Handle ')'.
	15	* sparc-opc.c (sparc_opcodes): Add crypto instructions.
	16
ec668d69 DM	17	* sparc-opc.c (sparc_opcodes): Rework table to put HWCAP values
	18	into new struct sparc_opcode 'hwcaps' field instead of 'flags'.
	19
2615994e DM	20	2012-04-12 David S. Miller <davem@davemloft.net>
	21
	22	* sparc-dis.c (X_DISP10): Define.
	23	(print_insn_sparc): Handle '='.
	24
5de10af0 MF	25	2012-04-01 Mike Frysinger <vapier@gentoo.org>
	26
	27	* bfin-dis.c (fmtconst): Replace decimal handling with a single
	28	sprintf call and the '*' field width.
	29
55a36193 MK	30	2012-03-23 Maxim Kuvyrkov <maxim@codesourcery.com>
	31
	32	* mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.
	33
d6688282 AM	34	2012-03-16 Alan Modra <amodra@gmail.com>
	35
	36	* ppc-dis.c (PPC_OPC_SEGS, PPC_OP_TO_SEG): Delete.
	37	(powerpc_opcd_indices): Bump array size.
	38	(disassemble_init_powerpc): Set powerpc_opcd_indices entries
	39	corresponding to unused opcodes to following entry.
	40	(lookup_powerpc): New function, extracted and optimised from..
	41	(print_insn_powerpc): ..here.
	42
b240011a AM	43	2012-03-15 Alan Modra <amodra@gmail.com>
	44	James Lemke <jwlemke@codesourcery.com>
	45
	46	* disassemble.c (disassemble_init_for_target): Handle ppc init.
	47	* ppc-dis.c (private): New var.
	48	(powerpc_init_dialect): Don't return calloc failure, instead use
	49	private.
	50	(PPC_OPCD_SEGS, PPC_OP_TO_SEG): Define.
	51	(powerpc_opcd_indices): New array.
	52	(disassemble_init_powerpc): New function.
	53	(print_insn_big_powerpc): Don't init dialect here.
	54	(print_insn_little_powerpc): Likewise.
	55	(print_insn_powerpc): Start search using powerpc_opcd_indices.
	56
aea77599 AM	57	2012-03-10 Edmar Wienskoski <edmar@freescale.com>
	58
	59	* ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
	60	* ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
	61	(PPCVEC2, PPCTMR, E6500): New short names.
	62	(powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
	63	mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
	64	lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
	65	lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
	66	lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
	67	optional operands on sync instruction for E6500 target.
	68
5333187a AK	69	2012-03-08 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
	70
	71	* s390-opc.txt: Set instruction type of pku to SS_L2RDRD.
	72
a597d2d3 AM	73	2012-02-27 Alan Modra <amodra@gmail.com>
	74
	75	* mt-dis.c: Regenerate.
	76
3f26eb3a AM	77	2012-02-27 Alan Modra <amodra@gmail.com>
	78
	79	* v850-opc.c (extract_v8): Rearrange to make it obvious this
	80	is the inverse of corresponding insert function.
	81	(extract_d22, extract_u9, extract_r4): Likewise.
	82	(extract_d9): Correct sign extension.
	83	(extract_d16_15): Don't assume "long" is 32 bits, and don't
	84	rely on implementation defined behaviour for shift right of
	85	signed types.
	86	(extract_d16_16, extract_d17_16, extract_i9): Likewise.
	87	(extract_d23): Likewise, and correct mask.
	88
1f42f8b3 AM	89	2012-02-27 Alan Modra <amodra@gmail.com>
	90
	91	* crx-dis.c (print_arg): Mask constant to 32 bits.
	92	* crx-opc.c (cst4_map): Use int array.
	93
cdb06235 AM	94	2012-02-27 Alan Modra <amodra@gmail.com>
	95
	96	* arc-dis.c (BITS): Don't use shifts to mask off bits.
	97	(FIELDD): Sign extend with xor,sub.
	98
6f7be959 WL	99	2012-02-25 Walter Lee <walt@tilera.com>
	100
	101	* tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
	102	* tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
	103	TILEPRO_OPC_LW_TLS_SN.
	104
82c2def5 L	105	2012-02-21 H.J. Lu <hongjiu.lu@intel.com>
	106
	107	* i386-opc.h (HLEPrefixNone): New.
	108	(HLEPrefixLock): Likewise.
	109	(HLEPrefixAny): Likewise.
	110	(HLEPrefixRelease): Likewise.
	111
42164a71 L	112	2012-02-08 H.J. Lu <hongjiu.lu@intel.com>
	113
	114	* i386-dis.c (HLE_Fixup1): New.
	115	(HLE_Fixup2): Likewise.
	116	(HLE_Fixup3): Likewise.
	117	(Ebh1): Likewise.
	118	(Evh1): Likewise.
	119	(Ebh2): Likewise.
	120	(Evh2): Likewise.
	121	(Ebh3): Likewise.
	122	(Evh3): Likewise.
	123	(MOD_C6_REG_7): Likewise.
	124	(MOD_C7_REG_7): Likewise.
	125	(RM_C6_REG_7): Likewise.
	126	(RM_C7_REG_7): Likewise.
	127	(XACQUIRE_PREFIX): Likewise.
	128	(XRELEASE_PREFIX): Likewise.
	129	(dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
	130	cmpxchg, dec, inc, neg, not, or, sbb, sub, xor and xadd. Use
	131	Ebh2/Evh2 on xchg. Use Ebh3/Evh3 on mov.
	132	(reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
	133	not, or, sbb, sub and xor. Use Ebh3/Evh3 on mov. Use
	134	MOD_C6_REG_7 and MOD_C7_REG_7.
	135	(mod_table): Add MOD_C6_REG_7 and MOD_C7_REG_7.
	136	(rm_table): Add RM_C6_REG_7 and RM_C7_REG_7. Add xend and
	137	xtest.
	138	(prefix_name): Handle XACQUIRE_PREFIX and XRELEASE_PREFIX.
	139	(CMPXCHG8B_Fixup): Handle HLE prefix on cmpxchg8b.
	140
	141	* i386-gen.c (cpu_flag_init): Add CPU_HLE_FLAGS and
	142	CPU_RTM_FLAGS.
	143	(cpu_flags): Add CpuHLE and CpuRTM.
	144	(opcode_modifiers): Add HLEPrefixOk.
	145
	146	* i386-opc.h (CpuHLE): New.
	147	(CpuRTM): Likewise.
	148	(HLEPrefixOk): Likewise.
	149	(i386_cpu_flags): Add cpuhle and cpurtm.
	150	(i386_opcode_modifier): Add hleprefixok.
	151
	152	* i386-opc.tbl: Add HLEPrefixOk=3 to mov. Add HLEPrefixOk to
	153	add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
	154	sbb, sub, xor and xadd. Add HLEPrefixOk=2 to xchg with memory
	155	operand. Add xacquire, xrelease, xabort, xbegin, xend and
	156	xtest.
	157	* i386-init.h: Regenerated.
	158	* i386-tbl.h: Likewise.
	159
21abe33a DD	160	2012-01-24 DJ Delorie <dj@redhat.com>
	161
	162	* rl78-decode.opc (rl78_decode_opcode): Add NOT1.
	163	* rl78-decode.c: Regenerate.
	164
e20cc039 AM	165	2012-01-17 James Murray <jsm@jsm-net.demon.co.uk>
	166
	167	PR binutils/10173
	168	* cr16-dis.c (print_arg): Test symtab_size not num_symbols.
	169
e143d25c AS	170	2012-01-17 Andreas Schwab <schwab@linux-m68k.org>
	171
	172	* m68k-opc.c (m68k_opcodes): Fix entries for pmove with BADx/BACx
	173	register and move them after pmove with PSR/PCSR register.
	174
8729a6f6 L	175	2012-01-13 H.J. Lu <hongjiu.lu@intel.com>
	176
	177	* i386-dis.c (mod_table): Add vmfunc.
	178
	179	* i386-gen.c (cpu_flag_init): Add CPU_VMFUNC_FLAGS.
	180	(cpu_flags): CpuVMFUNC.
	181
	182	* i386-opc.h (CpuVMFUNC): New.
	183	(i386_cpu_flags): Add cpuvmfunc.
	184
	185	* i386-opc.tbl: Add vmfunc.
	186	* i386-init.h: Regenerated.
	187	* i386-tbl.h: Likewise.
5011093d	188
23e1d329	189	For older changes see ChangeLog-2011
252b5132 RH	190	\f
252b5132 RH	191	Local Variables:
2f6d2f85 NC	192	mode: change-log
	193	left-margin: 8
	194	fill-column: 74
252b5132 RH	195	version-control: never
252b5132 RH	196	End: